History log of /openbmc/qemu/linux-user/riscv/vdso-32.so (Results 1 – 5 of 5)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0
# 1e0f028d 12-Jan-2024 Richard Henderson <richard.henderson@linaro.org>

linux-user/riscv: Adjust vdso signal frame cfa offsets

A typo in sizeof_reg put the registers at the wrong offset.

Simplify the expressions to use positive addresses from the
start of uc_mcontext i

linux-user/riscv: Adjust vdso signal frame cfa offsets

A typo in sizeof_reg put the registers at the wrong offset.

Simplify the expressions to use positive addresses from the
start of uc_mcontext instead of negative addresses from the
end of uc_mcontext.

Reported-by: Vineet Gupta <vineetg@rivosinc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
(cherry picked from commit 1b21fe27e75a59bfe2513f5abcc6a18cfc35cfc8)
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>

show more ...


# b3a5dd06 25-Jan-2024 Peter Maydell <peter.maydell@linaro.org>

Merge tag 'pull-tcg-20240123' of https://gitlab.com/rth7680/qemu into staging

tcg/arm: Fix SIGILL in tcg_out_qemu_st_direct
tcg/s390x: Fix encoding of VRIc, VRSa, VRSc insns
tcg: Clean up error path

Merge tag 'pull-tcg-20240123' of https://gitlab.com/rth7680/qemu into staging

tcg/arm: Fix SIGILL in tcg_out_qemu_st_direct
tcg/s390x: Fix encoding of VRIc, VRSa, VRSc insns
tcg: Clean up error paths in alloc_code_gen_buffer_splitwx_memfd
linux-user/riscv: Adjust vdso signal frame cfa offsets
linux-user: Fixed cpu restore with pc 0 on SIGBUS

# -----BEGIN PGP SIGNATURE-----
#
# iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmWvk08dHHJpY2hhcmQu
# aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV+hSQf6A2h1vn0eVk+GaIUP
# 1WN1xaqvN5DmZm8AcQkdqZxdmMZO+zq592zHcZ4RNWlyq8NU93cPCLpMkw4RltLU
# NkHkqXcYIXUx12StJQ4EKuGNyBSu+emkPbkd31KBMM69zDXbugAmPGH7VGn5Mw7R
# 8D02D8dvsG/iqmvI8L/ZJFjkrbO3A0AaSdb1Ynkwl6vlLLjpWCqoSFtwv+ZMYyWn
# q9eLzrJ2pUtoO/CDq3WFnODdAh/QUMHKmgj/4YYvGylPIti7eoM24LXGJWQOeUkX
# c0soBB24DEd92jJWjCsYUokcUVQOITOGbNdlhRGrxICNdIapUvVhvLW/IYxeBTlV
# s5zl+g==
# =rNAP
# -----END PGP SIGNATURE-----
# gpg: Signature made Tue 23 Jan 2024 10:22:07 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* tag 'pull-tcg-20240123' of https://gitlab.com/rth7680/qemu:
tcg/arm: Fix SIGILL in tcg_out_qemu_st_direct
linux-user/elfload: check PR_GET_DUMPABLE before creating coredump
linux-user/elfload: test return value of getrlimit
linux-user/riscv: Adjust vdso signal frame cfa offsets
tcg/s390x: Fix encoding of VRIc, VRSa, VRSc insns
linux-user: Fixed cpu restore with pc 0 on SIGBUS
tcg: Make the cleanup-on-error path unique
tcg: Remove unreachable code

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


# 1b21fe27 12-Jan-2024 Richard Henderson <richard.henderson@linaro.org>

linux-user/riscv: Adjust vdso signal frame cfa offsets

A typo in sizeof_reg put the registers at the wrong offset.

Simplify the expressions to use positive addresses from the
start of uc_mcontext i

linux-user/riscv: Adjust vdso signal frame cfa offsets

A typo in sizeof_reg put the registers at the wrong offset.

Simplify the expressions to use positive addresses from the
start of uc_mcontext instead of negative addresses from the
end of uc_mcontext.

Reported-by: Vineet Gupta <vineetg@rivosinc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Alistair Francis <alistair.francis@wdc.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


# 516fffc9 30-Oct-2023 Stefan Hajnoczi <stefanha@redhat.com>

Merge tag 'pull-lu-20231030' of https://gitlab.com/rth7680/qemu into staging

linux-user: Fix guest signal remapping after adjusting SIGABRT
linux-user: Implement VDSOs

* tag 'pull-lu-20231030' of h

Merge tag 'pull-lu-20231030' of https://gitlab.com/rth7680/qemu into staging

linux-user: Fix guest signal remapping after adjusting SIGABRT
linux-user: Implement VDSOs

* tag 'pull-lu-20231030' of https://gitlab.com/rth7680/qemu: (21 commits)
build: Add update-linux-vdso makefile rule
linux-user: Show vdso address in /proc/pid/maps
linux-user/s390x: Add vdso
linux-user/s390x: Rename __SIGNAL_FRAMESIZE to STACK_FRAME_OVERHEAD
linux-user/ppc: Add vdso
linux-user/loongarch64: Add vdso
linux-user/riscv: Add vdso
linux-user/hppa: Add vdso
linux-user/arm: Add vdso
linux-user/aarch64: Add vdso
linux-user/x86_64: Add vdso
linux-user/i386: Add vdso
linux-user: Add gen-vdso tool
linux-user: Load vdso image if available
linux-user: Replace bprm->fd with bprm->src.fd
linux-user: Use ImageSource in load_symbols
linux-user: Use ImageSource in load_elf_image
linux-user: Do not clobber bprm_buf swapping ehdr
linux-user: Tidy loader_exec
linux-user: Introduce imgsrc_read, imgsrc_read_alloc
...

Conflicts:
linux-user/arm/signal.c
Fix an #include context conflict.

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...


Revision tags: v8.0.0, v7.2.0, v7.0.0, v6.2.0, v6.1.0
# 468c1bb5 06-Jul-2021 Richard Henderson <richard.henderson@linaro.org>

linux-user/riscv: Add vdso

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.or

linux-user/riscv: Add vdso

Acked-by: Alistair Francis <alistair.francis@wdc.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...