Merge tag 'pull-maintainer-final-130324-1' of https://gitlab.com/stsquad/qemu into staging

final updates for 9.0 (testing, gdbstub):

- fix the over rebuilding of test VMs
- support Xfer:siginfo

Merge tag 'pull-maintainer-final-130324-1' of https://gitlab.com/stsquad/qemu into staging

final updates for 9.0 (testing, gdbstub):

- fix the over rebuilding of test VMs
- support Xfer:siginfo:read in gdbstub
- fix double close() in gdbstub

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# gpg: Signature made Wed 13 Mar 2024 11:45:01 GMT
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44

* tag 'pull-maintainer-final-130324-1' of https://gitlab.com/stsquad/qemu:
gdbstub: Fix double close() of the follow-fork-mode socket
tests/tcg: Add multiarch test for Xfer:siginfo:read stub
gdbstub: Add Xfer:siginfo:read stub
gdbstub: Save target's siginfo
linux-user: Move tswap_siginfo out of target code
gdbstub: Rename back gdb_handlesig
tests/vm: ensure we build everything by default

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

linux-user: Move tswap_siginfo out of target code

Move tswap_siginfo from target code to handle_pending_signal. This will
allow some cleanups and having the siginfo ready to be used in gdbstub.

Sig

linux-user: Move tswap_siginfo out of target code

Move tswap_siginfo from target code to handle_pending_signal. This will
allow some cleanups and having the siginfo ready to be used in gdbstub.

Signed-off-by: Gustavo Romero <gustavo.romero@linaro.org>
Suggested-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240309030901.1726211-3-gustavo.romero@linaro.org>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>

show more ...

Merge tag 'pull-maintainer-updates-060324-1' of https://gitlab.com/stsquad/qemu into staging

maintainer updates (tests, gdbstub, plugins):

- expand QOS_PATH_MAX_ELEMENT_SIZE to avoid LTO issues

Merge tag 'pull-maintainer-updates-060324-1' of https://gitlab.com/stsquad/qemu into staging

maintainer updates (tests, gdbstub, plugins):

- expand QOS_PATH_MAX_ELEMENT_SIZE to avoid LTO issues
- support fork-follow-mode in gdbstub
- new thread-safe scoreboard API for TCG plugins
- suppress showing opcodes in plugin disassembly

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# gpg: Signature made Wed 06 Mar 2024 12:38:18 GMT
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full]
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44

* tag 'pull-maintainer-updates-060324-1' of https://gitlab.com/stsquad/qemu: (29 commits)
target/riscv: honour show_opcodes when disassembling
target/loongarch: honour show_opcodes when disassembling
disas/hppa: honour show_opcodes
disas: introduce show_opcodes
plugins: cleanup codepath for previous inline operation
plugins: remove non per_vcpu inline operation from API
contrib/plugins/howvec: migrate to new per_vcpu API
contrib/plugins/hotblocks: migrate to new per_vcpu API
tests/plugin/bb: migrate to new per_vcpu API
tests/plugin/insn: migrate to new per_vcpu API
tests/plugin/mem: migrate to new per_vcpu API
tests/plugin: add test plugin for inline operations
plugins: add inline operation per vcpu
plugins: implement inline operation relative to cpu_index
plugins: define qemu_plugin_u64
plugins: scoreboard API
tests/tcg: Add two follow-fork-mode tests
gdbstub: Implement follow-fork-mode child
gdbstub: Introduce gdb_handle_detach_user()
gdbstub: Introduce gdb_handle_set_thread_user()
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

{linux,bsd}-user: Introduce get_task_state()

A CPU's TaskState is stored in the CPUState's void *opaque field,
accessing which is somewhat awkward due to having to use a cast.
Introduce a wrapper an

{linux,bsd}-user: Introduce get_task_state()

A CPU's TaskState is stored in the CPUState's void *opaque field,
accessing which is somewhat awkward due to having to use a cast.
Introduce a wrapper and use it everywhere.

Suggested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Ilya Leoshkevich <iii@linux.ibm.com>
Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20240219141628.246823-3-iii@linux.ibm.com>
Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Message-Id: <20240305121005.3528075-4-alex.bennee@linaro.org>

show more ...

Merge tag 'pull-lu-20231030' of https://gitlab.com/rth7680/qemu into staging

linux-user: Fix guest signal remapping after adjusting SIGABRT
linux-user: Implement VDSOs

* tag 'pull-lu-20231030' of h

Merge tag 'pull-lu-20231030' of https://gitlab.com/rth7680/qemu into staging

linux-user: Fix guest signal remapping after adjusting SIGABRT
linux-user: Implement VDSOs

* tag 'pull-lu-20231030' of https://gitlab.com/rth7680/qemu: (21 commits)
build: Add update-linux-vdso makefile rule
linux-user: Show vdso address in /proc/pid/maps
linux-user/s390x: Add vdso
linux-user/s390x: Rename __SIGNAL_FRAMESIZE to STACK_FRAME_OVERHEAD
linux-user/ppc: Add vdso
linux-user/loongarch64: Add vdso
linux-user/riscv: Add vdso
linux-user/hppa: Add vdso
linux-user/arm: Add vdso
linux-user/aarch64: Add vdso
linux-user/x86_64: Add vdso
linux-user/i386: Add vdso
linux-user: Add gen-vdso tool
linux-user: Load vdso image if available
linux-user: Replace bprm->fd with bprm->src.fd
linux-user: Use ImageSource in load_symbols
linux-user: Use ImageSource in load_elf_image
linux-user: Do not clobber bprm_buf swapping ehdr
linux-user: Tidy loader_exec
linux-user: Introduce imgsrc_read, imgsrc_read_alloc
...

Conflicts:
linux-user/arm/signal.c
Fix an #include context conflict.

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

Merge tag 'pull-target-arm-20231027' of https://git-us.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
* Correct minor errors in Cortex-A710 definition
* Implement Neoverse N2 C

Merge tag 'pull-target-arm-20231027' of https://git-us.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
* Correct minor errors in Cortex-A710 definition
* Implement Neoverse N2 CPU model
* Refactor feature test functions out into separate header
* Fix syndrome for FGT traps on ERET
* Remove 'hw/arm/boot.h' includes from various header files
* pxa2xx: Refactoring/cleanup
* Avoid using 'first_cpu' when first ARM CPU is reachable
* misc/led: LED state is set opposite of what is expected
* hw/net/cadence_gen: clean up to use FIELD macros
* hw/net/cadence_gem: perform PHY access on write only
* hw/net/cadence_gem: enforce 32 bits variable size for CRC

# -----BEGIN PGP SIGNATURE-----
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# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmU7yz0ZHHBldGVyLm1h
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# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 27 Oct 2023 23:37:49 JST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
# gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* tag 'pull-target-arm-20231027' of https://git-us.linaro.org/people/pmaydell/qemu-arm: (41 commits)
hw/net/cadence_gem: enforce 32 bits variable size for CRC
hw/net/cadence_gem: perform PHY access on write only
hw/net/cadence_gem: use FIELD to describe PHYMNTNC register fields
hw/net/cadence_gem: use FIELD to describe DESCONF6 register fields
hw/net/cadence_gem: use FIELD to describe IRQ register fields
hw/net/cadence_gem: use FIELD to describe [TX|RX]STATUS register fields
hw/net/cadence_gem: use FIELD to describe DMACFG register fields
hw/net/cadence_gem: use FIELD to describe NWCFG register fields
hw/net/cadence_gem: use FIELD to describe NWCTRL register fields
hw/net/cadence_gem: use FIELD for screening registers
hw/net/cadence_gem: use REG32 macro for register definitions
misc/led: LED state is set opposite of what is expected
hw/arm: Avoid using 'first_cpu' when first ARM CPU is reachable
hw/arm/pxa2xx: Realize PXA2XX_I2C device before accessing it
hw/intc/pxa2xx: Factor pxa2xx_pic_realize() out of pxa2xx_pic_init()
hw/intc/pxa2xx: Pass CPU reference using QOM link property
hw/intc/pxa2xx: Convert to Resettable interface
hw/pcmcia/pxa2xx: Inline pxa2xx_pcmcia_init()
hw/pcmcia/pxa2xx: Do not open-code sysbus_create_simple()
hw/pcmcia/pxa2xx: Realize sysbus device before accessing it
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...

linux-user/arm: Add vdso

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

target/arm: Move feature test functions to their own header

The feature test functions isar_feature_*() now take up nearly
a thousand lines in target/arm/cpu.h. This header file is included
by a lot

target/arm: Move feature test functions to their own header

The feature test functions isar_feature_*() now take up nearly
a thousand lines in target/arm/cpu.h. This header file is included
by a lot of source files, most of which don't need these functions.
Move the feature test functions to their own header file.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20231024163510.2972081-2-peter.maydell@linaro.org

show more ...

Merge tag 'pull-user-20211220' of https://gitlab.com/rth7680/qemu into staging

Move errno processing from safe_syscall() to safe_syscall_base().
Move safe_syscall() from linux-user to common-user.
A

Merge tag 'pull-user-20211220' of https://gitlab.com/rth7680/qemu into staging

Move errno processing from safe_syscall() to safe_syscall_base().
Move safe_syscall() from linux-user to common-user.
Add FreeBSD support to safe_syscall_base().
Tidy top-level meson.build wrt {bsd,linux}-user.

# gpg: Signature made Mon 20 Dec 2021 11:46:11 AM PST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* tag 'pull-user-20211220' of https://gitlab.com/rth7680/qemu:
meson: Move bsd_user_ss to bsd-user/
meson: Move linux_user_ss to linux-user/
linux-user: Move thunk.c from top-level
common-user: Adjust system call return on FreeBSD
common-user: Move safe-syscall.* from linux-user
bsd-user: Create special-errno.h
linux-user: Create special-errno.h
linux-user: Rename TARGET_QEMU_ESIGRETURN to QEMU_ESIGRETURN
bsd-user: Rename TARGET_ERESTARTSYS to QEMU_ERESTARTSYS
linux-user: Rename TARGET_ERESTARTSYS to QEMU_ERESTARTSYS
linux-user: Remove HAVE_SAFE_SYSCALL and hostdep.h
linux-user/host/sparc64: Add safe-syscall.inc.S
linux-user/host/mips: Add safe-syscall.inc.S
linux-user: Move syscall error detection into safe_syscall_base
linux-user: Untabify all safe-syscall.inc.S

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

linux-user: Rename TARGET_QEMU_ESIGRETURN to QEMU_ESIGRETURN

This value is fully internal to qemu, and so is not a TARGET define.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mat

linux-user: Rename TARGET_QEMU_ESIGRETURN to QEMU_ESIGRETURN

This value is fully internal to qemu, and so is not a TARGET define.

Reviewed-by: Warner Losh <imp@bsdimp.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/vivier/tags/linux-user-for-6.2-pull-request' into staging

Pull request linux-user 20211004

Move signal trampolines to new page

# gpg: Signature made Mon 04 Oc

Merge remote-tracking branch 'remotes/vivier/tags/linux-user-for-6.2-pull-request' into staging

Pull request linux-user 20211004

Move signal trampolines to new page

# gpg: Signature made Mon 04 Oct 2021 12:43:53 AM PDT
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]

* remotes/vivier/tags/linux-user-for-6.2-pull-request: (26 commits)
tests/tcg/multiarch: Re-enable signals test for most guests
linux-user: Remove default for TARGET_ARCH_HAS_SIGTRAMP_PAGE
linux-user/xtensa: Implement setup_sigtramp
linux-user/sparc: Implement setup_sigtramp
linux-user/sh4: Implement setup_sigtramp
linux-user/s390x: Implement setup_sigtramp
linux-user/riscv: Implement setup_sigtramp
linux-user/ppc: Implement setup_sigtramp
linux-user/ppc: Simplify encode_trampoline
linux-user/openrisc: Implement setup_sigtramp
linux-user/nios2: Document non-use of setup_sigtramp
linux-user/mips: Implement setup_sigtramp
linux-user/mips: Tidy install_sigtramp
linux-user/microblaze: Implement setup_sigtramp
linux-user/m68k: Implement setup_sigtramp
linux-user/x86_64: Raise SIGSEGV if SA_RESTORER not set
linux-user/i386: Implement setup_sigtramp
linux-user/hppa: Document non-use of setup_sigtramp
linux-user/hexagon: Implement setup_sigtramp
linux-user/cris: Implement setup_sigtramp
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

linux-user/arm: Implement setup_sigtramp

Mirror what the kernel does in arch/arm/kernel/signal.h,
using the old sigframe struct in the rt sigframe struct.

Update the trampoline code to match the ke

linux-user/arm: Implement setup_sigtramp

Mirror what the kernel does in arch/arm/kernel/signal.h,
using the old sigframe struct in the rt sigframe struct.

Update the trampoline code to match the kernel: this uses
sp-relative accesses rather than pc-relative.

Copy the code into frame->retcode from the trampoline page.
This minimises the different cases wrt arm vs thumb vs fdpic.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-Id: <20210929130553.121567-6-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

linux-user/arm: Drop "_v2" from symbols in signal.c

Since we no longer support "v1", there's no need to distinguish "v2".

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richar

linux-user/arm: Drop "_v2" from symbols in signal.c

Since we no longer support "v1", there's no need to distinguish "v2".

Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210929130553.121567-5-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

linux-user/arm: Drop v1 signal frames

Version 2 signal frames are used from 2.6.12 and since cbc14e6f286,
we have set UNAME_MINIMUM_RELEASE to 2.6.32.

Suggested-by: Peter Maydell <peter.maydell@lin

linux-user/arm: Drop v1 signal frames

Version 2 signal frames are used from 2.6.12 and since cbc14e6f286,
we have set UNAME_MINIMUM_RELEASE to 2.6.32.

Suggested-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210929130553.121567-4-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.2-pull-request' into staging

Pull request linux-user 20210916

Code cleanup

# gpg: Signature made Thu 16 Sep 2021 16:11:58 BST
#

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.2-pull-request' into staging

Pull request linux-user 20210916

Code cleanup

# gpg: Signature made Thu 16 Sep 2021 16:11:58 BST
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-6.2-pull-request:
linux-user: Check lock_user result for ip_mreq_source sockopts
linux-user: Drop unneeded includes from qemu.h
linux-user: Don't include gdbstub.h in qemu.h
linux-user: Split linux-user internals out of qemu.h
linux-user: Split safe-syscall macro into its own header
linux-user: Split mmap prototypes into user-mmap.h
linux-user: Split loader-related prototypes into loader.h
linux-user: Split signal-related prototypes into signal-common.h
linux-user: Split strace prototypes into strace.h
linux-user: Fix coding style nits in qemu.h

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

linux-user: Split linux-user internals out of qemu.h

qemu.h is included in various non-linux-user files (which
mostly want the TaskState struct and the functions for
doing usermode access to guest a

linux-user: Split linux-user internals out of qemu.h

qemu.h is included in various non-linux-user files (which
mostly want the TaskState struct and the functions for
doing usermode access to guest addresses like lock_user(),
unlock_user(), get_user*(), etc).

Split out the parts that are only used in linux-user itself
into a new user-internals.h. This leaves qemu.h with basically
three things:
* the definition of the TaskState struct
* the user-access functions and macros
* do_brk()
all of which are needed by code outside linux-user that
includes qemu.h.

The addition of all the extra #include lines was done with
sed -i '/include.*qemu\.h/a #include "user-internals.h"' $(git grep -l 'include.*qemu\.h' linux-user)
(and then undoing the change to fpa11.h).

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210908154405.15417-8-peter.maydell@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210826' into staging

target-arm queue:
* hw/dma/xlnx-zdma, xlnx_csu_dma: Require 'dma' link property to be set
* hw/arm/Kconfi

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210826' into staging

target-arm queue:
* hw/dma/xlnx-zdma, xlnx_csu_dma: Require 'dma' link property to be set
* hw/arm/Kconfig: no need to enable ACPI_MEMORY_HOTPLUG/ACPI_NVDIMM explicitly
* target/arm/cpu: Introduce sve_vq_supported bitmap
* docs/specs: Convert ACPI spec docs to rST
* arch_init: Clean up and refactoring
* hw/core/loader: In gunzip(), check index is in range before use, not after
* softmmu/physmem.c: Remove unneeded NULL check in qemu_ram_alloc_from_fd()
* softmmu/physmem.c: Check return value from realpath()
* Zero-initialize sockaddr_in structs
* raspi: Use error_fatal for SoC realize errors, not error_abort
* target/arm: Avoid assertion trying to use KVM and multiple ASes
* target/arm: Implement HSTR.TTEE
* target/arm: Implement HSTR.TJDBX
* target/arm: Do hflags rebuild in cpsr_write()
* hw/arm/xlnx-versal, xlnx-zynqmp: Add unimplemented APU mmio

# gpg: Signature made Thu 26 Aug 2021 18:02:10 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20210826: (37 commits)
hw/arm/xlnx-zynqmp: Add unimplemented APU mmio
hw/arm/xlnx-versal: Add unimplemented APU mmio
target/arm: Do hflags rebuild in cpsr_write()
target/arm: Implement HSTR.TJDBX
target/arm: Implement HSTR.TTEE
hw/arm/virt: Delete EL3 error checksnow provided in CPU realize
target/arm: Avoid assertion trying to use KVM and multiple ASes
raspi: Use error_fatal for SoC realize errors, not error_abort
tests/tcg/multiarch/linux-test: Zero-initialize sockaddr structs
tests/qtest/ipmi-bt-test: Zero-initialize sockaddr struct
gdbstub: Zero-initialize sockaddr structs
net: Zero sockaddr_in in parse_host_port()
softmmu/physmem.c: Check return value from realpath()
softmmu/physmem.c: Remove unneeded NULL check in qemu_ram_alloc_from_fd()
hw/core/loader: In gunzip(), check index is in range before use, not after
stubs: Remove unused arch_type.c stub
arch_init.h: Don't include arch_init.h unnecessarily
arch_init.h: Move QEMU_ARCH_VIRTIO_* to qdev-monitor.c
arch_init.h: Add QEMU_ARCH_HEXAGON
meson.build: Define QEMU_ARCH in config-target.h
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

target/arm: Do hflags rebuild in cpsr_write()

Currently we rely on all the callsites of cpsr_write() to rebuild the
cached hflags if they change one of the CPSR bits which we use as a
TB flag and ca

target/arm: Do hflags rebuild in cpsr_write()

Currently we rely on all the callsites of cpsr_write() to rebuild the
cached hflags if they change one of the CPSR bits which we use as a
TB flag and cache in hflags. This is a bit awkward when we want to
change the set of CPSR bits that we cache, because it means we need
to re-audit all the cpsr_write() callsites to see which flags they
are writing and whether they now need to rebuild the hflags.

Switch instead to making cpsr_write() call arm_rebuild_hflags()
itself if one of the bits being changed is a cached bit.

We don't do the rebuild for the CPSRWriteRaw write type, because that
kind of write is generally doing something special anyway. For the
CPSRWriteRaw callsites in the KVM code and inbound migration we
definitely don't want to recalculate the hflags; the callsites in
boot.c and arm-powerctl.c have to do a rebuild-hflags call themselves
anyway because of other CPU state changes they make.

This allows us to drop explicit arm_rebuild_hflags() calls in a
couple of places where the only reason we needed to call it was the
CPSR write.

This fixes a bug where we were incorrectly failing to rebuild hflags
in the code path for a gdbstub write to CPSR, which meant that you
could make QEMU assert by breaking into a running guest, altering the
CPSR to change the value of, for example, CPSR.E, and then
continuing.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20210817201843.3829-1-peter.maydell@linaro.org

show more ...

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging

linux-user pull request 20210517

- alpha sigaction fixes/cleanups
- s390x sigaction fixes/cleanup
-

Merge remote-tracking branch 'remotes/vivier2/tags/linux-user-for-6.1-pull-request' into staging

linux-user pull request 20210517

- alpha sigaction fixes/cleanups
- s390x sigaction fixes/cleanup
- sparc sigaction fixes/cleanup
- s390x core dumping support
- core dump fix (app name)
- arm fpa11 fix and cleanup
- strace fixes (unshare(), llseek())
- fix copy_file_range()
- use GDateTime
- Remove dead code

# gpg: Signature made Tue 18 May 2021 06:31:12 BST
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/linux-user-for-6.1-pull-request: (59 commits)
linux-user/elfload: add s390x core dumping support
linux-user/elfload: fix filling psinfo->pr_psargs
linux-user: Tidy TARGET_NR_rt_sigaction
linux-user/alpha: Share code for TARGET_NR_sigaction
linux-user/alpha: Define TARGET_ARCH_HAS_KA_RESTORER
linux-user: Honor TARGET_ARCH_HAS_SA_RESTORER in do_syscall
linux-user: Pass ka_restorer to do_sigaction
linux-user/alpha: Rename the sigaction restorer field
linux-user/alpha: Fix rt sigframe return
linux-user: use GDateTime for formatting timestamp for core file
linux-user: Fix erroneous conversion in copy_file_range
linux-user: Add copy_file_range to strace.list
linux-user/s390x: Handle vector regs in signal stack
linux-user/s390x: Clean up signal.c
linux-user/s390x: Add build asserts for sigset sizes
linux-user/s390x: Fix frame_addr corruption in setup_frame
linux-user/s390x: Add stub sigframe argument for last_break
linux-user/s390x: Set psw.mask properly for the signal handler
linux-user/s390x: Clean up single-use gotos in signal.c
linux-user/s390x: Tidy save_sigregs
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

linux-user: Pass CPUArchState to target_restore_altstack

In most cases we were already passing get_sp_from_cpustate
directly to the function. In other cases, we were passing
a local variable which

linux-user: Pass CPUArchState to target_restore_altstack

In most cases we were already passing get_sp_from_cpustate
directly to the function. In other cases, we were passing
a local variable which already contained the same value.
In the rest of the cases, we were passing the stack pointer
out of env directly.

Reviewed by: Warner Losh <imp@bsdimp.com>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210426025334.1168495-5-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

linux-user: Use target_restore_altstack in all sigreturn

Note that target_restore_altstack uses the host memory
pointer that we have already verified, so TARGET_EFAULT
is not a possible return value

linux-user: Use target_restore_altstack in all sigreturn

Note that target_restore_altstack uses the host memory
pointer that we have already verified, so TARGET_EFAULT
is not a possible return value.

Note that using -EFAULT was a bug.

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20210426025334.1168495-3-richard.henderson@linaro.org>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200521-1' into staging

target-arm queue:
* tests/acceptance: Add a test for the canon-a1100 machine
* docs/system: Document so

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200521-1' into staging

target-arm queue:
* tests/acceptance: Add a test for the canon-a1100 machine
* docs/system: Document some of the Arm development boards
* linux-user: make BKPT insn cause SIGTRAP, not be a syscall
* target/arm: Remove unused GEN_NEON_INTEGER_OP macro
* fsl-imx25, fsl-imx31, fsl-imx6, fsl-imx6ul, fsl-imx7: implement watchdog
* hw/arm: Use qemu_log_mask() instead of hw_error() in various places
* ARM: PL061: Introduce N_GPIOS
* target/arm: Improve clear_vec_high() usage
* target/arm: Allow user-mode code to write CPSR.E via MSR
* linux-user/arm: Reset CPSR_E when entering a signal handler
* linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32

# gpg: Signature made Thu 21 May 2020 22:05:48 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20200521-1: (29 commits)
linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32
linux-user/arm: Reset CPSR_E when entering a signal handler
target/arm: Allow user-mode code to write CPSR.E via MSR
target/arm: Use clear_vec_high more effectively
target/arm: Use tcg_gen_gvec_mov for clear_vec_high
ARM: PL061: Introduce N_GPIOS
hw/timer/exynos4210_mct: Replace hw_error() by qemu_log_mask()
hw/char/xilinx_uartlite: Replace hw_error() by qemu_log_mask()
hw/arm/pxa2xx: Replace hw_error() by qemu_log_mask()
hw/arm/integratorcp: Replace hw_error() by qemu_log_mask()
hw/arm/fsl-imx7: Connect watchdog interrupts
hw/arm/fsl-imx7: Instantiate various unimplemented devices
hw/arm/fsl-imx6ul: Connect watchdog interrupts
hw/arm/fsl-imx6: Connect watchdog interrupts
hw/arm/fsl-imx31: Wire up watchdog
hw/arm/fsl-imx25: Wire up watchdog
hw/watchdog: Implement full i.MX watchdog support
hw: Move i.MX watchdog driver to hw/watchdog
target/arm: Remove unused GEN_NEON_INTEGER_OP macro
linux-user/arm: Fix identification of syscall numbers
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32

The Arm signal-handling code has some parts ifdeffed with a
TARGET_CONFIG_CPU_32, which is always defined. This is a leftover
from when this code's

linux-user/arm/signal.c: Drop TARGET_CONFIG_CPU_32

The Arm signal-handling code has some parts ifdeffed with a
TARGET_CONFIG_CPU_32, which is always defined. This is a leftover
from when this code's structure was based on the Linux kernel
signal handling code, where it was intended to support 26-bit
Arm CPUs. The kernel dropped its CONFIG_CPU_32 in kernel commit
4da8b8208eded0ba21e3 in 2009.

QEMU has never had 26-bit CPU support and is unlikely to ever
add it; we certainly aren't going to support 26-bit Linux
binaries via linux-user mode. The ifdef is just unhelpful
noise, so remove it entirely.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200518143014.20689-1-peter.maydell@linaro.org

show more ...

linux-user/arm: Reset CPSR_E when entering a signal handler

This fixes signal handlers running with the wrong endianness if the
interrupted code used SETEND to dynamically switch endianness.

Signed

linux-user/arm: Reset CPSR_E when entering a signal handler

This fixes signal handlers running with the wrong endianness if the
interrupted code used SETEND to dynamically switch endianness.

Signed-off-by: Amanieu d'Antras <amanieu@gmail.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200511131117.2486486-1-amanieu@gmail.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

target/arm: Allow user-mode code to write CPSR.E via MSR

Using the MSR instruction to write to CPSR.E is deprecated, but it is
required to work from any mode including unprivileged code. We were
in

target/arm: Allow user-mode code to write CPSR.E via MSR

Using the MSR instruction to write to CPSR.E is deprecated, but it is
required to work from any mode including unprivileged code. We were
incorrectly forbidding usermode code from writing it because
CPSR_USER did not include the CPSR_E bit.

We use CPSR_USER in only three places:
* as the mask of what to allow userspace MSR to write to CPSR
* when deciding what bits a linux-user signal-return should be
able to write from the sigcontext structure
* in target_user_copy_regs() when we set up the initial
registers for the linux-user process

In the first two cases not being able to update CPSR.E is a bug, and
in the third case it doesn't matter because CPSR.E is always 0 there.
So we can fix both bugs by adding CPSR_E to CPSR_USER.

Because the cpsr_write() in restore_sigcontext() is now changing
a CPSR bit which is cached in hflags, we need to add an
arm_rebuild_hflags() call there; the callsite in
target_user_copy_regs() was already rebuilding hflags for other
reasons.

(The recommended way to change CPSR.E is to use the 'SETEND'
instruction, which we do correctly allow from usermode code.)

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-id: 20200518142801.20503-1-peter.maydell@linaro.org

show more ...