Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0 |
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#
017b2e73 |
| 29-Jun-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'accel-20230628' of https://github.com/philmd/qemu into staging
Accelerators patches
- MAINTAINERS: Update Roman Bolshakov email address - HAX: Fix a memory leak - HAX/NVMM/WHPX/HVF: Rena
Merge tag 'accel-20230628' of https://github.com/philmd/qemu into staging
Accelerators patches
- MAINTAINERS: Update Roman Bolshakov email address - HAX: Fix a memory leak - HAX/NVMM/WHPX/HVF: Rename per-accel state as AccelCPUState - KVM: Restrict specific fields from ArchCPU - WHPX: Re-enable cross-build gitlab-ci job on case sensitive filesystems - WHPX: Fix error message when setting ProcessorCount fails - exec/memory: Add definitions for memory listener priorities
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmScVtkACgkQ4+MsLN6t # wN7p8A//RXuX9gLFT35zx+5axocU3/XBbCsQWSvzzkYoXxmC/TLxvivO66NPGMc0 # C76b1FJUoLS/u9SyJUeIeYkL0rjkzARUKcRpiJXM21WM6ou8Nkz0kuI4ouowt+4K # i/4chTjxlN5/4PKlHHcX9ZUJ9acVj01zO1BCuj/bVsxO6WMT1kjL+kplVxxFR3aW # tlbYtUT3v4xmp94FfE2Q9lR25z4usrGnmz2rchaadlVc43kmsNcQRx+EoUdi148n # lkViRR90sacYPX586s2yxhPpUdtrXjJmEdX0X00urdPqljkRxekHtyTqG4CRZi+K # hG5NztK7p37GNNXZroL0gpHyr9IX6hZ3o8rmN3IiCOGU6BgQBRUhvvG2sblwcJ1A # SSiBK4RWtgyIGWt4U6PgVj8IAu55JuqT5xR2r34fH/zccxXlp/B13vadGs7TUK15 # oHDUT4GnKL2R29lVFTl95BzsxwaMtbB9w01CLJk8va2T/97eqtFgvJyuVC9vZb0N # 41u2RkinaQZ+hbq9TP1G21zpG0eyucEMIQ6loUd7+G3KJFjFfB4JzE2VDm0Y/OVy # 77cEEQ67wts29fMNSqqPIQCMttDrNj7JqMMknGBQS2iHPgF+B3KjwIjnRaMBt73I # CKPITOJPmb+kvIUsK3KlONdicEG57cBxFBTZW5+P9pJXF5izrAY= # =b9hj # -----END PGP SIGNATURE----- # gpg: Signature made Wed 28 Jun 2023 05:50:49 PM CEST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
* tag 'accel-20230628' of https://github.com/philmd/qemu: (30 commits) exec/memory: Add symbol for the min value of memory listener priority exec/memory: Add symbol for memory listener priority for device backend exec/memory: Add symbolic value for memory listener priority for accel target/i386/WHPX: Fix error message when fail to set ProcessorCount target/riscv: Restrict KVM-specific fields from ArchCPU target/ppc: Restrict KVM-specific fields from ArchCPU target/arm: Restrict KVM-specific fields from ArchCPU hw/arm/sbsa-ref: Include missing 'sysemu/kvm.h' header hw/intc/arm_gic: Rename 'first_cpu' argument hw/intc/arm_gic: Un-inline GIC*/ITS class_name() helpers accel/kvm: Declare kvm_direct_msi_allowed in stubs accel/kvm: Re-include "exec/memattrs.h" header accel: Rename HVF 'struct hvf_vcpu_state' -> AccelCPUState accel: Rename 'cpu_state' -> 'cs' accel: Inline WHPX get_whpx_vcpu() accel: Rename WHPX 'struct whpx_vcpu' -> AccelCPUState accel: Remove WHPX unreachable error path accel: Inline NVMM get_qemu_vcpu() accel: Rename NVMM 'struct qemu_vcpu' -> AccelCPUState accel: Remove NVMM unreachable error path ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v8.0.0 |
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#
69700301 |
| 03-Apr-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
accel: Document generic accelerator headers
These headers are meant to be include by any file to check the availability of accelerators, thus are not accelerator specific.
Signed-off-by: Philippe M
accel: Document generic accelerator headers
These headers are meant to be include by any file to check the availability of accelerators, thus are not accelerator specific.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230624174121.11508-3-philmd@linaro.org>
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Revision tags: v7.2.0, v7.0.0, v6.2.0, v6.1.0 |
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#
fbe7919e |
| 14-Jun-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210613' into staging
Clean up code_gen_buffer allocation. Add tcg_remove_ops_after. Fix tcg_constant_* documentation. Improve TB chai
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210613' into staging
Clean up code_gen_buffer allocation. Add tcg_remove_ops_after. Fix tcg_constant_* documentation. Improve TB chaining documentation. Fix float32_exp2. Fix arm tcg_out_op function signature.
# gpg: Signature made Mon 14 Jun 2021 02:12:35 BST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-tcg-20210613: (34 commits) docs/devel: Explain in more detail the TB chaining mechanisms softfloat: Fix tp init in float32_exp2 tcg/arm: Fix tcg_out_op function signature tcg: Fix documentation for tcg_constant_* vs tcg_temp_free_* tcg: Introduce tcg_remove_ops_after tcg: Move tcg_init_ctx and tcg_ctx from accel/tcg/ tcg: When allocating for !splitwx, begin with PROT_NONE tcg: Merge buffer protection and guard page protection tcg: Round the tb_size default from qemu_get_host_physmem util/osdep: Add qemu_mprotect_rw tcg: Sink qemu_madvise call to common code tcg: Return the map protection from alloc_code_gen_buffer tcg: Allocate code_gen_buffer into struct tcg_region_state tcg: Move in_code_gen_buffer and tests to region.c tcg: Tidy split_cross_256mb tcg: Tidy tcg_n_regions tcg: Rename region.start to region.after_prologue tcg: Replace region.end with region.total_size tcg: Move MAX_CODE_GEN_BUFFER_SIZE to tcg-target.h tcg: Introduce tcg_max_ctxs ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
fa79cde6 |
| 09-Mar-2021 |
Richard Henderson <richard.henderson@linaro.org> |
accel/tcg: Merge tcg_exec_init into tcg_init_machine
There is only one caller, and shortly we will need access to the MachineState, which tcg_init_machine already has.
Reviewed-by: Luis Pires <luis
accel/tcg: Merge tcg_exec_init into tcg_init_machine
There is only one caller, and shortly we will need access to the MachineState, which tcg_init_machine already has.
Reviewed-by: Luis Pires <luis.pires@eldorado.org.br> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
e79de63a |
| 07-Jan-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210107' into staging
Build fix for ppc64 centos7. Reduce the use of scratch registers for tcg/i386. Use _aligned_malloc for Win32. En
Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210107' into staging
Build fix for ppc64 centos7. Reduce the use of scratch registers for tcg/i386. Use _aligned_malloc for Win32. Enable split w^x code gen buffers.
# gpg: Signature made Thu 07 Jan 2021 20:06:38 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* remotes/rth-gitlab/tags/pull-tcg-20210107: (47 commits) tcg: Constify TCGLabelQemuLdst.raddr tcg: Constify tcg_code_gen_epilogue tcg: Remove TCG_TARGET_SUPPORT_MIRROR tcg/arm: Support split-wx code generation tcg/mips: Support split-wx code generation tcg/mips: Do not assert on relocation overflow accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd tcg/riscv: Support split-wx code generation tcg/riscv: Remove branch-over-branch fallback tcg/riscv: Fix branch range checks tcg/s390: Support split-wx code generation tcg/s390: Use tcg_tbrel_diff tcg/sparc: Support split-wx code generation tcg/sparc: Use tcg_tbrel_diff tcg/ppc: Support split-wx code generation tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB tcg/ppc: Use tcg_tbrel_diff tcg: Introduce tcg_tbrel_diff tcg/tci: Push const down through bytecode reading disas: Push const down through host disassembly ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v5.2.0 |
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#
a35b3e14 |
| 28-Oct-2020 |
Richard Henderson <richard.henderson@linaro.org> |
tcg: Add --accel tcg,split-wx property
Plumb the value through to alloc_code_gen_buffer. This is not supported by any os or tcg backend, so for now enabling it will result in an error.
Reviewed-by
tcg: Add --accel tcg,split-wx property
Plumb the value through to alloc_code_gen_buffer. This is not supported by any os or tcg backend, so for now enabling it will result in an error.
Reviewed-by: Joelle van Dyne <j@getutm.app> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
7d3660e7 |
| 12-Jun-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* Miscellaneous fixes and feature enablement (many) * SEV refactoring (David) * Hyper-V initial support (Jon) * i386 TCG
Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging
* Miscellaneous fixes and feature enablement (many) * SEV refactoring (David) * Hyper-V initial support (Jon) * i386 TCG fixes (x87 and SSE, Joseph) * vmport cleanup and improvements (Philippe, Liran) * Use-after-free with vCPU hot-unplug (Nengyuan) * run-coverity-scan improvements (myself) * Record/replay fixes (Pavel) * -machine kernel_irqchip=split improvements for INTx (Peter) * Code cleanups (Philippe) * Crash and security fixes (PJP) * HVF cleanups (Roman)
# gpg: Signature made Fri 12 Jun 2020 16:57:04 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini/tags/for-upstream: (116 commits) target/i386: Remove obsolete TODO file stubs: move Xen stubs to accel/ replay: fix replay shutdown for console mode exec/cpu-common: Move MUSB specific typedefs to 'hw/usb/hcd-musb.h' hw/usb: Move device-specific declarations to new 'hcd-musb.h' header exec/memory: Remove unused MemoryRegionMmio type checkpatch: reversed logic with acpi test checks target/i386: sev: Unify SEVState and SevGuestState target/i386: sev: Remove redundant handle field target/i386: sev: Remove redundant policy field target/i386: sev: Remove redundant cbitpos and reduced_phys_bits fields target/i386: sev: Partial cleanup to sev_state global target/i386: sev: Embed SEVState in SevGuestState target/i386: sev: Rename QSevGuestInfo target/i386: sev: Move local structure definitions into .c file target/i386: sev: Remove unused QSevGuestInfoClass xen: fix build without pci passthrough i386: hvf: Drop HVFX86EmulatorState i386: hvf: Move mmio_buf into CPUX86State i386: hvf: Move lazy_flags into CPUX86State ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
# Conflicts: # hw/i386/acpi-build.c
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#
ce4049e8 |
| 26-May-2020 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
sysemu/tcg: Only declare tcg_allowed when TCG is available
When TCG is not available, the tcg_allowed variable does not exist.
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by
sysemu/tcg: Only declare tcg_allowed when TCG is available
When TCG is not available, the tcg_allowed variable does not exist.
Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Reviewed-by: Cornelia Huck <cohuck@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20200526172427.17460-3-f4bug@amsat.org> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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Revision tags: v5.0.0, v4.2.0 |
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#
59c58f96 |
| 12-Jun-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2019-06-11-v3' into staging
Miscellaneous patches for 2019-06-11
# gpg: Signature made Wed 12 Jun 2019 12:20:41 BST # gpg:
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2019-06-11-v3' into staging
Miscellaneous patches for 2019-06-11
# gpg: Signature made Wed 12 Jun 2019 12:20:41 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-misc-2019-06-11-v3: MAINTAINERS: Polish headline decorations MAINTAINERS: Improve section headlines MAINTAINERS: Remove duplicate entries of qemu-devel@nongnu.org Clean up a header guard symbols (again) Supply missing header guards Clean up a few header guard symbols scripts/clean-header-guards: Fix handling of trailing comments Normalize position of header guard Include qemu-common.h exactly where needed Include qemu/module.h where needed, drop it from qemu-common.h qemu-common: Move qemu_isalnum() etc. to qemu/ctype.h qemu-common: Move tcg_enabled() etc. to sysemu/tcg.h
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
14a48c1d |
| 23-May-2019 |
Markus Armbruster <armbru@redhat.com> |
qemu-common: Move tcg_enabled() etc. to sysemu/tcg.h
Other accelerators have their own headers: sysemu/hax.h, sysemu/hvf.h, sysemu/kvm.h, sysemu/whpx.h. Only tcg_enabled() & friends sit in qemu-com
qemu-common: Move tcg_enabled() etc. to sysemu/tcg.h
Other accelerators have their own headers: sysemu/hax.h, sysemu/hvf.h, sysemu/kvm.h, sysemu/whpx.h. Only tcg_enabled() & friends sit in qemu-common.h. This necessitates inclusion of qemu-common.h into headers, which is against the rules spelled out in qemu-common.h's file comment.
Move tcg_enabled() & friends into their own header sysemu/tcg.h, and adjust #include directives.
Cc: Richard Henderson <rth@twiddle.net> Cc: Paolo Bonzini <pbonzini@redhat.com> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20190523143508.25387-2-armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [Rebased with conflicts resolved automatically, except for accel/tcg/tcg-all.c]
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