History log of /openbmc/qemu/include/hw/ppc/xics.h (Results 76 – 100 of 145)
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Revision tags: ppc-for-2.10-20170511, ppc-for-2.10-20170510
# 5c6b487d 05-May-2017 Paolo Bonzini <pbonzini@redhat.com>

ppc: xics: fix compilation with CentOS 6

The PowerPCCPU typedef is included twice if a file includes
both hw/ppc/xics.h and target/ppc/cpu-qom.h.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

ppc: xics: fix compilation with CentOS 6

The PowerPCCPU typedef is included twice if a file includes
both hw/ppc/xics.h and target/ppc/cpu-qom.h.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# 229e16fd 27-Apr-2017 Sam Bobroff <sam.bobroff@au1.ibm.com>

ppc/xics: preserve P and Q bits for KVM IRQs

Kernel commit 17d48610ae0f ("KVM: PPC: Book 3S: XICS: Implement ICS
P/Q states") added new bits to the state used by KVM IRQs. Currently,
QEMU does not p

ppc/xics: preserve P and Q bits for KVM IRQs

Kernel commit 17d48610ae0f ("KVM: PPC: Book 3S: XICS: Implement ICS
P/Q states") added new bits to the state used by KVM IRQs. Currently,
QEMU does not preserve these bits, so migrating (or otherwise saving
and restoring) the guest state causes the P and Q bits to be cleared.

Clearing the P bit has no effect, because the kernel will set it based
on other data, but the loss of a set Q bit will cause a lost
interrupt.

This patch preserves the P and Q bits, correcting the problem.

Signed-off-by: Sam Bobroff <sam.bobroff@au1.ibm.com>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


Revision tags: ppc-for-2.10-20170426, ppc-for-2.10-20170424, v2.8.1.1, v2.9.0, v2.9.0-rc5, v2.9.0-rc4, v2.9.0-rc3, ppc-for-2.9-20170403, v2.8.1, ppc-for-2.9-20170329, v2.9.0-rc2, ppc-for-2.9-20170323, v2.9.0-rc1, v2.9.0-rc0, ppc-for-2.9-20170314, ppc-for-2.9-20170306, submodule-update-20170303, ppc-for-2.9-20170303, ppc-for-2.9-20170301, ppc-for-2.9-20170222, isa-cleanup-20170206, ppc-for-2.9-20170202, ppc-for-2.9-20170112, master-20170112, v2.7.1, v2.8.0, v2.8.0-rc4, v2.8.0-rc3, ppc-for-2.8-20161201, v2.8.0-rc2, ppc-for-2.8-20161123, v2.8.0-rc1, isa-cleanup-20161118, qemu-kvm-1.5.3-127.el7, v2.8.0-rc0, ppc-for-2.8-20161115, qemu-kvm-1.5.3-126.el7_3.1, qemu-kvm-0.12.1.2-2.496.el6, ppc-for-2.8-20161028, qemu-kvm-0.12.1.2-2.495.el6, ppc-for-2.8-20161026, ppc-for-2.8-20161017, qemu-kvm-rhev-2.3.0-31.el7_2.23, ppc-for-2.7-20161013, qemu-kvm-1.5.3-105.el7_2.10, ppc-for-2.8-20161006, qemu-kvm-1.5.3-105.el7_2.9, v2.6.2, RHELSA-7.3_qemu-kvm-rhev, qemu-kvm-rhev-2.6.0-28.el7, RHEL-7.3_qemu-kvm-rhev, qemu-kvm-rhev-2.6.0-27.el7, ppc-for-2.8-20160923, qemu-kvm-0.12.1.2-2.494.el6, ppc-for-2.8-20160922, RHEL-7.3_qemu-kvm, qemu-kvm-1.5.3-126.el7, qemu-kvm-rhev-2.6.0-26.el7, vfio-fixes-20160915.0, qemu-kvm-1.5.3-125.el7, qemu-kvm-rhev-2.3.0-31.el7_2.22, qemu-kvm-rhev-2.6.0-25.el7, qemu-kvm-1.5.3-124.el7, qemu-kvm-rhev-2.6.0-24.el7, qemu-kvm-1.5.3-123.el7, qemu-kvm-0.12.1.2-2.415.el6_5.16, ppc-for-2.8-20160907, qemu-kvm-rhev-2.6.0-23.el7, ppc-for-2.8-20160906, v2.7.0, RHEL-7.3-qemu-guest-agent, qemu-guest-agent-2.5.0-3.el7, v2.7.0-rc5, qemu-kvm-1.5.3-122.el7, qemu-kvm-rhev-2.6.0-22.el7, v2.7.0-rc4, v2.6.1, v2.7.0-rc3, qemu-kvm-rhev-2.6.0-21.el7, qemu-kvm-1.5.3-105.el7_2.8, ppc-for-2.7-20160815, qemu-kvm-rhev-2.6.0-20.el7, ppc-for-2.7-20160810, v2.7.0-rc2, ppc-for-2.7-20160808, qemu-kvm-rhev-2.6.0-19.el7, ppc-for-2.7-20160803, qemu-kvm-rhev-2.6.0-18.el7, qemu-kvm-1.5.3-105.el7_2.7, qemu-kvm-rhev-2.3.0-31.el7_2.21, qemu-kvm-1.5.3-121.el7, v2.7.0-rc1, qemu-kvm-rhev-2.6.0-17.el7, qemu-kvm-1.5.3-120.el7, ppc-for-2.7-20160729, qemu-kvm-0.12.1.2-2.493.el6, qemu-kvm-1.5.3-105.el7_2.6, qemu-kvm-0.12.1.2-2.491.el6_8.3, qemu-kvm-rhev-2.3.0-31.el7_2.20, qemu-kvm-1.5.3-119.el7, qemu-kvm-rhev-2.6.0-16.el7, ppc-for-2.7-20160726, v2.7.0-rc0, qemu-kvm-rhev-2.6.0-15.el7, qemu-kvm-rhev-2.3.0-31.el7_2.19, qemu-kvm-rhev-2.6.0-14.el7, qemu-kvm-1.5.3-118.el7, vfio-update-20160718.0, ppc-for-2.7-20160718, qemu-kvm-1.5.3-117.el7, qemu-kvm-rhev-2.6.0-13.el7, qemu-kvm-rhev-2.6.0-12.el7, qemu-kvm-rhev-2.3.0-31.el7_2.18, ppc-for-2.7-20160705, qemu-kvm-rhev-2.6.0-11.el7, qemu-kvm-1.5.3-105.el7_2.5, ppc-for-2.7-20160701, vfio-update-20160630.0, qemu-kvm-0.12.1.2-2.492.el6, qemu-kvm-rhev-2.6.0-10.el7, qemu-kvm-rhev-2.3.0-31.el7_2.17, qemu-kvm-1.5.3-116.el7
# 98c710f2 27-Jun-2016 Andrew Jeffery <andrew@aj.id.au>

Merge remote-tracking branch 'clg/aspeed'

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>


# dcaed66c 26-Apr-2017 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.10-20170426' into staging

ppc patch queue 2017-04-26

Here's a respind of my first pull request for qemu-2.10, consisting of
assorted pat

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.10-20170426' into staging

ppc patch queue 2017-04-26

Here's a respind of my first pull request for qemu-2.10, consisting of
assorted patches which have accumulated while qemu-2.9 stabilized.
Highlights are:
* Rework / cleanup of the XICS interrupt controller
* Substantial improvement to the 'powernv' machine type
- Includes an MMIO XICS version
* POWER9 support improvements
- POWER9 guests with KVM
- Partial support for POWER9 guests with TCG
* IOMMU and VFIO improvements
* Assorted minor changes

There are several IPMI patches here that aren't usually in my area of
maintenance, but there isn't a regular maintainer and these patches
are for the benefit of the powernv machine type.

This pull request supersedes my 2017-04-26 pull request. This new set
fixes a bug in one of the aforementioned IPMI patches which caused
clang sanitizer failures (and may have crashed on some libc / host
versions).

# gpg: Signature made Wed 26 Apr 2017 07:58:10 BST
# gpg: using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.10-20170426: (48 commits)
MAINTAINERS: Remove myself from e500
target/ppc: Style fixes
e500,book3s: mfspr 259: Register mapped/aliased SPRG3 user read
target/ppc: Flush TLB on write to PIDR
spapr-cpu-core: Release ICPState object during CPU unrealization
ppc/pnv: generate an OEM SEL event on shutdown
ppc/pnv: add initial IPMI sensors for the BMC simulator
ppc/pnv: populate device tree for IPMI BT devices
ppc/pnv: populate device tree for serial devices
ppc/pnv: populate device tree for RTC devices
ppc/pnv: scan ISA bus to populate device tree
ppc/pnv: enable only one LPC bus
ppc/pnv: Add support for POWER8+ LPC Controller
spapr: remove the 'nr_servers' field from the machine
target/ppc: Fix size of struct PPCElfPrstatus
ipmi: introduce an ipmi_bmc_gen_event() API
ipmi: introduce an ipmi_bmc_sdr_find() API
ipmi: provide support for FRUs
ipmi: use a file to load SDRs
ppc: add IPMI support
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


# 99285aae 03-Apr-2017 Cédric Le Goater <clg@kaod.org>

ppc/pnv: add a PnvICPState object

This provides a new ICPState object for the PowerNV machine (POWER8).
Access to the Interrupt Management area is done though a memory
region. It contains the regist

ppc/pnv: add a PnvICPState object

This provides a new ICPState object for the PowerNV machine (POWER8).
Access to the Interrupt Management area is done though a memory
region. It contains the registers of the Interrupt Control Presenters
of each thread which are used to accept, return, forward interrupts in
the system.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# 439071a9 03-Apr-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: add a realize() handler to ICPStateClass

It will be used by derived classes in PowerNV for customization.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@g

ppc/xics: add a realize() handler to ICPStateClass

It will be used by derived classes in PowerNV for customization.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# 5bc8d26d 03-Apr-2017 Cédric Le Goater <clg@kaod.org>

spapr: allocate the ICPState object from under sPAPRCPUCore

Today, all the ICPs are created before the CPUs, stored in an array
under the sPAPR machine and linked to the CPU when the core threads
ar

spapr: allocate the ICPState object from under sPAPRCPUCore

Today, all the ICPs are created before the CPUs, stored in an array
under the sPAPR machine and linked to the CPU when the core threads
are realized. This modeling brings some complexity when a lookup in
the array is required and it can be simplified by allocating the ICPs
when the CPUs are.

This is the purpose of this proposal which introduces a new 'icp_type'
field under the machine and creates the ICP objects of the right type
(KVM or not) before the PowerPCCPU object are.

This change allows more cleanups : the removal of the icps array under
the sPAPR machine and the removal of the xics_get_cpu_index_by_dt_id()
helper.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# ad5d1add 29-Mar-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: introduce an 'intc' backlink under PowerPCCPU

Today, the ICPState array of the sPAPR machine is indexed with
'cpu_index' of the CPUState. This numbering of CPUs is internal to
QEMU and the

ppc/xics: introduce an 'intc' backlink under PowerPCCPU

Today, the ICPState array of the sPAPR machine is indexed with
'cpu_index' of the CPUState. This numbering of CPUs is internal to
QEMU and the guest only knows about what is exposed in the device
tree, that is the 'cpu_dt_id'. This is why sPAPR uses the helper
xics_get_cpu_index_by_dt_id() to do the mapping in a couple of places.

To provide a more generic XICS layer, we need to abstract the IRQ
'server' number and remove any assumption made on its nature. It
should not be used as a 'cpu_index' for lookups like xics_cpu_setup()
and xics_cpu_destroy() do.

To reach that goal, we choose to introduce a generic 'intc' backlink
under PowerPCCPU, and let the machine core init routine do the
ICPState lookup. The resulting object is passed on to xics_cpu_setup()
which does the store under PowerPCCPU. The IRQ 'server' number in XICS
is now generic. sPAPR uses 'cpu_dt_id' and PowerNV will use 'PIR'
number.

This also has the benefit of simplifying the sPAPR hcall routines
which do not need to do any ICPState lookups anymore.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# 147ff807 07-Mar-2017 Cédric Le Goater <clg@kaod.org>

ppc/spapr: QOM'ify sPAPRRTCState

Also use an 'sPAPRRTCState' attribute under the sPAPR machine to hold
the RTC object. Overall, these changes remove an unnecessary and
implicit dependency on SysBus.

ppc/spapr: QOM'ify sPAPRRTCState

Also use an 'sPAPRRTCState' attribute under the sPAPR machine to hold
the RTC object. Overall, these changes remove an unnecessary and
implicit dependency on SysBus.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# eeb61d4f 03-Mar-2017 Paolo Bonzini <pbonzini@redhat.com>

ppc: avoid typedef redefinitions

These cause compilation failures on CentOS 6 or other operating
systems with older GCCs.

Cc: David Gibson <dgibson@redhat.com>
Cc: qemu-ppc@nongnu.org
Signed-off-by

ppc: avoid typedef redefinitions

These cause compilation failures on CentOS 6 or other operating
systems with older GCCs.

Cc: David Gibson <dgibson@redhat.com>
Cc: qemu-ppc@nongnu.org
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Message-id: 1488558530-21016-3-git-send-email-pbonzini@redhat.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


# ab711e21 02-Mar-2017 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.9-20170301' into staging

ppc patch queue for 2017-03-01

I was hoping to get this pull request squeezed in before the soft
freeze, but I

Merge remote-tracking branch 'remotes/dgibson/tags/ppc-for-2.9-20170301' into staging

ppc patch queue for 2017-03-01

I was hoping to get this pull request squeezed in before the soft
freeze, but I ran into some difficulties during testing. Everything
here was at least posted before the soft freeze, so I'm hoping we can
still merge it for 2.9.

The biggest things here are:
* Cleanups to handling of hashed page tables, that will make
adding support for the POWER9 MMU easier
* Cleanups to the XICS interrupt controller that will make
implementing the powernv machine easier
* TCG implementation of extended overflow and carry handling for
POWER9

It also includes:
* Increasing the CPU limit for pseries to 1024 vCPUs
* Generating proper OF node names in qemu (making hotplug and
coldplug logic closer together)

# gpg: Signature made Wed 01 Mar 2017 04:43:06 GMT
# gpg: using RSA key 0x6C38CACA20D9B392
# gpg: Good signature from "David Gibson <david@gibson.dropbear.id.au>"
# gpg: aka "David Gibson (Red Hat) <dgibson@redhat.com>"
# gpg: aka "David Gibson (ozlabs.org) <dgibson@ozlabs.org>"
# gpg: aka "David Gibson (kernel.org) <dwg@kernel.org>"
# Primary key fingerprint: 75F4 6586 AE61 A66C C44E 87DC 6C38 CACA 20D9 B392

* remotes/dgibson/tags/ppc-for-2.9-20170301: (50 commits)
Add PowerPC 32-bit guest memory dump support
ppc/xics: rename 'ICPState *' variables to 'icp'
ppc/xics: move InterruptStatsProvider to the sPAPR machine
ppc/xics: move ics-simple post_load under the machine
ppc/xics: remove the XICSState classes
ppc/xics: export the XICS init routines
ppc/xics: move the ICP array under the sPAPR machine
ppc/xics: register the reset handler of ICP objects
ppc/xics: simplify spapr_dt_xics() interface
ppc/xics: use the QOM interface to grab an ICP
ppc/xics: move the cpu_setup() handler under the ICPState class
ppc/xics: simplify the cpu_setup() handler
ppc/xics: move kernel_xics_fd out of KVMXICSState
ppc/xics: extend the QOM interface to handle ICPs
ppc/xics: remove the XICS list of ICS
ppc/xics: register the reset handler of ICS objects
ppc/xics: remove xics_find_source()
ppc/xics: use the QOM interface to resend irqs
ppc/xics: use the QOM interface to get irqs
ppc/xics: use the QOM interface under the sPAPR machine
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


# 6449da45 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: move InterruptStatsProvider to the sPAPR machine

It provides a better monitor output of the ICP and ICS objects, else
the objects are printed out of order.

Signed-off-by: Cédric Le Goater

ppc/xics: move InterruptStatsProvider to the sPAPR machine

It provides a better monitor output of the ICP and ICS objects, else
the objects are printed out of order.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# a7ff1212 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: move ics-simple post_load under the machine

The ICS object uses a post_load() handler which is implicitly relying
on the fact that the internal state of the ICS and ICP objects has
been re

ppc/xics: move ics-simple post_load under the machine

The ICS object uses a post_load() handler which is implicitly relying
on the fact that the internal state of the ICS and ICP objects has
been restored but this is not guaranteed. So, let's move the code
under the post_load() handler of the machine where we know the objects
have been fully restored.

The icp_resend() handler of the XICSFabric QOM interface is also
removed as it is now obsolete.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# e6f7e110 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: remove the XICSState classes

The XICSState classes are not used anymore. They have now been fully
deprecated by the XICSFabric QOM interface. Do the cleanups.

Signed-off-by: Cédric Le Goa

ppc/xics: remove the XICSState classes

The XICSState classes are not used anymore. They have now been fully
deprecated by the XICSFabric QOM interface. Do the cleanups.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# 2192a930 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: export the XICS init routines

There is nothing left related to the XICS object in the realize
functions of the KVMXICSState and XICSState class. So adapt the
interfaces to call these routi

ppc/xics: export the XICS init routines

There is nothing left related to the XICS object in the realize
functions of the KVMXICSState and XICSState class. So adapt the
interfaces to call these routines directly from the sPAPR machine init
sequence.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# 852ad27e 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: move the ICP array under the sPAPR machine

This is the last step to remove the XICSState abstraction and have the
machine hold all the objects related to interrupts : ICSs and ICPs.

Signe

ppc/xics: move the ICP array under the sPAPR machine

This is the last step to remove the XICSState abstraction and have the
machine hold all the objects related to interrupts : ICSs and ICPs.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# b0ec3129 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: simplify spapr_dt_xics() interface

spapr_dt_xics() only needs the number of servers to build the device
tree nodes. Let's change the routine interface to reflect that.

Signed-off-by: Cédr

ppc/xics: simplify spapr_dt_xics() interface

spapr_dt_xics() only needs the number of servers to build the device
tree nodes. Let's change the routine interface to reflect that.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# b4f27d71 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: use the QOM interface to grab an ICP

Also introduce a xics_icp_get() helper to simplify the changes.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibs

ppc/xics: use the QOM interface to grab an ICP

Also introduce a xics_icp_get() helper to simplify the changes.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# f0232434 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: move the cpu_setup() handler under the ICPState class

The cpu_setup() handler is currently under the XICSState class but it
really belongs under ICPState as it is setting up an individual

ppc/xics: move the cpu_setup() handler under the ICPState class

The cpu_setup() handler is currently under the XICSState class but it
really belongs under ICPState as it is setting up an individual vCPU.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# bf50860d 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: simplify the cpu_setup() handler

The cpu_setup() handler currently takes a 'XICSState *' argument to
grab the kernel ICP file descriptor. This interface can be simplified
by using the 'xic

ppc/xics: simplify the cpu_setup() handler

The cpu_setup() handler currently takes a 'XICSState *' argument to
grab the kernel ICP file descriptor. This interface can be simplified
by using the 'xics' backlink of the ICP object.

This change is also required by subsequent patches which makes use of
the QOM interface for XICS.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


# b2fc59aa 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: extend the QOM interface to handle ICPs

Let's add two new handlers for ICPs. One is to get an ICP object from
a server number and a second is to resend the irqs when needed.

The icp_resen

ppc/xics: extend the QOM interface to handle ICPs

Let's add two new handlers for ICPs. One is to get an ICP object from
a server number and a second is to resend the irqs when needed.

The icp_resend() handler is a temporary workaround needed by the
ics-simple post_load() handler. It will be removed when the post_load
portion can be done at the machine level.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

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# d114a662 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: remove the XICS list of ICS

This is not used anymore.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <d

ppc/xics: remove the XICS list of ICS

This is not used anymore.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

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# be1fe351 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: remove xics_find_source()

It is not used anymore now that we have the QOM interface for XICS.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbe

ppc/xics: remove xics_find_source()

It is not used anymore now that we have the QOM interface for XICS.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

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# 2cd908d0 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: use the QOM interface to resend irqs

Also change the ICPState 'xics' backlink to be a XICSFabric, this
removes the need of using qdev_get_machine() to get the QOM interface
in some of the

ppc/xics: use the QOM interface to resend irqs

Also change the ICPState 'xics' backlink to be a XICSFabric, this
removes the need of using qdev_get_machine() to get the QOM interface
in some of the routines.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

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# f7759e43 27-Feb-2017 Cédric Le Goater <clg@kaod.org>

ppc/xics: use the QOM interface to get irqs

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.

ppc/xics: use the QOM interface to get irqs

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: David Gibson <david@gibson.dropbear.id.au>
Signed-off-by: David Gibson <david@gibson.dropbear.id.au>

show more ...


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