Merge tag 'pull-include-2023-02-06-v2' of https://repo.or.cz/qemu/armbru into staging

Header cleanup patches for 2023-02-06

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Merge tag 'pull-include-2023-02-06-v2' of https://repo.or.cz/qemu/armbru into staging

Header cleanup patches for 2023-02-06

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# gpg: Signature made Wed 08 Feb 2023 06:28:37 GMT
# gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg: issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full]
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full]
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653

* tag 'pull-include-2023-02-06-v2' of https://repo.or.cz/qemu/armbru:
Drop duplicate #include
Don't include headers already included by qemu/osdep.h
Fix non-first inclusions of qemu/osdep.h
accel: Clean up includes
block: Clean up includes
riscv: Clean up includes
target/hexagon: Clean up includes
net: Clean up includes
migration: Clean up includes
qga: Clean up includes
hw/tricore: Clean up includes
hw/input: Clean up includes
hw/cxl: Clean up includes
crypto: Clean up includes
bsd-user: Clean up includes
scripts/clean-includes: Improve --git commit message
scripts/clean-includes: Skip symbolic links
scripts/clean-includes: Don't claim duplicate headers found when not
scripts/clean-includes: Fully skip / ignore files

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

Don't include headers already included by qemu/osdep.h

This commit was created with scripts/clean-includes.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Christian Schoenebeck <qem

Don't include headers already included by qemu/osdep.h

This commit was created with scripts/clean-includes.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Acked-by: Christian Schoenebeck <qemu_oss@crudebyte.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Message-Id: <20230202133830.2152150-19-armbru@redhat.com>

show more ...

Merge tag 'pull-misc-2022-05-11' of git://repo.or.cz/qemu/armbru into staging

Miscellaneous patches patches for 2022-05-11

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Merge tag 'pull-misc-2022-05-11' of git://repo.or.cz/qemu/armbru into staging

Miscellaneous patches patches for 2022-05-11

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# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 11 May 2022 07:58:10 AM PDT
# gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653
# gpg: issuer "armbru@redhat.com"
# gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [undefined]
# gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653

* tag 'pull-misc-2022-05-11' of git://repo.or.cz/qemu/armbru:
Clean up decorations and whitespace around header guards
Normalize header guard symbol definition
Clean up ill-advised or unusual header guards
Clean up header guards that don't match their file name

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Clean up decorations and whitespace around header guards

Cleaned up with scripts/clean-header-guards.pl.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20220506134911.2856099-5-a

Clean up decorations and whitespace around header guards

Cleaned up with scripts/clean-header-guards.pl.

Signed-off-by: Markus Armbruster <armbru@redhat.com>
Message-Id: <20220506134911.2856099-5-armbru@redhat.com>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210309' into staging

Aspeed patches :

* New model for the Aspeed LPC controller
* Misc cleanups

# gpg: Signature made Tue 09 Mar 2

Merge remote-tracking branch 'remotes/legoater/tags/pull-aspeed-20210309' into staging

Aspeed patches :

* New model for the Aspeed LPC controller
* Misc cleanups

# gpg: Signature made Tue 09 Mar 2021 11:54:25 GMT
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1

* remotes/legoater/tags/pull-aspeed-20210309:
hw/misc: Model KCS devices in the Aspeed LPC controller
hw/misc: Add a basic Aspeed LPC controller model
hw/arm: ast2600: Correct the iBT interrupt ID
hw/arm: ast2600: Set AST2600_MAX_IRQ to value from datasheet
hw/arm: ast2600: Force a multiple of 32 of IRQs for the GIC
hw/arm/aspeed: Fix location of firmware images in documentation
arm/ast2600: Fix SMP booting with -kernel

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

hw/misc: Model KCS devices in the Aspeed LPC controller

Keyboard-Controller-Style devices for IPMI purposes are exposed via LPC
IO cycles from the BMC to the host.

Expose support on the BMC side by

hw/misc: Model KCS devices in the Aspeed LPC controller

Keyboard-Controller-Style devices for IPMI purposes are exposed via LPC
IO cycles from the BMC to the host.

Expose support on the BMC side by implementing the usual MMIO
behaviours, and expose the ability to inspect the KCS registers in
"host" style by accessing QOM properties associated with each register.

The model caters to the IRQ style of both the AST2600 and the earlier
SoCs (AST2400 and AST2500). The AST2600 allocates an IRQ for each LPC
sub-device, while there is a single IRQ shared across all subdevices on
the AST2400 and AST2500.

Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Message-Id: <20210302014317.915120-6-andrew@aj.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...

hw/misc: Add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware add

hw/misc: Add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware address space.

Signed-off-by: Cédric Le Goater <clg@kaod.org>
Signed-off-by: Andrew Jeffery <andrew@aj.id.au>
Message-Id: <20210302014317.915120-5-andrew@aj.id.au>
Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...

hw/misc: Add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware add

hw/misc: Add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware address space.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware add

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware address space.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware add

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware address space.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware add

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware address space.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...

Merge branch 'aspeed-4.0' of github.com:legoater/qemu

* 'aspeed-4.0' of github.com:legoater/qemu:
hw/arm/aspeed: Add RTC to SoC
hw: timer: Add ASPEED RTC device
aspeed: add a LPC controller to

Merge branch 'aspeed-4.0' of github.com:legoater/qemu

* 'aspeed-4.0' of github.com:legoater/qemu:
hw/arm/aspeed: Add RTC to SoC
hw: timer: Add ASPEED RTC device
aspeed: add a LPC controller to the SoC
hw/misc: add a basic Aspeed LPC controller model
aspeed: add a PWM controller to the SoC
hw/misc: Add basic Aspeed PWM model
aspeed: add the UART1 serial
aspeed: add a GPIO controller to the SoC
hw/gpio: Add basic Aspeed GPIO model
ast2400: add a iBT device model
aspeed: add the VUART serial
aspeed: Link SCU to the watchdog
hw/arm: Integrate ADC model into Aspeed SoC
hw/adc: Add basic Aspeed ADC model
memory: Support unaligned accesses on aligned-only models
aspeed/i2c: add support for DMA transfers
aspeed/smc: Calculate checksum on normal DMA
aspeed/smc: inject errors in DMA checksum
aspeed/smc: add DMA calibration settings
aspeed/smc: add support for DMAs
aspeed/smc: add a 'sdram_base' and 'max-ram-size' properties
aspeed/smc: move up the SDRAM Memory controller realization
hw/arm/aspeed: add a 'execute-in-place' property to boot directly from CE0
aspeed/timer: Use signed muldiv for timer resets
aspeed/timer: Provide back-pressure information for short periods
aspeed/timer: Fix match calculations
aspeed/timer: Status register contains reload for stopped timer
aspeed/timer: Fix behaviour running Linux

show more ...

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware add

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware address space.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware add

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware address space.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware add

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware address space.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware add

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware address space.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware add

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware address space.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware add

hw/misc: add a basic Aspeed LPC controller model

This is a very minimal framework to access registers which are used to
configure the AHB memory mapping of the flash chips on the LPC HC
Firmware address space.

Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...