Revision tags: v9.2.0, v9.1.2, v9.1.1 |
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95a16ee7 |
| 17-Oct-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20241016
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZw91kQAKC
Merge tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20241016
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZw91kQAKCRBAov/yOSY+ # 3+RyA/9vpqCesEBch5mzrazO4MT2IxeN2bstF8mY+EyfEwK7Ocg+esRBsigWw56k # y6RDyCzHg200GL9TC8bJ/nMiMJjXrahhHRPVs8AADazMzX/Ys7E7ntvUUnqqANh6 # ZX8fzNJMKW6qeUVrCIwCC7E+KjfNu32dcxbXCF4mZsehIumpUQ== # =uk+a # -----END PGP SIGNATURE----- # gpg: Signature made Wed 16 Oct 2024 09:13:05 BST # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20241016' of https://gitlab.com/gaosong/qemu: hw/loongarch/fw_cfg: Build in common_ss[] hw/loongarch/virt: Remove unnecessary 'cpu.h' inclusion target/loongarch: Avoid bits shift exceeding width of bool type hw/loongarch/virt: Add FDT table support with acpi ged pm register acpi: ged: Add macro for acpi sleep control register
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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25d92888 |
| 27-Sep-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/loongarch/virt: Remove unnecessary 'cpu.h' inclusion
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Thomas Huth <thuth@redhat.c
hw/loongarch/virt: Remove unnecessary 'cpu.h' inclusion
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20240927213254.17552-2-philmd@linaro.org> Signed-off-by: Song Gao <gaosong@loongson.cn>
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Revision tags: v9.1.0 |
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f4bb895a |
| 06-Aug-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'hw-misc-20240806' of https://github.com/philmd/qemu into staging
Misc HW & UI patches
- Replace Loongson IPI with LoongArch IPI on LoongArch Virt machine (Bibo) - SD card: Do not abort w
Merge tag 'hw-misc-20240806' of https://github.com/philmd/qemu into staging
Misc HW & UI patches
- Replace Loongson IPI with LoongArch IPI on LoongArch Virt machine (Bibo) - SD card: Do not abort when reading DAT lines on invalid cmd state (Phil) - SDHCI: Reset @data_count index on invalid ADMA transfers (Phil) - Don't decrement PFlash counter below 0 (Peter) - Explicit a 8bit truncate on IDE ATAPI (Peter) - Silent Coverity warning in ISA FDC (Peter) - Remove dead code in PCI IDE bmdma_prepare_buf (Peter) - Improve OpenGL and related display error messages (Peter) - Set PCI base address register write mask on GC64120 host bridge (Phil) - List PCIe Root Port and PCIe-to-PCI bridge in QEMU PCI IDs list (George)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmayMloACgkQ4+MsLN6t # wN6SFQ//S0WvrFNsCeHphsbPETNwHL72j2XdX9xnt9UJZoBhFitOTCzo/EpNQHJe # dFxCAfef9Nc9WDumyWsb7hE6IGjn/wPpVUnOnoWZZAilA6LK01J0mxgDXNRUf8ES # iRo5x1Zd3oNBcKA9oqCuALkapXYypKCwSlRgvc42ekdYXHG95pFbJv9MmWIYy6Vn # 0+hBWv3+Xegv7oFH4UsbjY844vsFcjupvrEm10bcH/zeYhEWVvXRylyfAQS8ww+U # TYWj9g1i+Cfz+QxKyXovlS21ogieckiTYlr4yM7Ze7fD3Tyj5Q3KRfjC9tD0HoNb # hjTSojfzk9m93/c5nASL7ChbjisJWqewH5J0eVLSMkqDRUsbFbsryJ4bDXIQNSYD # HTko32P5obrDQO6l8rr6zuk1Y8lKBd0cY4fGlynXzsitp7duAqWJeMbD0s0duASW # pqGITK/F/hKHJC6RVDaiFoyGHEa+wm4K6YqfwSFy0EOb5qYq0/d0MAEzTXPB1K1S # mFMF6+Yk7ZfOnYwSDTDGf5hnmSvSLLdY+Ne94g9gLvuIRWCvc5rrjfBzAbnOfeif # EMpFbofkMys5p7kxGUZhkJpRQiRjB11fZl9bplyhjGpPgQrq+E/j0G3Uc7jtkOUO # sjB/4iA7RFvCe47EWqN3WR+rf462EGk2MD+Ebxd9FLsiciFvk1Y= # =jOxG # -----END PGP SIGNATURE----- # gpg: Signature made Wed 07 Aug 2024 12:25:30 AM AEST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
* tag 'hw-misc-20240806' of https://github.com/philmd/qemu: (28 commits) docs/specs/pci-ids: Fix markup docs/specs/pci-ids: Add missing devices hw/pci-host/gt64120: Reset config registers during RESET phase hw/pci-host/gt64120: Set PCI base address register write mask ui/console: Note in '-display help' that some backends support suboptions system/vl.c: Expand OpenGL related errors hw/display/virtio-gpu: Improve "opengl is not available" error message hw/ide/pci: Remove dead code from bmdma_prepare_buf() hw/block/fdc-isa: Assert that isa_fdc_get_drive_max_chs() found something hw/ide/atapi: Be explicit that assigning to s->lcyl truncates hw/block/pflash_cfi01: Don't decrement pfl->counter below 0 hw/sd/sdhci: Reset @data_count index on invalid ADMA transfers hw/sd/sdcard: Do not abort when reading DAT lines on invalid cmd state hw/sd/sdcard: Explicit dummy byte value hw/intc/loongson_ipi: Restrict to MIPS hw/loongarch/virt: Replace Loongson IPI with LoongArch IPI hw/intc/loongarch_ipi: Add loongarch IPI support hw/intc/loongson_ipi: Move common code to loongson_ipi_common.c hw/intc/loongson_ipi: Expose loongson_ipi_core_read/write helpers hw/intc/loongson_ipi: Add LoongsonIPICommonClass::cpu_by_arch_id handler ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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ef2f1145 |
| 15-Jul-2024 |
Bibo Mao <maobibo@loongson.cn> |
hw/loongarch/virt: Replace Loongson IPI with LoongArch IPI
Loongarch IPI inherits from class LoongsonIPICommonClass, and it only contains Loongarch 3A5000 virt machine specific interfaces, rather th
hw/loongarch/virt: Replace Loongson IPI with LoongArch IPI
Loongarch IPI inherits from class LoongsonIPICommonClass, and it only contains Loongarch 3A5000 virt machine specific interfaces, rather than mix different machine implementations together.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> [PMD: Rebased] Co-Developed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Tested-by: Bibo Mao <maobibo@loongson.cn> Acked-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Tested-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Message-Id: <20240805180622.21001-14-philmd@linaro.org>
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a87a7c44 |
| 19-Jul-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-loongarch-20240719' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20240719
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZpnSRQAKC
Merge tag 'pull-loongarch-20240719' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20240719
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZpnSRQAKCRBAov/yOSY+ # 3+dmBACzIzU+nnCI0QANYJhEVekXUoo+UVa+PX4dk7OoACDSgq2nQkAQzUoqhzSj # zjnxTmIevdcUqQ6eU24hNwOT7DEZBk0MIcTZMuG8DRc1wbSo46ORfVGWQkPtMQ25 # ADNS0q/TPnYMtMEfXn2xN/0QrpR99HN8wOVNmYH5/D6/zHMFOw== # =Vo1H # -----END PGP SIGNATURE----- # gpg: Signature made Fri 19 Jul 2024 12:41:09 PM AEST # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20240719' of https://gitlab.com/gaosong/qemu: hw/loongarch: Modify flash block size to 256K hw/loongarch: Remove unimplemented extioi INT_encode mode target/loongarch/gdbstub: Add vector registers support
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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3ed016f5 |
| 23-Jun-2024 |
Xianglai Li <lixianglai@loongson.cn> |
hw/loongarch: Modify flash block size to 256K
loongarch added a common library for edk2 to parse flash base addresses through fdt. For compatibility with other architectures, the flash block size in
hw/loongarch: Modify flash block size to 256K
loongarch added a common library for edk2 to parse flash base addresses through fdt. For compatibility with other architectures, the flash block size in qemu is now changed to 256k.
Signed-off-by: Xianglai Li <lixianglai@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20240624033319.999631-1-lixianglai@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
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dec9742c |
| 06-Jun-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-loongarch-20240606' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20240606
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZmE0HwAKC
Merge tag 'pull-loongarch-20240606' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20240606
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZmE0HwAKCRBAov/yOSY+ # 396sA/90m/zr91pLQlkhFuYLHg958Ow3L5ysblcuAAmcTXGi8iE9IeTTeZru6WEO # H/CL/njUkIgP+/Tio0n0Lx6rWkxOzGxWCpvzqrabsPGvs4GUtFEjI/2pvEWP6C9/ # S6Jon3py0oZeoVx8D6Tr/CJrhD0IBptbEn1aiQNDRuSzeuCo1Q== # =xpjH # -----END PGP SIGNATURE----- # gpg: Signature made Wed 05 Jun 2024 08:59:27 PM PDT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20240606' of https://gitlab.com/gaosong/qemu: target/loongarch: fix a wrong print in cpu dump hw/loongarch/virt: Enable extioi virt extension hw/loongarch/virt: Use MemTxAttrs interface for misc ops hw/intc/loongarch_extioi: Add extioi virt extension definition tests/qtest: Add numa test for loongarch system tests/libqos: Add loongarch virt machine node
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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2b284fa9 |
| 28-May-2024 |
Song Gao <gaosong@loongson.cn> |
hw/loongarch/virt: Enable extioi virt extension
This patch adds a new board attribute 'v-eiointc'. A value of true enables the virt extended I/O interrupt controller. VMs working in kvm mode have 'v
hw/loongarch/virt: Enable extioi virt extension
This patch adds a new board attribute 'v-eiointc'. A value of true enables the virt extended I/O interrupt controller. VMs working in kvm mode have 'v-eiointc' enabled by default.
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240528083855.1912757-4-gaosong@loongson.cn>
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1a648f7a |
| 08-May-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'hw-misc-20240508' of https://github.com/philmd/qemu into staging
Misc HW patches
- Few more g_memdup() replaced by safer g_memdup2() wrapper (Phil) - Endianness access fixed in vfio-user
Merge tag 'hw-misc-20240508' of https://github.com/philmd/qemu into staging
Misc HW patches
- Few more g_memdup() replaced by safer g_memdup2() wrapper (Phil) - Endianness access fixed in vfio-user config space (Mattias) - Replace qemu_mutex_lock() -> QEMU_LOCK_GUARD in system/physmem (Phil) - Per-AddressSpace bounce buffering (Mattias) - Allow to compile x86 PC machines without Floppy Controller (Thomas) - Cleanups around i386 "isa-bios" memory regions (Bernhard) - Remove unused usb rndis_config_parameter structure (David) - Migrate missing clock in STM32L4x5 GPIOs (Inès) - Deprecate PPC 'ref405ep' machine and 405 CPUs (Cédric) - Memory leak fixed in Loongarch Virt machine (Song Gao) - hw/loongarch/ code moved around (Paolo & Bibo Mao) - Emulate S3 suspend in loongson3_virt machine (Jiaxun) - Implement IOCSR address space in Loongson IPI (Jiaxun) - Use QEMU header path relative to include/ directory (Phil)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmY7+NgACgkQ4+MsLN6t # wN4QdhAAnPGMoIGubXiZjrEmCuDU117Hm//g3wFdirn6pSr3XFWk+LGHurpgWzwf # 6AG2ERE6ouEqbZmhfnkLA9/3cSuS/6YgCDxfQ/2Z5N7hy5+GaG60paIk2iw4wJc+ # z+3EBBNp1MKP7etP/f7XvBbempOGHSENvH83ZEKTXln6oYe/HQWBoTChV/W6Uczv # Txf45DJ6QPPQl7cBYqtLpg9Nmc4g6d3M5t5YWzkBrecvXiBlKdZnEsI5CBtmXM8D # h7+wIyNMl0Nc3DgQWN1SsARFDUyHG4bE4K6MS2KkGLkfFF84o8rRtEPV0RvsT+g6 # 0VkhZqLf+Gdq2w1IxCt1k5VCx8HK25+zWZypXlXY1o1dbfssqqbvXEh+3sws67eJ # 4Hn+8QIXZBsl/zUxBbw5/CVYTHmy4Aosc1TItvDsCPnlicfV2phKSxADlL/WJCCU # IQBwDMtxNwYM/QMP3bRIN0xNNSpB0+kOzfkRf1hVQmxH+ObqIvvIA+RbI6NhjM3L # qXw5o0+FltLg7kPGk4Fo/rlhfnydRAE/swrwYd3WRp0sKjDe0lV3r7Bu+FZ4imdB # 4u24FJK8ygcQOKiyHEX9cEkKruYAXeFmI3WglimYe5Po2LvIonsRLiqX97CGhgDX # UM9Oo0Sr/0NnV7FnOW75OijNa2PE7pLVgWDjM3Xefmltqui7F/M= # =uOIs # -----END PGP SIGNATURE----- # gpg: Signature made Thu 09 May 2024 12:12:40 AM CEST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
* tag 'hw-misc-20240508' of https://github.com/philmd/qemu: (28 commits) misc: Use QEMU header path relative to include/ directory hw/intc/loongson_ipi: Implement IOCSR address space for MIPS hw/intc/loongarch_ipi: Rename as loongson_ipi hw/intc/loongarch_ipi: Remove pointless MAX_CPU check hw/mips/loongson3_virt: Emulate suspend function hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineState hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINE hw/loongarch/virt: Fix memory leak hw/loongarch: move memory map to boot.c hw/ppc: Deprecate 'ref405ep' machine and 405 CPUs hw/gpio: Handle clock migration in STM32L4x5 gpios hw/usb/dev-network: Remove unused struct 'rndis_config_parameter' hw/i386/x86: Extract x86_isa_bios_init() from x86_bios_rom_init() hw/i386/x86: Don't leak "pc.bios" memory region hw/i386/x86: Don't leak "isa-bios" memory regions hw/i386: Have x86_bios_rom_init() take X86MachineState rather than MachineState hw/i386/x86: Eliminate two if statements in x86_bios_rom_init() hw/i386: Add the possibility to use i440fx and isapc without FDC hw/i386/Kconfig: Allow to compile Q35 without FDC_ISA hw/i386/pc: Allow to compile without CONFIG_FDC_ISA ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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b4a12dfc |
| 08-May-2024 |
Jiaxun Yang <jiaxun.yang@flygoat.com> |
hw/intc/loongarch_ipi: Rename as loongson_ipi
This device will be shared among LoongArch and MIPS based Loongson machine, rename it as loongson_ipi to reflect this nature.
Signed-off-by: Jiaxun Yan
hw/intc/loongarch_ipi: Rename as loongson_ipi
This device will be shared among LoongArch and MIPS based Loongson machine, rename it as loongson_ipi to reflect this nature.
Signed-off-by: Jiaxun Yang <jiaxun.yang@flygoat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240508-loongson3-ipi-v1-2-1a7b67704664@flygoat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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d804ad98 |
| 07-May-2024 |
Bibo Mao <maobibo@loongson.cn> |
hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineState
Rename LoongArchMachineState with LoongArchVirtMachineState, and change variable name LoongArchMachineState *lams with Loong
hw/loongarch: Rename LoongArchMachineState with LoongArchVirtMachineState
Rename LoongArchMachineState with LoongArchVirtMachineState, and change variable name LoongArchMachineState *lams with LoongArchVirtMachineState *lvms.
Rename function specific for virtmachine loongarch_xxx() with virt_xxx(). However some common functions keep unchanged such as loongarch_acpi_setup()/loongarch_load_kernel(), since there functions can be used for real hw boards.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240508031110.2507477-3-maobibo@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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df0d93c1 |
| 07-May-2024 |
Bibo Mao <maobibo@loongson.cn> |
hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINE
On LoongArch system, there is only virt machine type now, name LOONGARCH_MACHINE is confused, rename it with LOONGARCH_VIRT_MACHINE
hw/loongarch: Rename LOONGARCH_MACHINE with LOONGARCH_VIRT_MACHINE
On LoongArch system, there is only virt machine type now, name LOONGARCH_MACHINE is confused, rename it with LOONGARCH_VIRT_MACHINE. Machine name about Other real hw boards can be added in future.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-ID: <20240508031110.2507477-2-maobibo@loongson.cn> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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72674db0 |
| 07-May-2024 |
Paolo Bonzini <pbonzini@redhat.com> |
hw/loongarch: move memory map to boot.c
Ensure that it can be used even if virt.c is not included in the build, as is the case for --without-default-devices.
Signed-off-by: Paolo Bonzini <pbonzini@
hw/loongarch: move memory map to boot.c
Ensure that it can be used even if virt.c is not included in the build, as is the case for --without-default-devices.
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com> Acked-by: Richard Henderson <richard.henderson@linaro.org> Message-ID: <20240507145135.270803-1-pbonzini@redhat.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
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de7e907d |
| 30-Apr-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-loongarch-20240429' of https://gitlab.com/gaosong/qemu into staging
Add boot LoongArch elf kernel with FDT
v2: Fix 'make check-tcg' fail.
# -----BEGIN PGP SIGNATURE----- # # iLMEAA
Merge tag 'pull-loongarch-20240429' of https://gitlab.com/gaosong/qemu into staging
Add boot LoongArch elf kernel with FDT
v2: Fix 'make check-tcg' fail.
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZi8F3AAKCRBAov/yOSY+ # 35VrBADb6f1mYNUTG5iDvKppvA8RG1TybxfXfgA+Z9vPkJqFkT6wt8J+JFwgh3UT # w0xY2Y2xZkPjxnUpEhZiVJjp5hk+BEzr3vE4M5DzKC1vpCYpbojxxN6FB41Up862 # kS7slW6XsZgKpLLvUkFttPt3G4DUN29CscVgy4Ci0zrqyNjnsw== # =ufbc # -----END PGP SIGNATURE----- # gpg: Signature made Sun 28 Apr 2024 07:28:44 PM PDT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20240429' of https://gitlab.com/gaosong/qemu: hw/loongarch: Add cells missing from rtc node hw/loongarch: Add cells missing from uart node hw/loongarch: fdt remove unused irqchip node hw/loongarch: fdt adds pcie irq_map node hw/loongarch: fdt adds pch_msi Controller hw/loongarch: fdt adds pch_pic Controller hw/loongarch: fdt adds Extend I/O Interrupt Controller hw/loongarch: fdt adds cpu interrupt controller node hw/loongarch: Fix fdt memory node wrong 'reg' hw/loongarch: Init efi_fdt table hw/loongarch: Init efi_initrd table hw/loongarch: Init efi_boot_memmap table hw/loongarch: Init efi_system_table hw/loongarch: Add init_cmdline hw/loongarch: Add slave cpu boot_code hw/loongarch: Add load initrd hw/loongarch: Move boot functions to boot.c
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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60423851 |
| 26-Apr-2024 |
Song Gao <gaosong@loongson.cn> |
hw/loongarch: Init efi_fdt table
The efi_system_table adds a efi_fdt configuration table.
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <2024
hw/loongarch: Init efi_fdt table
The efi_system_table adds a efi_fdt configuration table.
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-9-gaosong@loongson.cn>
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252b8e68 |
| 26-Apr-2024 |
Song Gao <gaosong@loongson.cn> |
hw/loongarch: Init efi_boot_memmap table
The efi_system_table adds a efi_boot_memmap configuration table.
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> M
hw/loongarch: Init efi_boot_memmap table
The efi_system_table adds a efi_boot_memmap configuration table.
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-7-gaosong@loongson.cn>
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58ee60d2 |
| 26-Apr-2024 |
Song Gao <gaosong@loongson.cn> |
hw/loongarch: Add init_cmdline
Add init_cmline and set boot_info->a0, a1
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.239786
hw/loongarch: Add init_cmdline
Add init_cmline and set boot_info->a0, a1
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Message-Id: <20240426091551.2397867-5-gaosong@loongson.cn>
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d771ca1c |
| 26-Apr-2024 |
Song Gao <gaosong@loongson.cn> |
hw/loongarch: Move boot functions to boot.c
Move some boot functions to boot.c and struct loongarch_boot_info into struct LoongArchMachineState.
Signed-off-by: Song Gao <gaosong@loongson.cn> Review
hw/loongarch: Move boot functions to boot.c
Move some boot functions to boot.c and struct loongarch_boot_info into struct LoongArchMachineState.
Signed-off-by: Song Gao <gaosong@loongson.cn> Reviewed-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-Id: <20240426091551.2397867-2-gaosong@loongson.cn>
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b21d5fd1 |
| 01-Mar-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-loongarch-20240229' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20240229
V2: fix build error on mipsel
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v
Merge tag 'pull-loongarch-20240229' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20240229
V2: fix build error on mipsel
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZeBrwAAKCRBAov/yOSY+ # 33YXA/4+A5Bpe/3+mSAWZSUlluGTqUi0ILBYRMyX1RXovMx4uCRGr7PXzAf03yKS # MZzlVzTuOK69WmTm/iTdYWOxkXisC3gzxL/wm8hP4lzh4c0dHrHRsKHqq6gR3+t2 # ojdZn7TefeflnNqIhxXxgxb1OETofhBNnBJ74pvqxO7XV5SWnA== # =J2Kb # -----END PGP SIGNATURE----- # gpg: Signature made Thu 29 Feb 2024 11:34:24 GMT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20240229' of https://gitlab.com/gaosong/qemu: loongarch: Change the UEFI loading mode to loongarch
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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c6e9847f |
| 19-Feb-2024 |
Xianglai Li <lixianglai@loongson.cn> |
loongarch: Change the UEFI loading mode to loongarch
The UEFI loading mode in loongarch is very different from that in other architectures:loongarch's UEFI code is in rom, while other architectures'
loongarch: Change the UEFI loading mode to loongarch
The UEFI loading mode in loongarch is very different from that in other architectures:loongarch's UEFI code is in rom, while other architectures' UEFI code is in flash.
loongarch UEFI can be loaded as follows: -machine virt,pflash=pflash0-format -bios ./QEMU_EFI.fd
Other architectures load UEFI using the following methods: -machine virt,pflash0=pflash0-format,pflash1=pflash1-format
loongarch's UEFI loading method makes qemu and libvirt incompatible when using NVRAM, and the cost of loongarch's current loading method far outweighs the benefits, so we decided to use the same UEFI loading scheme as other architectures.
Cc: Andrea Bolognani <abologna@redhat.com> Cc: maobibo@loongson.cn Cc: Philippe Mathieu-Daudé <philmd@linaro.org> Cc: Song Gao <gaosong@loongson.cn> Cc: zhaotianrui@loongson.cn Signed-off-by: Xianglai Li <lixianglai@loongson.cn> Tested-by: Andrea Bolognani <abologna@redhat.com> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <0bd892aa9b88e0f4cc904cb70efd0251fc1cde29.1708336919.git.lixianglai@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
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5429a82c |
| 11-Jan-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-loongarch-20240111' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20240111
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZZ/QKgAKC
Merge tag 'pull-loongarch-20240111' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20240111
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZZ/QKgAKCRBAov/yOSY+ # 34eqBADA48++Z9gETFNheLUHdYEaja2emn+gSaoHLFquyq/l53w8RfrUII+BzV1o # T7D8xjlVQldAYZzqQn2pQe2S7r4ggfeNmxGxwJbCTW9sooGMwBnU8+Ix3ruSet7K # gI+UHLU4oHk6jdrT384tux2EG+qUmlLN1c7j4G/z1OzKEwFv7Q== # =+Pi0 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 11 Jan 2024 11:25:30 GMT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20240111' of https://gitlab.com/gaosong/qemu: hw/intc/loongarch_extioi: Add vmstate post_load support hw/intc/loongarch_extioi: Add dynamic cpu number support hw/loongarch/virt: Set iocsr address space per-board rather than percpu hw/intc/loongarch_ipi: Use MemTxAttrs interface for ipi ops target/loongarch: Add loongarch kvm into meson build target/loongarch: Implement set vcpu intr for kvm target/loongarch: Restrict TCG-specific code target/loongarch: Implement kvm_arch_handle_exit target/loongarch: Implement kvm_arch_init_vcpu target/loongarch: Implement kvm_arch_init function target/loongarch: Implement kvm get/set registers target/loongarch: Supplement vcpu env initial when vcpu reset target/loongarch: Define some kvm_arch interfaces linux-headers: Synchronize linux headers from linux v6.7.0-rc8
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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5e90b8db |
| 12-Dec-2023 |
Bibo Mao <maobibo@loongson.cn> |
hw/loongarch/virt: Set iocsr address space per-board rather than percpu
LoongArch system has iocsr address space, most iocsr registers are per-board, however some iocsr register spaces banked for pe
hw/loongarch/virt: Set iocsr address space per-board rather than percpu
LoongArch system has iocsr address space, most iocsr registers are per-board, however some iocsr register spaces banked for percpu such as ipi mailbox and extioi interrupt status. For banked iocsr space, each cpu has the same iocsr space, but separate data.
This patch changes iocsr address space per-board rather percpu, for iocsr registers specified for cpu, MemTxAttrs.requester_id can be parsed for the cpu. With this patches, the total address space on board will be simple, only iocsr address space and system memory, rather than the number of cpu and system memory.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20231215100333.3933632-3-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
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80f1709a |
| 21-Dec-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-loongarch-20231221' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20231221
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZYPyvQAKC
Merge tag 'pull-loongarch-20231221' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20231221
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZYPyvQAKCRBAov/yOSY+ # 38/vBADT3b+Wo/2AeXOO3OXOM1VBhIvzDjY1OWytuJpkF3JGW45cMLqgtIgMj8h7 # NtzRS3JbFYbYuxITeeo1Ppl6dAD0pCZjIU6OCBxAJ6ADPsE/xD8nYWrMGqYVXg7E # hN0Cno2sf6dmJ0QxUxn7G+cUuvNtnGaDSZE+RAkjtzq1nvx7CQ== # =mte5 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 21 Dec 2023 03:09:33 EST # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20231221' of https://gitlab.com/gaosong/qemu: target/loongarch: Add timer information dump support hw/loongarch/virt: Align high memory base address with super page size
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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57861629 |
| 26-Nov-2023 |
Bibo Mao <maobibo@loongson.cn> |
hw/loongarch/virt: Align high memory base address with super page size
With LoongArch virt machine, there is low memory space with region 0--0x10000000, and high memory space with started from 0x900
hw/loongarch/virt: Align high memory base address with super page size
With LoongArch virt machine, there is low memory space with region 0--0x10000000, and high memory space with started from 0x90000000. High memory space is aligned with 256M, it will be better if it is aligned with 1G, which is super page aligned for 4K page size.
Currently linux kernel and uefi bios has no limitation with high memory base address, it is ok to set high memory base address with 0x80000000.
Signed-off-by: Bibo Mao <maobibo@loongson.cn> Reviewed-by: Song Gao <gaosong@loongson.cn> Message-Id: <20231127040231.4123715-1-maobibo@loongson.cn> Signed-off-by: Song Gao <gaosong@loongson.cn>
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9390f0fd |
| 16-Oct-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-loongarch-20231013' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20231013
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZSimNQAKC
Merge tag 'pull-loongarch-20231013' of https://gitlab.com/gaosong/qemu into staging
pull-loongarch-20231013
# -----BEGIN PGP SIGNATURE----- # # iLMEAAEKAB0WIQS4/x2g0v3LLaCcbCxAov/yOSY+3wUCZSimNQAKCRBAov/yOSY+ # 33XwBADF9ZKlESDBDa/huNFAKD7BsUIdglHfz9lHnLY+kQbCun4HyTLtp2IBsySu # mZTjdfU/LnaBidFLjEnmZZMPyiI3oV1ruSzT53egSDaxrFUXGpc9oxtMNLsyfk9P # swdngG13Fc9sWVKC7IJeYDYXgkvHY7NxsiV8U9vdqXOyw2uoHA== # =ufPc # -----END PGP SIGNATURE----- # gpg: Signature made Thu 12 Oct 2023 22:06:45 EDT # gpg: using RSA key B8FF1DA0D2FDCB2DA09C6C2C40A2FFF239263EDF # gpg: Good signature from "Song Gao <m17746591750@163.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: B8FF 1DA0 D2FD CB2D A09C 6C2C 40A2 FFF2 3926 3EDF
* tag 'pull-loongarch-20231013' of https://gitlab.com/gaosong/qemu: LoongArch: step down as general arch maintainer hw/loongarch/virt: Remove unused 'loongarch_virt_pm' region hw/loongarch/virt: Remove unused ISA Bus hw/loongarch/virt: Remove unused ISA UART hw/loongarch: remove global loaderparams variable target/loongarch: Add preldx instruction target/loongarch: fix ASXE flag conflict
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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