Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0, v8.0.0 |
|
#
00b1faea |
| 23-Jan-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20230123' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Widen cnthctl_el2 to uint64_t * Unify checking for M Main Extension in MRS/
Merge tag 'pull-target-arm-20230123' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Widen cnthctl_el2 to uint64_t * Unify checking for M Main Extension in MRS/MSR * bitbang_i2c, versatile_i2c: code cleanups * SME: refactor SME SM/ZA handling * Fix physical address resolution for MTE * Fix in_debug path in S1_ptw_translate * Don't set EXC_RETURN.ES if Security Extension not present * Implement DBGCLAIM registers * Provide stubs for more external debug registers * Look up ARMCPRegInfo at runtime, not translate time
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmPOjQQZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3vreD/sGr7outToY4FSZ4GGpC1L6 # ZwF6kjmwED/8EVaGZxWOaL2/oNoEav2YSpzUbqCa79jUx5zFBE145zYknL/bZyjS # VLX9G2vFFCtwFQ9rc2wV/3JmTmMmSCnHqOZPMSVy5vrQKH6d41WFYZEvGpJmCgh6 # YWK4gnMqkuIHmSvxw+S6q9p/3jzPk7c3vy8eRcxp+AMnfSBkYu0kFXmr7yOwscRS # adT8GFrkj0our/HtYqvzclVzrxcCVF1pWrtrHK7ZSddmElIcztel+1/yQH3T6onj # aOyRj1WC3+0t9uKwUNTFSHkRUqMqr6XYvRF+cvpe5N7lbfVn57u2TwmPgUwYbZcg # 8Mbz+LRYENzTYZa59ACxJXXcG0BivXiTwyrFR8Ck0vakcWFAjDzxHOw9CgHkDwPs # Dd93b04esehIN7MY8/5CSkbx+8ey+YK+o7sofiDCMKcYwooM1Y+Ls21ZcjA5GH+n # SsXp93SgagndCydD0ftRUlDTtGL7dhzaGpRmYArjeWzOKBbAmv/WfQeH47p3bpaP # CB2RUjHzYobMGLO0yp9droOaVKqKKLtc7wGzxgJGx6j5FrN0lnCEMRrKrZJ57Q/q # z4VoRoo0I6Q994/mVanGqXx8cSucyl0Z3HbC633WvrnZXzoM7+7HlQLhpF+yd9+s # 4lHiw0rPgqXtwEfeMaESSQ== # =ubIU # -----END PGP SIGNATURE----- # gpg: Signature made Mon 23 Jan 2023 13:35:00 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20230123' of https://git.linaro.org/people/pmaydell/qemu-arm: (26 commits) target/arm: Look up ARMCPRegInfo at runtime target/arm: Reorg do_coproc_insn target/arm: provide stubs for more external debug registers target/arm: implement DBGCLAIM registers target/arm: Don't set EXC_RETURN.ES if Security Extension not present target/arm: Fix in_debug path in S1_ptw_translate target/arm: Fix physical address resolution for MTE target/arm/sme: Unify set_pstate() SM/ZA helpers as set_svcr() target/arm/sme: Rebuild hflags in aarch64_set_svcr() target/arm/sme: Reset ZA state in aarch64_set_svcr() target/arm/sme: Reset SVE state in aarch64_set_svcr() target/arm/sme: Introduce aarch64_set_svcr() target/arm/sme: Rebuild hflags in set_pstate() helpers target/arm/sme: Reorg SME access handling in handle_msr_i() hw/i2c/versatile_i2c: Rename versatile_i2c -> arm_sbcon_i2c hw/i2c/versatile_i2c: Use ARM_SBCON_I2C() macro hw/i2c/versatile_i2c: Replace TYPE_VERSATILE_I2C -> TYPE_ARM_SBCON_I2C hw/i2c/versatile_i2c: Replace VersatileI2CState -> ArmSbconI2CState hw/i2c/versatile_i2c: Drop useless casts from void * to pointer hw/i2c/bitbang_i2c: Convert DPRINTF() to trace events ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
550da1cc |
| 10-Jan-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/i2c/versatile_i2c: Replace TYPE_VERSATILE_I2C -> TYPE_ARM_SBCON_I2C
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message
hw/i2c/versatile_i2c: Replace TYPE_VERSATILE_I2C -> TYPE_ARM_SBCON_I2C
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230110082508.24038-4-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
92518611 |
| 10-Jan-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/i2c/versatile_i2c: Replace VersatileI2CState -> ArmSbconI2CState
In order to rename TYPE_VERSATILE_I2C as TYPE_ARM_SBCON_I2C (the formal ARM naming), start renaming its state.
Signed-off-by: Phi
hw/i2c/versatile_i2c: Replace VersatileI2CState -> ArmSbconI2CState
In order to rename TYPE_VERSATILE_I2C as TYPE_ARM_SBCON_I2C (the formal ARM naming), start renaming its state.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230110082508.24038-3-philmd@linaro.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
Revision tags: v7.2.0 |
|
#
ec11dc41 |
| 11-May-2022 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-misc-2022-05-11' of git://repo.or.cz/qemu/armbru into staging
Miscellaneous patches patches for 2022-05-11
# -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AO
Merge tag 'pull-misc-2022-05-11' of git://repo.or.cz/qemu/armbru into staging
Miscellaneous patches patches for 2022-05-11
# -----BEGIN PGP SIGNATURE----- # # iQJGBAABCAAwFiEENUvIs9frKmtoZ05fOHC0AOuRhlMFAmJ7zwISHGFybWJydUBy # ZWRoYXQuY29tAAoJEDhwtADrkYZThuAQAJdSuj5fpY8EXxhuS3Rc8uHPrz6lP+nZ # kwxKPOldwFdmkXRJ8qrjcc/BXxiJU3pxmSRvFZ8miCFMrb4Vd16sUzD6PeKb1jr8 # JsrvXcsaWn4f/p0v0WraamwSQeZUMjqsZPgZut93qfJoKmgTaxoZnR+ZDHFKoQJS # qBrHL/5+RPxSugLa6IEpSQwy80jd0tMBaG/e8V+JxzgFM5jzOExwXtfUujzS92Lr # NgapnbEZrpqErBC1xhpetQ8Q5I4r0kkLj4Exm/ClNtIM2GByJxI8x2DE+NJZNDnm # g/tvVKUhEl6cOywQRajAJ/LrhUpVSkz6wsczv35rhRS+1FoCb+PRKr42SxZGI2rB # tZLYt4ouoSGk2pYiudoIBKsIR1Svu7Cmg4YzOL9yvqF0BS3cRDvPgm3QFvoeErjL # EML7b41zLdIkbvujsJ7HJqVL44QmMSu13PcLUtDvLh+ivpL9wIUQn3ji+rfsgqh+ # RYw4niJ9JO3N3/VwEhlymc9kRSTgZ6rdIWPrtQ5ACwTADAv30++opxAlksE6mo0m # TYrqyTG2FHGOKm+5Q4Lyx1heHJDUAE3dlRIhGt8KqD6UKlpSfIVIUU2ztjZK4JQ5 # n85LOLZkE9ejbvbpnLX8hgKfouVKKYwFagc/ZA649cIXvC8YDxdOwvhjEVCxa+V5 # dQbpQsekXf9G # =jOTx # -----END PGP SIGNATURE----- # gpg: Signature made Wed 11 May 2022 07:58:10 AM PDT # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [undefined] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* tag 'pull-misc-2022-05-11' of git://repo.or.cz/qemu/armbru: Clean up decorations and whitespace around header guards Normalize header guard symbol definition Clean up ill-advised or unusual header guards Clean up header guards that don't match their file name
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
show more ...
|
#
52581c71 |
| 06-May-2022 |
Markus Armbruster <armbru@redhat.com> |
Clean up header guards that don't match their file name
Header guard symbols should match their file name to make guard collisions less likely.
Cleaned up with scripts/clean-header-guards.pl, follo
Clean up header guards that don't match their file name
Header guard symbols should match their file name to make guard collisions less likely.
Cleaned up with scripts/clean-header-guards.pl, followed by some renaming of new guard symbols picked by the script to better ones.
Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20220506134911.2856099-2-armbru@redhat.com> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> [Change to generated file ebpf/rss.bpf.skeleton.h backed out]
show more ...
|
Revision tags: v7.0.0, v6.2.0, v6.1.0, v5.2.0 |
|
#
f4ef8c9c |
| 11-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM boilerplate cleanup
Documentation build fix: * memory: Remove kernel-doc comment marker (Eduardo Habk
Merge remote-tracking branch 'remotes/ehabkost/tags/machine-next-pull-request' into staging
QOM boilerplate cleanup
Documentation build fix: * memory: Remove kernel-doc comment marker (Eduardo Habkost)
QOM cleanups: * Rename QOM macros for consistency between TYPE_* and type checking constants (Eduardo Habkost)
QOM new macros: * OBJECT_DECLARE_* and OBJECT_DEFINE_* macros (Daniel P. Berrangé) * DECLARE_*_CHECKER macros (Eduardo Habkost)
Automated QOM boilerplate changes: * Automated changes to use DECLARE_*_CHECKER (Eduardo Habkost * Automated changes to use OBJECT_DECLARE* (Eduardo Habkost)
# gpg: Signature made Thu 10 Sep 2020 19:17:49 BST # gpg: using RSA key 5A322FD5ABC4D3DBACCFD1AA2807936F984DC5A6 # gpg: issuer "ehabkost@redhat.com" # gpg: Good signature from "Eduardo Habkost <ehabkost@redhat.com>" [full] # Primary key fingerprint: 5A32 2FD5 ABC4 D3DB ACCF D1AA 2807 936F 984D C5A6
* remotes/ehabkost/tags/machine-next-pull-request: (33 commits) virtio-vga: Use typedef name for instance_size vhost-user-vga: Use typedef name for instance_size xilinx_axienet: Use typedef name for instance_size lpc_ich9: Use typedef name for instance_size omap_intc: Use typedef name for instance_size xilinx_axidma: Use typedef name for instance_size tusb6010: Rename TUSB to TUSB6010 pc87312: Rename TYPE_PC87312_SUPERIO to TYPE_PC87312 vfio: Rename PCI_VFIO to VFIO_PCI usb: Rename USB_SERIAL_DEV to USB_SERIAL sabre: Rename SABRE_DEVICE to SABRE rs6000_mc: Rename RS6000MC_DEVICE to RS6000MC filter-rewriter: Rename FILTER_COLO_REWRITER to FILTER_REWRITER esp: Rename ESP_STATE to ESP ahci: Rename ICH_AHCI to ICH9_AHCI vmgenid: Rename VMGENID_DEVICE to TYPE_VMGENID vfio: Rename VFIO_AP_DEVICE_TYPE to TYPE_VFIO_AP_DEVICE dev-smartcard-reader: Rename CCID_DEV_NAME to TYPE_USB_CCID_DEV ap-device: Rename AP_DEVICE_TYPE to TYPE_AP_DEVICE gpex: Fix type checking function name ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
8110fa1d |
| 31-Aug-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Use DECLARE_*CHECKER* macros
Generated using:
$ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]')
Reviewed-by: Daniel P. Berrangé <berrange@redha
Use DECLARE_*CHECKER* macros
Generated using:
$ ./scripts/codeconverter/converter.py -i \ --pattern=TypeCheckMacro $(git grep -l '' -- '*.[ch]')
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-12-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-13-ehabkost@redhat.com> Message-Id: <20200831210740.126168-14-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
show more ...
|
#
db1015e9 |
| 03-Sep-2020 |
Eduardo Habkost <ehabkost@redhat.com> |
Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TY
Move QOM typedefs and add missing includes
Some typedefs and macros are defined after the type check macros. This makes it difficult to automatically replace their definitions with OBJECT_DECLARE_TYPE.
Patch generated using:
$ ./scripts/codeconverter/converter.py -i \ --pattern=QOMStructTypedefSplit $(git grep -l '' -- '*.[ch]')
which will split "typdef struct { ... } TypedefName" declarations.
Followed by:
$ ./scripts/codeconverter/converter.py -i --pattern=MoveSymbols \ $(git grep -l '' -- '*.[ch]')
which will: - move the typedefs and #defines above the type check macros - add missing #include "qom/object.h" lines if necessary
Reviewed-by: Daniel P. Berrangé <berrange@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-9-ehabkost@redhat.com> Reviewed-by: Juan Quintela <quintela@redhat.com> Message-Id: <20200831210740.126168-10-ehabkost@redhat.com> Message-Id: <20200831210740.126168-11-ehabkost@redhat.com> Signed-off-by: Eduardo Habkost <ehabkost@redhat.com>
show more ...
|
#
d4b78317 |
| 23-Jun-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200623' into staging
target-arm queue: * util/oslib-posix : qemu_init_exec_dir implementation for Mac * target/arm: Last parts
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200623' into staging
target-arm queue: * util/oslib-posix : qemu_init_exec_dir implementation for Mac * target/arm: Last parts of neon decodetree conversion * hw/arm/virt: Add 5.0 HW compat props * hw/watchdog/cmsdk-apb-watchdog: Add trace event for lock status * mps2: Add CMSDK APB watchdog, FPGAIO block, S2I devices and I2C devices * mps2: Add some unimplemented-device stubs for audio and GPIO * mps2-tz: Use the ARM SBCon two-wire serial bus interface * target/arm: Check supported KVM features globally (not per vCPU) * tests/qtest/arm-cpu-features: Add feature setting tests * arm/virt: Add memory hot remove support
# gpg: Signature made Tue 23 Jun 2020 12:38:31 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20200623: (42 commits) arm/virt: Add memory hot remove support tests/qtest/arm-cpu-features: Add feature setting tests target/arm: Check supported KVM features globally (not per vCPU) hw/arm/mps2-tz: Use the ARM SBCon two-wire serial bus interface hw/arm/mps2: Add audio I2S interface as unimplemented device hw/arm/mps2: Add I2C devices hw/arm/mps2: Add SPI devices hw/arm/mps2: Map the FPGA I/O block hw/arm/mps2: Add CMSDK AHB GPIO peripherals as unimplemented devices hw/arm/mps2: Add CMSDK APB watchdog device hw/arm/mps2: Rename CMSDK AHB peripheral region hw/arm/mps2: Document CMSDK/FPGA APB subsystem sections hw/arm: Use TYPE_VERSATILE_I2C instead of hardcoded string hw/i2c: Add header for ARM SBCon two-wire serial bus interface hw/i2c/versatile_i2c: Add SCL/SDA definitions hw/i2c/versatile_i2c: Add definitions for register addresses hw/watchdog/cmsdk-apb-watchdog: Add trace event for lock status target/arm: Remove dead code relating to SABA and UABA target/arm: Remove unnecessary gen_io_end() calls target/arm: Move some functions used only in translate-neon.inc.c to that file ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|
#
f61c3fb5 |
| 17-Jun-2020 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
hw/i2c: Add header for ARM SBCon two-wire serial bus interface
'ARM SBCon two-wire serial bus interface' is the official name describing the pair of registers used to bitbanging I2C in the Versatile
hw/i2c: Add header for ARM SBCon two-wire serial bus interface
'ARM SBCon two-wire serial bus interface' is the official name describing the pair of registers used to bitbanging I2C in the Versatile boards.
Make the private VersatileI2CState structure as public ArmSbconI2CState. Add the TYPE_ARM_SBCON_I2C, alias to our current TYPE_VERSATILE_I2C model. Rename the memory region description as 'arm_sbcon_i2c'.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20200617072539.32686-5-f4bug@amsat.org Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
show more ...
|