Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0, v8.0.0 |
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c29a2f40 |
| 07-Mar-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20230306' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * allwinner-h3: Fix I2C controller model for Sun6i SoCs * allwinner-h3: Add m
Merge tag 'pull-target-arm-20230306' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * allwinner-h3: Fix I2C controller model for Sun6i SoCs * allwinner-h3: Add missing i2c controllers * Expose M-profile system registers to gdbstub * Expose pauth information to gdbstub * Support direct boot for Linux/arm64 EFI zboot images * Fix incorrect stage 2 MMU setup validation
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* tag 'pull-target-arm-20230306' of https://git.linaro.org/people/pmaydell/qemu-arm: (21 commits) hw: arm: allwinner-h3: Fix and complete H3 i2c devices hw: allwinner-i2c: Fix TWI_CNTR_INT_FLAG on SUN6i SoCs hw: arm: Support direct boot for Linux/arm64 EFI zboot images target/arm: Rewrite check_s2_mmu_setup target/arm: Diagnose incorrect usage of arm_is_secure subroutines target/arm: Stub arm_hcr_el2_eff for m-profile target/arm: Handle m-profile in arm_is_secure target/arm: Implement gdbstub m-profile systemreg and secext target/arm: Export arm_v7m_get_sp_ptr target/arm: Export arm_v7m_mrs_control target/arm: Implement gdbstub pauth extension target/arm: Create pauth_ptr_mask target/arm: Simplify iteration over bit widths target/arm: Add name argument to output_vector_union_type target/arm: Fix svep width in arm_gen_dynamic_svereg_xml target/arm: Hoist pred_width in arm_gen_dynamic_svereg_xml target/arm: Simplify register counting in arm_gen_dynamic_svereg_xml target/arm: Split out output_vector_union_type target/arm: Move arm_gen_dynamic_svereg_xml to gdbstub64.c target/arm: Unexport arm_gen_dynamic_sysreg_xml ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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8461bfdc |
| 20-Feb-2023 |
qianfan Zhao <qianfanguijin@163.com> |
hw: allwinner-i2c: Fix TWI_CNTR_INT_FLAG on SUN6i SoCs
TWI_CNTR_INT_FLAG is W1C(write 1 to clear and write 0 has non-effect) register on SUN6i based SoCs, we should lower interrupt when the guest se
hw: allwinner-i2c: Fix TWI_CNTR_INT_FLAG on SUN6i SoCs
TWI_CNTR_INT_FLAG is W1C(write 1 to clear and write 0 has non-effect) register on SUN6i based SoCs, we should lower interrupt when the guest set this bit.
The linux kernel will hang in irq handler(mv64xxx_i2c_intr) if no device connected on the i2c bus, next is the trace log:
allwinner_i2c_write write CNTR(0x0c): 0xc4 A_ACK BUS_EN INT_EN allwinner_i2c_write write CNTR(0x0c): 0xcc A_ACK INT_FLAG BUS_EN INT_EN allwinner_i2c_read read CNTR(0x0c): 0xcc A_ACK INT_FLAG BUS_EN INT_EN allwinner_i2c_read read STAT(0x10): 0x20 STAT_M_ADDR_WR_NACK allwinner_i2c_write write CNTR(0x0c): 0x54 A_ACK M_STP BUS_EN allwinner_i2c_write write CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read STAT(0x10): 0xf8 STAT_IDLE allwinner_i2c_write write CNTR(0x0c): 0x54 A_ACK M_STP BUS_EN allwinner_i2c_write write CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read CNTR(0x0c): 0x4c A_ACK INT_FLAG BUS_EN allwinner_i2c_read read STAT(0x10): 0xf8 STAT_IDLE ...
Fix it.
Signed-off-by: qianfan Zhao <qianfanguijin@163.com> Reviewed-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Tested-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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886fb670 |
| 13-Jan-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20230113' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: hw/arm/stm32f405: correctly describe the memory layout hw/arm: Add Olimex H40
Merge tag 'pull-target-arm-20230113' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: hw/arm/stm32f405: correctly describe the memory layout hw/arm: Add Olimex H405 board cubieboard: Support booting from an SD card image with u-boot on it target/arm: Fix sve_probe_page target/arm: allow writes to SCR_EL3.HXEn bit when FEAT_HCX is enabled various code cleanups
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* tag 'pull-target-arm-20230113' of https://git.linaro.org/people/pmaydell/qemu-arm: (38 commits) target/arm: allow writes to SCR_EL3.HXEn bit when FEAT_HCX is enabled hw/timer/xilinx_timer: Use XpsTimerState instead of 'struct timerblock' hw/intc/xilinx_intc: Use 'XpsIntc' typedef instead of 'struct xlx_pic' hw/misc/sbsa_ec: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE() hw/misc/sbsa_ec: Rename TYPE_SBSA_EC -> TYPE_SBSA_SECURE_EC hw/arm/npcm7xx: Declare QOM macros using OBJECT_DECLARE_SIMPLE_TYPE() hw/arm/bcm2836: Remove definitions generated by OBJECT_DECLARE_TYPE() hw/arm/stellaris: Use CamelCase for STELLARIS_ADC type name hw/arm/stellaris: Drop useless casts from void * to pointer hw/intc/omap_intc: Use CamelCase for TYPE_OMAP_INTC type name hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP2_GPIO type name hw/gpio/omap_gpio: Use CamelCase for TYPE_OMAP1_GPIO type name hw/arm/omap: Drop useless casts from void * to pointer hw/gpio/omap_gpio: Add local variable to avoid embedded cast hw/arm/pxa: Avoid forward-declaring PXA2xxI2CState hw/arm: Remove unreachable code calling pflash_cfi01_register() hw/arm/vexpress: Remove dead code in vexpress_common_init() hw/arm/z2: Use the IEC binary prefix definitions hw/arm/omap_sx1: Use the IEC binary prefix definitions hw/arm/omap_sx1: Remove unused 'total_ram' definitions ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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9be8a82c |
| 26-Dec-2022 |
Strahinja Jankovic <strahinjapjankovic@gmail.com> |
{hw/i2c,docs/system/arm}: Allwinner TWI/I2C Emulation
This patch implements Allwinner TWI/I2C controller emulation. Only master-mode functionality is implemented.
The SPL boot for Cubieboard expect
{hw/i2c,docs/system/arm}: Allwinner TWI/I2C Emulation
This patch implements Allwinner TWI/I2C controller emulation. Only master-mode functionality is implemented.
The SPL boot for Cubieboard expects AXP209 PMIC on TWI0/I2C0 bus, so this is first part enabling the TWI/I2C bus operation.
Since both Allwinner A10 and H3 use the same module, it is added for both boards.
Docs are also updated for Cubieboard and Orangepi-PC board to indicate I2C availability.
Signed-off-by: Strahinja Jankovic <strahinja.p.jankovic@gmail.com> Reviewed-by: Niek Linnenbank <nieklinnenbank@gmail.com> Message-id: 20221226220303.14420-4-strahinja.p.jankovic@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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