Revision tags: v9.2.0, v9.1.2, v9.1.1 |
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28ae3179 |
| 13-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20240913' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * s390: convert s390 virtio-ccw and CPU to three-phase reset * reset: remove
Merge tag 'pull-target-arm-20240913' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * s390: convert s390 virtio-ccw and CPU to three-phase reset * reset: remove now-unused device_class_set_parent_reset() * reset: introduce device_class_set_legacy_reset() * reset: remove unneeded transitional machinery * kvm: Use 'unsigned long' for request argument in functions wrapping ioctl() * hvf: arm: Implement and use hvf_get_physical_address_range so VMs can have larger-than-36-bit IPA spaces when the host supports this * target/arm/tcg: refine cache descriptions with a wrapper * hw/net/can/xlnx-versal-canfd: fix various bugs * MAINTAINERS: update versal, CAN maintainer entries * hw/intc/arm_gic: fix spurious level triggered interrupts
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* tag 'pull-target-arm-20240913' of https://git.linaro.org/people/pmaydell/qemu-arm: (27 commits) hw/intc/arm_gic: fix spurious level triggered interrupts MAINTAINERS: Add my-self as CAN maintainer MAINTAINERS: Update Xilinx Versal OSPI maintainer's email address MAINTAINERS: Remove Vikram Garhwal as maintainer hw/net/can/xlnx-versal-canfd: Fix FIFO issues hw/net/can/xlnx-versal-canfd: Simplify DLC conversions hw/net/can/xlnx-versal-canfd: Fix byte ordering hw/net/can/xlnx-versal-canfd: Handle flags correctly hw/net/can/xlnx-versal-canfd: Translate CAN ID registers hw/net/can/xlnx-versal-canfd: Fix CAN FD flag check hw/net/can/xlnx-versal-canfd: Fix interrupt level target/arm/tcg: refine cache descriptions with a wrapper hvf: arm: Implement and use hvf_get_physical_address_range hvf: Split up hv_vm_create logic per arch hw/boards: Add hvf_get_physical_address_range to MachineClass kvm: Use 'unsigned long' for request argument in functions wrapping ioctl() hw/core/resettable: Remove transitional_function machinery hw/core/qdev: Simplify legacy_reset handling hw: Remove device_phases_reset() hw: Rename DeviceClass::reset field to legacy_reset ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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e3d08143 |
| 13-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
hw: Use device_class_set_legacy_reset() instead of opencoding
Use device_class_set_legacy_reset() instead of opencoding an assignment to DeviceClass::reset. This change was produced with: spatch --
hw: Use device_class_set_legacy_reset() instead of opencoding
Use device_class_set_legacy_reset() instead of opencoding an assignment to DeviceClass::reset. This change was produced with: spatch --macro-file scripts/cocci-macro-file.h \ --sp-file scripts/coccinelle/device-reset.cocci \ --keep-comments --smpl-spacing --in-place --dir hw
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20240830145812.1967042-8-peter.maydell@linaro.org
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Revision tags: v9.1.0 |
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a3108b2d |
| 02-Oct-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-tricore-20230929' of https://github.com/bkoppelmann/qemu into staging
- Add FTOU, CRCN, FTOHP, and HPTOF insns
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Merge tag 'pull-tricore-20230929' of https://github.com/bkoppelmann/qemu into staging
- Add FTOU, CRCN, FTOHP, and HPTOF insns
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* tag 'pull-tricore-20230929' of https://github.com/bkoppelmann/qemu: target/tricore: Change effective address (ea) to target_ulong target/tricore: Remove CSFRs from cpu.h tests/tcg: Reset result register after each test hw/tricore: Log failing test in testdevice tests/tcg/tricore: Extended and non-extened regs now match target/tricore: Fix FTOUZ being ISA v1.3.1 up target/tricore: Replace cpu_*_code with translator_* target/tricore: Swap src and dst reg for RCRR_INSERT target/tricore: Fix RCPW/RRPW_INSERT insns for width = 0 target/tricore: Implement hptof insn target/tricore: Implement ftohp insn target/tricore: Clarify special case for FTOUZ insn target/tricore: Implement FTOU insn target/tricore: Correctly handle FPU RM from PSW target/tricore: Implement CRCN insn tests/tcg/tricore: Bump cpu to tc37x
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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6d559996 |
| 13-Sep-2023 |
Bastian Koppelmann <kbastian@mail.uni-paderborn.de> |
hw/tricore: Log failing test in testdevice
Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Message-ID: <20230913105326.40832-3-kbastian@mail.uni-paderborn.de>
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Revision tags: v8.0.0, v7.2.0, v7.0.0, v6.2.0, v6.1.0 |
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fea2ad71 |
| 20-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-plugin-updates-180521-2' into staging
testing and plugin updates:
- various fixes for binfmt_misc docker images - add hexagon
Merge remote-tracking branch 'remotes/stsquad/tags/pull-testing-and-plugin-updates-180521-2' into staging
testing and plugin updates:
- various fixes for binfmt_misc docker images - add hexagon check-tcg support docker image - add tricore check-tcg support - refactor ppc docker images - add missing ppc64le tests - don't use host_cc for test fallback - check-tcg configure.sh tweaks for cross compile/clang - fix some memory leaks in plugins
# gpg: Signature made Tue 18 May 2021 09:37:21 BST # gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44 # gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [full] # Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44
* remotes/stsquad/tags/pull-testing-and-plugin-updates-180521-2: (29 commits) configure: use cc, not host_cc to set cross_cc for build arch tests/tcg: don't allow clang as a cross compiler tests/tcg: fix missing return tests/tcg/ppc64le: tests for brh/brw/brd tests/docker: gcc-10 based images for ppc64{,le} tests tests/tcg/tricore: Add muls test tests/tcg/tricore: Add msub test tests/tcg/tricore: Add madd test tests/tcg/tricore: Add ftoi test tests/tcg/tricore: Add fmul test tests/tcg/tricore: Add fadd test tests/tcg/tricore: Add dvstep test tests/tcg/tricore: Add clz test tests/tcg/tricore: Add bmerge test tests/tcg/tricore: Add macros to create tests and first test 'abs' configure: Emit HOST_CC to config-host.mak tests/tcg/tricore: Add build infrastructure hw/tricore: Add testdevice for tests in tests/tcg/ tests/tcg: Run timeout cmds using --foreground tests/tcg: Add docker_as and docker_ld cmds ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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582079c9 |
| 12-May-2021 |
Bastian Koppelmann <kbastian@mail.uni-paderborn.de> |
hw/tricore: Add testdevice for tests in tests/tcg/
this device is used to verify the correctness of regression tests by allowing guests to write their exit status to this device. This is then used b
hw/tricore: Add testdevice for tests in tests/tcg/
this device is used to verify the correctness of regression tests by allowing guests to write their exit status to this device. This is then used by qemu to exit using the written status.
Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Signed-off-by: Bastian Koppelmann <kbastian@mail.uni-paderborn.de> Signed-off-by: Alex Bennée <alex.bennee@linaro.org> Message-Id: <20210305170045.869437-4-kbastian@mail.uni-paderborn.de> Message-Id: <20210512102051.12134-14-alex.bennee@linaro.org>
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