Revision tags: v9.2.0, v9.1.2, v9.1.1 |
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#
062cfce8 |
| 01-Oct-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20241001' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * MAINTAINERS: Update STM32L4x5 and B-L475E-IOT01A maintainers * hw/arm/xlnx:
Merge tag 'pull-target-arm-20241001' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * MAINTAINERS: Update STM32L4x5 and B-L475E-IOT01A maintainers * hw/arm/xlnx: Connect secondary CGEM IRQs * m25p80: Add SFDP table for mt35xu01g flash * target/arm: Avoid target_ulong for physical address lookups * hw/ssi/xilinx_spips: Fix flash erase assert in dual parallel configuration * hw: fix memory leak in IRQState allocation * hw/sd/sdcard: Fix handling of disabled boot partitions * arm: Remove deprecated board models
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmb8JW8ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3m85D/9W5E4BQd4mG0JPT+OcCRP/ # MQGXsU6fOm3mtYfehXMwnJf2POOK0t/IC5W1mOGmIV6R4ABv2il3cXvQznCpcKY3 # eRmMLn4tfI2bn8zJmkIMY5am7j7G3RJzktz8iQ3bstNwD3pYU46tr36iup7vU71b # Z5Q3+uauBoUo/9rw5jgjjoZ9Z3Ay2RECsZc/vD6NIN0kh2TYgdpitR47J8jhS3ZX # +laqimnRl5wQpe0TIYzpdFr82CXfT62WfQ/+6D6xftbTrV1gfLWesc7hHsgw7Sem # ST+nX+0Wr0UfBvsNN4ldi4jB4FfMeUCPX4wBbkKaYyD7bYFnoiz8RPYCxrHlKqeL # 9P7+LuA+h+odIcsCza9zUSpQIu4gGIuovmnjz6rbD8m6poV0OmU/Ncj4JC9hGJNi # Y1utyFELsvpdQhHP1M2K0qEgO3q/fJyzgA5LXkeXLVozjJM6DX7deVdXjwcBWqeI # McJwe/C1TZ/WQlssrWmx6+naA8sygrsbo98a7X+DVsZ0ka6ofZSKkr7aHd3+dia+ # a4KbiMX6ChqZxPbIB+m4GnOkCDefu098rXlOu4gkMdzyQT/sm7wmVzQ3YsW3jVqx # DNG6Mrg6OVvevXQysdLkJIemnM9YeLxf0lEJ/NpkyGQ7LlmdBws+p1ooCvuvg2Ua # CRFY1tuUfWrshpziF1cT4A== # =q4iF # -----END PGP SIGNATURE----- # gpg: Signature made Tue 01 Oct 2024 17:38:07 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20241001' of https://git.linaro.org/people/pmaydell/qemu-arm: (54 commits) hw: Remove omap2 specific defines and enums hw/dma: Remove omap_dma4 device hw/misc/omap_clk: Remove OMAP2-specifics hw/misc: Remove omap_l4 device hw/display: Remove omap_dss hw/misc: Remove omap_tap device hw/ssi: Remove omap_mcspi hw/timer: Remove omap_synctimer hw/timer: Remove omap_gptimer hw/misc: Remove omap_gpmc hw/misc: Remove omap_sdrc device hw/sd: Remove omap2_mmc device hw/intc: Remove omap2-intc device hw/char: Remove omap2_uart hw/gpio: Remove TYPE_OMAP2_GPIO hw/arm: Remove omap2.c docs: Document removal of old Arm boards hw/usb: Remove MUSB USB host controller hw/usb: Remove tusb6010 USB controller hw/block: Remove OneNAND device ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v9.1.0 |
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#
9edcf2cf |
| 03-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
hw/sd: Remove pxa2xx_mmci.c
Remove the pxa2xx-specific pxa2xx_mmci device.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by:
hw/sd: Remove pxa2xx_mmci.c
Remove the pxa2xx-specific pxa2xx_mmci device.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240903160751.4100218-17-peter.maydell@linaro.org
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#
6746482d |
| 02-Jul-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'sdmmc-20240702' of https://github.com/philmd/qemu into staging
SD/MMC patches queue
- Deprecate SD spec v1.10 - Improve tracing - Fix endianness on DAT lines - Introduce helpers for comm
Merge tag 'sdmmc-20240702' of https://github.com/philmd/qemu into staging
SD/MMC patches queue
- Deprecate SD spec v1.10 - Improve tracing - Fix endianness on DAT lines - Introduce helpers for commands transmitting data on the DAT lines - Convert most commands to new helpers - Register various optional commands - Add command {name, type, class} fields to SDProto structure
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmaDtrEACgkQ4+MsLN6t # wN7wABAAjjo+8ZYTxyh+P5oPvv4ec0SLFyTzOyDlzl/8rif9l54UP1kvBGtDYBaF # hdHM/BguTQVdomObCrjmcXLmb/+ZnQ23x8Bn8rm1mqjXmV8UvuZ9KReAhQeEgBNN # rtWClQqgtuBAbhh2uh0zNmwPhzCavSostd5nQtJXvUfCZUIyTmUBqUNFCZc+RkGy # q6kUDzlgrH7uLzVMU5M6QvmOT1LbmWGQAdV+zWXBKXEBgysxzmm6bC7wRCoN+wPQ # 9OtdHEZsxEDaIJFK7YcDu0lCOsGFzu62d8N7TA/v4nIWaxrppm4FK7kxgmsO15uY # jEq3p2PbDj6UVYrqGpuw4qMcJ0Cs6dkGEfCw9eqwYyhAPd/Y+s/NBAgc6BieZWj6 # D32goEWykLorxu9sPGgR9qNWo7gbHanMo4ps3v4++D8Qtb3CpANXDIC5H1WR9azH # tdiepDx0nW9bSo/hE32bL70TA8noqUCsrr1yIN7eydpJ2ZTa2ywMfIifLnowoOD2 # mPQ/QvUsAwJdjGXsz21loQdycOsuBmqZ4bKU45ez3bxKdq1LFC4q6xsVPeS0UVFy # 6dSj2Bi44Y+Ub/UoNij2/6WzuIfNtSKXrs47et2v2SFjuPJt0g34cv3mLCz6CQQZ # 2WFk42vyGSZ9gmWmt+G64nksQlifVWnGQP6jub9ThQ5rxqzFTU0= # =vqY+ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 02 Jul 2024 01:13:37 AM PDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
* tag 'sdmmc-20240702' of https://github.com/philmd/qemu: (67 commits) hw/sd/sdcard: Add sd_acmd_SEND_SCR handler (ACMD51) hw/sd/sdcard: Add sd_acmd_SET_CLR_CARD_DETECT handler (ACMD42) hw/sd/sdcard: Add sd_acmd_SD_APP_OP_COND handler (ACMD41) hw/sd/sdcard: Add sd_acmd_SET_WR_BLK_ERASE_COUNT handler (ACMD23) hw/sd/sdcard: Add sd_acmd_SEND_NUM_WR_BLOCKS handler (ACMD22) hw/sd/sdcard: Add sd_acmd_SD_STATUS handler (ACMD13) hw/sd/sdcard: Add sd_acmd_SET_BUS_WIDTH handler (ACMD6) hw/sd/sdcard: Add spi_cmd_CRC_ON_OFF handler (CMD59) hw/sd/sdcard: Add spi_cmd_READ_OCR handler (CMD58) hw/sd/sdcard: Add sd_cmd_APP_CMD handler (CMD55) hw/sd/sdcard: Add sd_cmd_LOCK_UNLOCK handler (CMD42) hw/sd/sdcard: Add sd_cmd_ERASE handler (CMD38) hw/sd/sdcard: Add sd_cmd_ERASE_WR_BLK_START/END handlers (CMD32 & CMD33) hw/sd/sdcard: Add sd_cmd_SEND_WRITE_PROT handler (CMD30) hw/sd/sdcard: Add sd_cmd_SET/CLR_WRITE_PROT handler (CMD28 & CMD29) hw/sd/sdcard: Add sd_cmd_PROGRAM_CSD handler (CMD27) hw/sd/sdcard: Add sd_cmd_WRITE_SINGLE_BLOCK handler (CMD24) hw/sd/sdcard: Add sd_cmd_READ_SINGLE_BLOCK handler (CMD17) hw/sd/sdcard: Add sd_cmd_SET_BLOCKLEN handler (CMD16) hw/sd/sdcard: Add sd_cmd_GO_INACTIVE_STATE handler (CMD15) ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
d4613f9f |
| 20-Jun-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/sd/sdcard: Move sd_[a]cmd_name() methods to sd.c
Merge sdmmc-internal.c into sd.c by moving sd_cmd_name() and sd_acmd_name() and updating meson.build.
Signed-off-by: Philippe Mathieu-Daudé <phil
hw/sd/sdcard: Move sd_[a]cmd_name() methods to sd.c
Merge sdmmc-internal.c into sd.c by moving sd_cmd_name() and sd_acmd_name() and updating meson.build.
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Tested-by: Cédric Le Goater <clg@redhat.com> Reviewed-by: Cédric Le Goater <clg@redhat.com> Message-Id: <20240628070216.92609-37-philmd@linaro.org>
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#
cab35c73 |
| 20-Jun-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-tcg-20230620' of https://gitlab.com/rth7680/qemu into staging
tcg: Define _CALL_AIX for clang on ppc64 accel/tcg: Build fix for macos catalina accel/tcg: Handle MO_ATOM_WITHIN16 in d
Merge tag 'pull-tcg-20230620' of https://gitlab.com/rth7680/qemu into staging
tcg: Define _CALL_AIX for clang on ppc64 accel/tcg: Build fix for macos catalina accel/tcg: Handle MO_ATOM_WITHIN16 in do_st16_leN accel/tcg: Restrict SavedIOTLB to system emulation accel/tcg: Use generic 'helper-proto-common.h' header plugins: Remove unused 'exec/helper-proto.h' header *: Check for CONFIG_USER_ONLY instead of CONFIG_SOFTMMU
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmSRYmIdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8zbAgAlX4GcShS1OU1BDRe # b0HHHj1fFBB/9yk8f/5WuQb2snYS+pcZCez9XeT175ugovXSOz+shvmFrbRPvpfj # q8C88CIKCJRsXnhWqKWOKDqgTttu2WNXOvCe0eCZbUoGQ9K1seMvUBq6T50fNv2H # fXeHtLSu/+jiHIN3+woJqdgrkp0cko2rrpnwIpjuIsY1iz/J/VKEHmnv7Ah+GsRs # OTYnR7iN6uhBXVll14r3UCylbgdEz58sSSEi3dYYfaTRuijDwOzM0evhk6+5XzHP # DYwGdbtDE5HJOrCLiKegk80Gh6v1XVZQWnn9PdiN1eJcQsWNT9mYV9/4IsCVrsF4 # 8r5KUg== # =JmjK # -----END PGP SIGNATURE----- # gpg: Signature made Tue 20 Jun 2023 10:25:06 AM CEST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-tcg-20230620' of https://gitlab.com/rth7680/qemu: cputlb: Restrict SavedIOTLB to system emulation exec/cpu-defs: Check for SOFTMMU instead of !USER_ONLY accel/tcg/cpu-exec: Use generic 'helper-proto-common.h' header plugins: Remove unused 'exec/helper-proto.h' header meson: Replace softmmu_ss -> system_ss meson: Replace CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY meson: Alias CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY accel/tcg: Check for USER_ONLY definition instead of SOFTMMU one hw/core/cpu: Check for USER_ONLY definition instead of SOFTMMU one target/ppc: Check for USER_ONLY definition instead of SOFTMMU one target/m68k: Check for USER_ONLY definition instead of SOFTMMU one target/tricore: Remove pointless CONFIG_SOFTMMU guard target/i386: Simplify i386_tr_init_disas_context() tcg/ppc: Define _CALL_AIX for clang on ppc64(be) accel/tcg: Handle MO_ATOM_WITHIN16 in do_st16_leN host/include/x86_64: Use __m128i for "x" constraints
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
de6cd759 |
| 13-Jun-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
meson: Replace softmmu_ss -> system_ss
We use the user_ss[] array to hold the user emulation sources, and the softmmu_ss[] array to hold the system emulation ones. Hold the latter in the 'system_ss[
meson: Replace softmmu_ss -> system_ss
We use the user_ss[] array to hold the user emulation sources, and the softmmu_ss[] array to hold the system emulation ones. Hold the latter in the 'system_ss[]' array for parity with user emulation.
Mechanical change doing:
$ sed -i -e s/softmmu_ss/system_ss/g $(git grep -l softmmu_ss)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230613133347.82210-10-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v8.0.0, v7.2.0, v7.0.0, v6.2.0 |
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#
cc233775 |
| 03-Nov-2021 |
Richard Henderson <richard.henderson@linaro.org> |
Merge remote-tracking branch 'remotes/rth/tags/pull-arm-20211102-2' into staging
Add nuvoton sd module for NPCM7XX Add gdb-xml for MVE More uses of tcg_constant_* in target/arm Fix parameter naming
Merge remote-tracking branch 'remotes/rth/tags/pull-arm-20211102-2' into staging
Add nuvoton sd module for NPCM7XX Add gdb-xml for MVE More uses of tcg_constant_* in target/arm Fix parameter naming for default-bus-bypass-iommu Ignore cache operations to mmio in HVF
# gpg: Signature made Tue 02 Nov 2021 02:23:53 PM EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* remotes/rth/tags/pull-arm-20211102-2: hvf: arm: Ignore cache operations on MMIO hw/arm/virt: Rename default_bus_bypass_iommu target/arm: Use tcg_constant_i32() in gen_rev16() target/arm: Use tcg_constant_i64() in do_sat_addsub_64() target/arm: Use the constant variant of store_cpu_field() when possible target/arm: Introduce store_cpu_field_constant() helper target/arm: Use tcg_constant_i32() in op_smlad() target/arm: Advertise MVE to gdb when present tests/qtest/libqos: add SDHCI commands hw/arm: Attach MMC to quanta-gbs-bmc hw/arm: Add Nuvoton SD module to board hw/sd: add nuvoton MMC
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
8092b518 |
| 07-Oct-2021 |
Shengtan Mao <stmao@google.com> |
hw/sd: add nuvoton MMC
Signed-off-by: Shengtan Mao <stmao@google.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Chris Rauer <crauer@google.co
hw/sd: add nuvoton MMC
Signed-off-by: Shengtan Mao <stmao@google.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Chris Rauer <crauer@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-Id: <20211008002628.1958285-2-wuhaotsh@google.com> [rth: Fix typos of "nonexistent"] Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v6.1.0 |
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#
2d3fc4e2 |
| 13-May-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2021-05-12' into staging
Miscellaneous patches for 2021-05-12
# gpg: Signature made Wed 12 May 2021 17:22:15 BST # gpg: us
Merge remote-tracking branch 'remotes/armbru/tags/pull-misc-2021-05-12' into staging
Miscellaneous patches for 2021-05-12
# gpg: Signature made Wed 12 May 2021 17:22:15 BST # gpg: using RSA key 354BC8B3D7EB2A6B68674E5F3870B400EB918653 # gpg: issuer "armbru@redhat.com" # gpg: Good signature from "Markus Armbruster <armbru@redhat.com>" [full] # gpg: aka "Markus Armbruster <armbru@pond.sub.org>" [full] # Primary key fingerprint: 354B C8B3 D7EB 2A6B 6867 4E5F 3870 B400 EB91 8653
* remotes/armbru/tags/pull-misc-2021-05-12: Drop the deprecated unicore32 target Drop the deprecated lm32 target block: Drop the sheepdog block driver Remove the deprecated moxie target monitor/qmp: fix race on CHR_EVENT_CLOSED without OOB
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
9d49bcf6 |
| 03-May-2021 |
Markus Armbruster <armbru@redhat.com> |
Drop the deprecated lm32 target
Target lm32 was deprecated in commit d8498005122, v5.2.0. See there for rationale.
Some of its code lives on in device models derived from milkymist ones: hw/char/d
Drop the deprecated lm32 target
Target lm32 was deprecated in commit d8498005122, v5.2.0. See there for rationale.
Some of its code lives on in device models derived from milkymist ones: hw/char/digic-uart.c and hw/display/bcm2835_fb.c.
Cc: Michael Walle <michael@walle.cc> Signed-off-by: Markus Armbruster <armbru@redhat.com> Message-Id: <20210503084034.3804963-2-armbru@redhat.com> Acked-by: Michael Walle <michael@walle.cc> [Trivial conflicts resolved, reST markup fixed]
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Revision tags: v5.2.0 |
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#
f00f57f3 |
| 13-Sep-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging
This PR includes multiple fixes and features for RISC-V: - Fixes a bug in printing trap causes - Allo
Merge remote-tracking branch 'remotes/alistair/tags/pull-riscv-to-apply-20200910' into staging
This PR includes multiple fixes and features for RISC-V: - Fixes a bug in printing trap causes - Allows 16-bit writes to the SiFive test device. This fixes the failure to reboot the RISC-V virt machine - Support for the Microchip PolarFire SoC and Icicle Kit - A reafactor of RISC-V code out of hw/riscv
# gpg: Signature made Thu 10 Sep 2020 19:08:06 BST # gpg: using RSA key F6C4AC46D4934868D3B8CE8F21E10D29DF977054 # gpg: Good signature from "Alistair Francis <alistair@alistair23.me>" [full] # Primary key fingerprint: F6C4 AC46 D493 4868 D3B8 CE8F 21E1 0D29 DF97 7054
* remotes/alistair/tags/pull-riscv-to-apply-20200910: (30 commits) hw/riscv: Sort the Kconfig options in alphabetical order hw/riscv: Drop CONFIG_SIFIVE hw/riscv: Always build riscv_hart.c hw/riscv: Move sifive_test model to hw/misc hw/riscv: Move sifive_uart model to hw/char hw/riscv: Move riscv_htif model to hw/char hw/riscv: Move sifive_plic model to hw/intc hw/riscv: Move sifive_clint model to hw/intc hw/riscv: Move sifive_gpio model to hw/gpio hw/riscv: Move sifive_u_otp model to hw/misc hw/riscv: Move sifive_u_prci model to hw/misc hw/riscv: Move sifive_e_prci model to hw/misc hw/riscv: sifive_u: Connect a DMA controller hw/riscv: clint: Avoid using hard-coded timebase frequency hw/riscv: microchip_pfsoc: Hook GPIO controllers hw/riscv: microchip_pfsoc: Connect 2 Cadence GEMs hw/arm: xlnx: Set all boards' GEM 'phy-addr' property value to 23 hw/net: cadence_gem: Add a new 'phy-addr' property hw/riscv: microchip_pfsoc: Connect a DMA controller hw/dma: Add SiFive platform DMA controller emulation ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
# Conflicts: # hw/riscv/trace-events
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#
c696e1f2 |
| 31-Aug-2020 |
Bin Meng <bin.meng@windriver.com> |
hw/sd: Add Cadence SDHCI emulation
Cadence SD/SDIO/eMMC Host Controller (SD4HC) is an SDHCI compatible controller. The SDHCI compatible registers start from offset 0x200, which are called Slot Regis
hw/sd: Add Cadence SDHCI emulation
Cadence SD/SDIO/eMMC Host Controller (SD4HC) is an SDHCI compatible controller. The SDHCI compatible registers start from offset 0x200, which are called Slot Register Set (SRS) in its datasheet.
This creates a Cadence SDHCI model built on top of the existing generic SDHCI model. Cadence specific Host Register Set (HRS) is implemented to make guest software happy.
Signed-off-by: Bin Meng <bin.meng@windriver.com> Acked-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Acked-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <1598924352-89526-8-git-send-email-bmeng.cn@gmail.com> Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
7fd51e68 |
| 21-Aug-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
New build system, with "fake in-tree builds" support.
Missing: * converting configure tests * converting unit te
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
New build system, with "fake in-tree builds" support.
Missing: * converting configure tests * converting unit tests * converting some remaining parts of the installation
# gpg: Signature made Fri 21 Aug 2020 11:33:35 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini-gitlab/tags/for-upstream: (152 commits) docs: convert build system documentation to rST meson: update build-system documentation meson: avoid unstable module warning with Meson 0.56.0 or newer meson: convert po/ meson: convert VNC and dependent libraries to meson meson: move SDL and SDL-image detection to meson meson: convert sample plugins meson: replace create-config with meson configure_file rules.mak: drop unneeded macros meson: convert check-block meson: build texi doc docs: automatically track manual dependencies meson: sphinx-build remove Makefile.target rules.mak: remove version.o meson: convert systemtap files configure: place compatibility symlinks in target directories meson: link emulators without Makefile.target meson: plugins meson: cpu-emu ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v5.0.0, v4.2.0 |
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#
092795f8 |
| 16-Aug-2019 |
Marc-André Lureau <marcandre.lureau@redhat.com> |
meson: convert hw/sd
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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