Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0, v8.0.0, v7.2.0 |
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7b06148d |
| 08-Aug-2022 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'mips-20220809' of https://github.com/philmd/qemu into staging
MIPS/SPARC patches queue
- target/mips: Handle lock_user failure in UHI_plog semihosting (Peter Maydell) - hw/mips/malta: Tu
Merge tag 'mips-20220809' of https://github.com/philmd/qemu into staging
MIPS/SPARC patches queue
- target/mips: Handle lock_user failure in UHI_plog semihosting (Peter Maydell) - hw/mips/malta: Turn off x86 specific features of PIIX4 PM (Igor Mammedov) - hw/misc/grlib_ahb_apb_pnp: Support 8 and 16 bit accesses (Peter Maydell)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmLxjkMACgkQ4+MsLN6t # wN4DhQ/+L/lcVmz/hoIDsjyqMBpBYMYEftlytyuXUDqp9+1CGQpXXzf6cmXwiMK5 # DDP/q0PR508tevljDuc7A01ThkN5Vx8FcEpCaD54AjZ5n0BxSLl0Yw9Leftq8doD # Nk0YonVEY1tNXYV/KGWsiA7Xhkm3pL66Jzc0fyotNhzsI/dGxTVO9vLTgLl4/Hxv # iMj0AxPIOrKEsom61k6QKLgE5ZC3yIPZb+6upSwrQfx6oMtIac5NofEjNCuR0Uy5 # PgM6ZJKAM376JlP4hdJ91K04Wg8ql+ze/x2jpjbR0S3QRz4TbH57hJ00nNRLxDep # 5hHE7FIg6xf7sJv8ukwLK31zOiT46Azkr1wG97mZ7NyxxT7VTXtKgje6IENLGCgy # sCMWIEnrOh03seMShaCRqPcguYUR+XaMc+Hpv9XCu3ZvniI2CUpmVlm8M0t3hqVK # XCMwSsXJZ2w4522lUAJio2a10dsHJDg8U81n1KozTRUEZ8QBVlkqNLAIsROKl1Fr # LMsv9408nQLkAhYCBeZArw8ayITLTPqlE/S7fiLwwa6e8lPpkMyz/RlN16QsCSHr # zQO0iwY4kldn7QekKPTMQE73sW5ziBIOe7P6F5jtexbeaY0vJ5ph8Kfrq6hUVuqN # ieQVSi4psz43fpIjNodTk0nnsqAJXZ/7vy0sS38DvwQjBZojWIk= # =RIZd # -----END PGP SIGNATURE----- # gpg: Signature made Mon 08 Aug 2022 03:29:23 PM PDT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full]
* tag 'mips-20220809' of https://github.com/philmd/qemu: hw/misc/grlib_ahb_apb_pnp: Support 8 and 16 bit accesses hw/mips/malta: turn off x86 specific features of PIIX4_PM target/mips: Handle lock_user() failure in UHI_plog semihosting call
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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09d12c81 |
| 02-Aug-2022 |
Peter Maydell <peter.maydell@linaro.org> |
hw/misc/grlib_ahb_apb_pnp: Support 8 and 16 bit accesses
In real hardware, the APB and AHB PNP data tables can be accessed with byte and halfword reads as well as word reads. Our implementation cur
hw/misc/grlib_ahb_apb_pnp: Support 8 and 16 bit accesses
In real hardware, the APB and AHB PNP data tables can be accessed with byte and halfword reads as well as word reads. Our implementation currently only handles word reads. Add support for the 8 and 16 bit accesses. Note that we only need to handle aligned accesses -- unaligned accesses should continue to trap, as happens on hardware.
Resolves: https://gitlab.com/qemu-project/qemu/-/issues/1132 Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Frederic Konrad <fkonrad@amd.com> Message-Id: <20220802131925.3380923-1-peter.maydell@linaro.org> Tested-by: Tomasz Martyniak <gitlab.com/tom4r> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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Revision tags: v7.0.0, v6.2.0, v6.1.0, v5.2.0 |
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31d321c2 |
| 09-Jun-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/sparc-next-20200609' into staging
SPARC patches
HW: - Use UNIMP device instead of EMPTY_SLOT - Make EMPTY_SLOT similar to UNIMP device - Map
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/sparc-next-20200609' into staging
SPARC patches
HW: - Use UNIMP device instead of EMPTY_SLOT - Make EMPTY_SLOT similar to UNIMP device - Map UART devices unconditionally - Pair of fixes for AHB PnP - Add trace events to AHB PnP
TCG: - Improve exception logging
CI: - https://gitlab.com/philmd/qemu/-/pipelines/154231191 - https://travis-ci.org/github/philmd/qemu/builds/696321130
# gpg: Signature made Tue 09 Jun 2020 08:24:09 BST # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* remotes/philmd-gitlab/tags/sparc-next-20200609: target/sparc/int32_helper: Extract and use excp_name_str() target/sparc/int32_helper: Remove DEBUG_PCALL definition hw/timer/grlib_gptimer: Display frequency in decimal hw/misc/grlib_ahb_apb_pnp: Add trace events on read accesses hw/misc/grlib_ahb_apb_pnp: Fix AHB PnP 8-bit accesses hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to AHB PnP registers hw/sparc64/niagara: Remove duplicated NIAGARA_UART_BASE definition hw/sparc64/niagara: Map the UART device unconditionally hw/sparc/leon3: Map the UART device unconditionally hw/misc/empty_slot: Name the slots when created hw/misc/empty_slot: Move the 'hw/misc' and cover in MAINTAINERS hw/misc/empty_slot: Convert debug printf() to trace event hw/misc/empty_slot: Add a 'name' qdev property hw/misc/empty_slot: Convert 'size' field as qdev property hw/misc/empty_slot: Lower address space priority hw/sparc/sun4m: Use UnimplementedDevice for I/O devices
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v5.0.0 |
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d15188dd |
| 31-Mar-2020 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
hw/misc/grlib_ahb_apb_pnp: Add trace events on read accesses
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> Message-Id: <202003311
hw/misc/grlib_ahb_apb_pnp: Add trace events on read accesses
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> Message-Id: <20200331105048.27989-5-f4bug@amsat.org>
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1a5a5570 |
| 31-Mar-2020 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
hw/misc/grlib_ahb_apb_pnp: Fix AHB PnP 8-bit accesses
The Plug & Play region of the AHB/APB bridge can be accessed by various word size, however the implementation is clearly restricted to 32-bit:
hw/misc/grlib_ahb_apb_pnp: Fix AHB PnP 8-bit accesses
The Plug & Play region of the AHB/APB bridge can be accessed by various word size, however the implementation is clearly restricted to 32-bit:
static uint64_t grlib_ahb_pnp_read(void *opaque, hwaddr offset, unsigned size) { AHBPnp *ahb_pnp = GRLIB_AHB_PNP(opaque);
return ahb_pnp->regs[offset >> 2]; }
Similarly to commit 0fbe394a64 with the APB PnP registers, set the MemoryRegionOps::impl min/max fields to 32-bit, so memory.c::access_with_adjusted_size() can adjust when the access is not 32-bit.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> Message-Id: <20200331105048.27989-4-f4bug@amsat.org>
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bb15013e |
| 31-Mar-2020 |
Philippe Mathieu-Daudé <f4bug@amsat.org> |
hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to AHB PnP registers
Similarly to commit 158b659451 with the APB PnP registers, guests can crash QEMU when writting to the AHB PnP registers:
$
hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to AHB PnP registers
Similarly to commit 158b659451 with the APB PnP registers, guests can crash QEMU when writting to the AHB PnP registers:
$ echo 'writeb 0xfffff042 69' | qemu-system-sparc -M leon3_generic -S -bios /etc/magic -qtest stdio [I 1571938309.932255] OPENED [R +0.063474] writeb 0xfffff042 69 Segmentation fault (core dumped)
(gdb) bt #0 0x0000000000000000 in () #1 0x0000562999110df4 in memory_region_write_with_attrs_accessor (mr=mr@entry=0x56299aa28ea0, addr=66, value=value@entry=0x7fff6abe13b8, size=size@entry=1, shift=<optimized out>, mask=mask@entry=255, attrs=...) at memory.c:503 #2 0x000056299911095e in access_with_adjusted_size (addr=addr@entry=66, value=value@entry=0x7fff6abe13b8, size=size@entry=1, access_size_min=<optimized out>, access_size_max=<optimized out>, access_fn=access_fn@entry= 0x562999110d70 <memory_region_write_with_attrs_accessor>, mr=0x56299aa28ea0, attrs=...) at memory.c:539 #3 0x0000562999114fba in memory_region_dispatch_write (mr=mr@entry=0x56299aa28ea0, addr=66, data=<optimized out>, op=<optimized out>, attrs=attrs@entry=...) at memory.c:1482 #4 0x00005629990c0860 in flatview_write_continue (fv=fv@entry=0x56299aa7d8a0, addr=addr@entry=4294963266, attrs=..., ptr=ptr@entry=0x7fff6abe1540, len=len@entry=1, addr1=<optimized out>, l=<optimized out>, mr=0x56299aa28ea0) at include/qemu/host-utils.h:164 #5 0x00005629990c0a76 in flatview_write (fv=0x56299aa7d8a0, addr=4294963266, attrs=..., buf=0x7fff6abe1540, len=1) at exec.c:3165 #6 0x00005629990c4c1b in address_space_write (as=<optimized out>, addr=<optimized out>, attrs=..., attrs@entry=..., buf=buf@entry=0x7fff6abe1540, len=len@entry=1) at exec.c:3256 #7 0x000056299910f807 in qtest_process_command (chr=chr@entry=0x5629995ee920 <qtest_chr>, words=words@entry=0x56299acfcfa0) at qtest.c:437
Instead of crashing, log the access as unimplemented.
Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> Message-Id: <20200331105048.27989-3-f4bug@amsat.org>
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Revision tags: v4.2.0 |
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6a5d2208 |
| 07-Nov-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging
Trivial fixes (20191105-v3)
v3: remove disas/libvixl/vixl/invalset.h changes v2: remove patch from Greg
Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-pull-request' into staging
Trivial fixes (20191105-v3)
v3: remove disas/libvixl/vixl/invalset.h changes v2: remove patch from Greg that has lines with more than 80 columns
# gpg: Signature made Wed 06 Nov 2019 16:23:45 GMT # gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C # gpg: issuer "laurent@vivier.eu" # gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full] # gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full] # gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full] # Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C
* remotes/vivier2/tags/trivial-branch-pull-request: global: Squash 'the the' hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
0fbe394a |
| 25-Oct-2019 |
Philippe Mathieu-Daudé <philmd@redhat.com> |
hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses
The Plug & Play region of the AHB/APB bridge can be accessed by various word size, however the implementation is clearly restricted to 32-bit:
static
hw/misc/grlib_ahb_apb_pnp: Fix 8-bit accesses
The Plug & Play region of the AHB/APB bridge can be accessed by various word size, however the implementation is clearly restricted to 32-bit:
static uint64_t grlib_apb_pnp_read(void *opaque, hwaddr offset, unsigned size) { APBPnp *apb_pnp = GRLIB_APB_PNP(opaque);
return apb_pnp->regs[offset >> 2]; }
Set the MemoryRegionOps::impl min/max fields to 32-bit, so memory.c::access_with_adjusted_size() can adjust when the access is not 32-bit.
This is required to run RTEMS on leon3, the grlib scanning functions do byte accesses.
Reported-by: Jiri Gaisler <jiri@gaisler.se> Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> Message-Id: <20191025110114.27091-3-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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#
158b6594 |
| 25-Oct-2019 |
Philippe Mathieu-Daudé <philmd@redhat.com> |
hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers
Guests can crash QEMU when writting to PnP registers:
$ echo 'writeb 0x800ff042 69' | qemu-system-sparc -M leon3_generic -S -b
hw/misc/grlib_ahb_apb_pnp: Avoid crash when writing to PnP registers
Guests can crash QEMU when writting to PnP registers:
$ echo 'writeb 0x800ff042 69' | qemu-system-sparc -M leon3_generic -S -bios /etc/magic -qtest stdio [I 1571938309.932255] OPENED [R +0.063474] writeb 0x800ff042 69 Segmentation fault (core dumped)
(gdb) bt #0 0x0000000000000000 in () #1 0x0000555f4bcdf0bc in memory_region_write_with_attrs_accessor (mr=0x555f4d7be8c0, addr=66, value=0x7fff07d00f08, size=1, shift=0, mask=255, attrs=...) at memory.c:503 #2 0x0000555f4bcdf185 in access_with_adjusted_size (addr=66, value=0x7fff07d00f08, size=1, access_size_min=1, access_size_max=4, access_fn=0x555f4bcdeff4 <memory_region_write_with_attrs_accessor>, mr=0x555f4d7be8c0, attrs=...) at memory.c:539 #3 0x0000555f4bce2243 in memory_region_dispatch_write (mr=0x555f4d7be8c0, addr=66, data=69, op=MO_8, attrs=...) at memory.c:1489 #4 0x0000555f4bc80b20 in flatview_write_continue (fv=0x555f4d92c400, addr=2148528194, attrs=..., buf=0x7fff07d01120 "E", len=1, addr1=66, l=1, mr=0x555f4d7be8c0) at exec.c:3161 #5 0x0000555f4bc80c65 in flatview_write (fv=0x555f4d92c400, addr=2148528194, attrs=..., buf=0x7fff07d01120 "E", len=1) at exec.c:3201 #6 0x0000555f4bc80fb0 in address_space_write (as=0x555f4d7aa460, addr=2148528194, attrs=..., buf=0x7fff07d01120 "E", len=1) at exec.c:3291 #7 0x0000555f4bc8101d in address_space_rw (as=0x555f4d7aa460, addr=2148528194, attrs=..., buf=0x7fff07d01120 "E", len=1, is_write=true) at exec.c:3301 #8 0x0000555f4bcdb388 in qtest_process_command (chr=0x555f4c2ed7e0 <qtest_chr>, words=0x555f4db0c5d0) at qtest.c:432
Instead of crashing, log the access as unimplemented.
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com> Reviewed-by: KONRAD Frederic <frederic.konrad@adacore.com> Message-Id: <20191025110114.27091-2-philmd@redhat.com> Signed-off-by: Laurent Vivier <laurent@vivier.eu>
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f2a930ad |
| 17-May-2019 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20190517' into staging
qemu-sparc queue
# gpg: Signature made Fri 17 May 2019 10:30:54 BST # gpg: using RSA key CC621AB
Merge remote-tracking branch 'remotes/mcayland/tags/qemu-sparc-20190517' into staging
qemu-sparc queue
# gpg: Signature made Fri 17 May 2019 10:30:54 BST # gpg: using RSA key CC621AB98E82200D915CC9C45BC2C56FAE0F321F # gpg: issuer "mark.cave-ayland@ilande.co.uk" # gpg: Good signature from "Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>" [full] # Primary key fingerprint: CC62 1AB9 8E82 200D 915C C9C4 5BC2 C56F AE0F 321F
* remotes/mcayland/tags/qemu-sparc-20190517: MAINTAINERS: add myself for leon3 leon3: introduce the plug and play mechanism leon3: add a little bootloader grlib, apbuart: get rid of the old-style create function grlib, gptimer: get rid of the old-style create function grlib, irqmp: get rid of the old-style create function leon3: fix the error message when no bios are provided hw/char/escc: Lower irq when transmit buffer is filled
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
162abf1a |
| 15-May-2019 |
KONRAD Frederic <frederic.konrad@adacore.com> |
leon3: introduce the plug and play mechanism
This adds the AHB and APB plug and play devices. They are scanned during the linux boot to discover the various peripheral.
Reviewed-by: Fabien Chouteau
leon3: introduce the plug and play mechanism
This adds the AHB and APB plug and play devices. They are scanned during the linux boot to discover the various peripheral.
Reviewed-by: Fabien Chouteau <chouteau@adacore.com> Signed-off-by: KONRAD Frederic <frederic.konrad@adacore.com> Signed-off-by: Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>
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