Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0 |
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da4f7b85 |
| 30-Jul-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-target-arm-20240730' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/char/bcm2835_aux: Fix assert when receive FIFO fills up * hw/arm/smmuv3:
Merge tag 'pull-target-arm-20240730' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/char/bcm2835_aux: Fix assert when receive FIFO fills up * hw/arm/smmuv3: Assert input to oas2bits() is valid * target/arm/kvm: Set PMU for host only when available * target/arm/kvm: Do not silently remove PMU * hvf: arm: Properly disable PMU * hvf: arm: Do not advance PC when raising an exception * hw/misc/bcm2835_property: several minor bugfixes * target/arm: Don't assert for 128-bit tile accesses when SVL is 128 * target/arm: Fix UMOPA/UMOPS of 16-bit values * target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled * system/physmem: Where we assume we have a RAM MR, assert it * sh4, i386, m68k, xtensa, tricore, arm: fix minor Coverity issues
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* tag 'pull-target-arm-20240730' of https://git.linaro.org/people/pmaydell/qemu-arm: (21 commits) system/physmem: Where we assume we have a RAM MR, assert it target/sh4: Avoid shift into sign bit in update_itlb_use() target/i386: Remove dead assignment to ss in do_interrupt64() target/m68k: avoid shift into sign bit in dump_address_map() target/xtensa: Make use of 'segment' in pptlb helper less confusing target/tricore: Use unsigned types for bitops in helper_eq_b() target/arm: Ignore SMCR_EL2.LEN and SVCR_EL2.LEN if EL2 is not enabled target/arm: Avoid shifts by -1 in tszimm_shr() and tszimm_shl() target/arm: Fix UMOPA/UMOPS of 16-bit values target/arm: Don't assert for 128-bit tile accesses when SVL is 128 hw/misc/bcm2835_property: Reduce scope of variables in mbox push function hw/misc/bcm2835_property: Restrict scope of start_num, number, otp_row hw/misc/bcm2835_property: Avoid overflow in OTP access properties hw/misc/bcm2835_property: Fix handling of FRAMEBUFFER_SET_PALETTE hvf: arm: Do not advance PC when raising an exception hvf: arm: Properly disable PMU hvf: arm: Raise an exception for sysreg by default target/arm/kvm: Do not silently remove PMU target/arm/kvm: Set PMU for host only when available hw/arm/smmuv3: Assert input to oas2bits() is valid ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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28fe81f0 |
| 23-Jul-2024 |
Peter Maydell <peter.maydell@linaro.org> |
hw/misc/bcm2835_property: Reduce scope of variables in mbox push function
In bcm2835_property_mbox_push(), some variables are defined at function scope but used only in a smaller scope of the functi
hw/misc/bcm2835_property: Reduce scope of variables in mbox push function
In bcm2835_property_mbox_push(), some variables are defined at function scope but used only in a smaller scope of the function: * tag, bufsize, resplen are used only in the body of the while() loop * tmp is used only for RPI_FWREQ_SET_POWER_STATE (and is badly named)
Declare these variables in the scope where they're needed, so the code is easier to read.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240723131029.1159908-5-peter.maydell@linaro.org
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4b648238 |
| 23-Jul-2024 |
Peter Maydell <peter.maydell@linaro.org> |
hw/misc/bcm2835_property: Restrict scope of start_num, number, otp_row
In the long function bcm2835_property_mbox_push(), the variables start_num, number and otp_row are used only in the four cases
hw/misc/bcm2835_property: Restrict scope of start_num, number, otp_row
In the long function bcm2835_property_mbox_push(), the variables start_num, number and otp_row are used only in the four cases which access OTP data, and their uses don't overlap with each other.
Make these variables have scope restricted to the cases where they're used, so it's easier to read each individual case without having to cross-refer up to the variable declaration at the top of the function and check whether the variable is also used later in the loop.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240723131029.1159908-4-peter.maydell@linaro.org
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32f1c201 |
| 23-Jul-2024 |
Peter Maydell <peter.maydell@linaro.org> |
hw/misc/bcm2835_property: Avoid overflow in OTP access properties
Coverity points out that in our handling of the property RPI_FWREQ_SET_CUSTOMER_OTP we have a potential overflow. This happens beca
hw/misc/bcm2835_property: Avoid overflow in OTP access properties
Coverity points out that in our handling of the property RPI_FWREQ_SET_CUSTOMER_OTP we have a potential overflow. This happens because we read start_num and number from the guest as unsigned 32 bit integers, but then the variable 'n' we use as a loop counter as we iterate from start_num to start_num + number is only an "int". That means that if the guest passes us a very large start_num we will interpret it as negative. This will result in an assertion failure inside bcm2835_otp_set_row(), which checks that we didn't pass it an invalid row number.
A similar issue applies to all the properties for accessing OTP rows where we are iterating through with a start and length read from the guest.
Use uint32_t for the loop counter to avoid this problem. Because in all cases 'n' is only used as a loop counter, we can do this as part of the for(), restricting its scope to exactly where we need it.
Resolves: Coverity CID 1549401 Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240723131029.1159908-3-peter.maydell@linaro.org
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0892fffc |
| 23-Jul-2024 |
Peter Maydell <peter.maydell@linaro.org> |
hw/misc/bcm2835_property: Fix handling of FRAMEBUFFER_SET_PALETTE
The documentation of the "Set palette" mailbox property at https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface#s
hw/misc/bcm2835_property: Fix handling of FRAMEBUFFER_SET_PALETTE
The documentation of the "Set palette" mailbox property at https://github.com/raspberrypi/firmware/wiki/Mailbox-property-interface#set-palette says it has the form:
Length: 24..1032 Value: u32: offset: first palette index to set (0-255) u32: length: number of palette entries to set (1-256) u32...: RGBA palette values (offset to offset+length-1)
We get this wrong in a couple of ways: * we aren't checking the offset and length are in range, so the guest can make us spin for a long time by providing a large length * the bounds check on our loop is wrong: we should iterate through 'length' palette entries, not 'length - offset' entries
Fix the loop to implement the bounds checks and get the loop condition right. In the process, make the variables local to this switch case, rather than function-global, so it's clearer what type they are when reading the code.
Cc: qemu-stable@nongnu.org Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20240723131029.1159908-2-peter.maydell@linaro.org
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c80a3395 |
| 01-Jul-2024 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-target-arm-20240701' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * tests/avocado: update firmware for sbsa-ref and use all cores * hw/arm/smmu
Merge tag 'pull-target-arm-20240701' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * tests/avocado: update firmware for sbsa-ref and use all cores * hw/arm/smmu-common: Replace smmu_iommu_mr with smmu_find_sdev * arm: Fix VCMLA Dd, Dn, Dm[idx] * arm: Fix SQDMULH (by element) with Q=0 * arm: Fix FJCVTZS vs flush-to-zero * arm: More conversion of A64 AdvSIMD to decodetree * arm: Enable FEAT_Debugv8p8 for -cpu max * MAINTAINERS: Update family name for Patrick Leis * hw/arm/xilinx_zynq: Add boot-mode property * docs/system/arm: Add a doc for zynq board * hw/misc: In STM32L4x5 EXTI, correct configurable interrupts * tests/qtest: fix minor issues in STM32L4x5 tests
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* tag 'pull-target-arm-20240701' of https://git.linaro.org/people/pmaydell/qemu-arm: (29 commits) tests/qtest: Ensure STM32L4x5 EXTI state is correct at the end of QTests hw/misc: In STM32L4x5 EXTI, correct configurable interrupts tests/qtest: Fix STM32L4x5 SYSCFG irq line 15 state assumption docs/system/arm: Add a doc for zynq board hw/arm/xilinx_zynq: Add boot-mode property hw/misc/zynq_slcr: Add boot-mode property MAINTAINERS: Update my family name target/arm: Enable FEAT_Debugv8p8 for -cpu max target/arm: Move initialization of debug ID registers target/arm: Fix indentation target/arm: Delete dead code from disas_simd_indexed target/arm: Convert FCMLA to decodetree target/arm: Convert FCADD to decodetree target/arm: Add data argument to do_fp3_vector target/arm: Convert BFMMLA, SMMLA, UMMLA, USMMLA to decodetree target/arm: Convert BFMLALB, BFMLALT to decodetree target/arm: Convert BFDOT to decodetree target/arm: Convert SUDOT, USDOT to decodetree target/arm: Convert SDOT, UDOT to decodetree target/arm: Convert SQRDMLAH, SQRDMLSH to decodetree ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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5d5f1b60 |
| 19-May-2024 |
Rayhan Faizel <rayhan.faizel@gmail.com> |
hw/misc: Implement mailbox properties for customer OTP and device specific private keys
Four mailbox properties are implemented as follows: 1. Customer OTP: GET_CUSTOMER_OTP and SET_CUSTOMER_OTP 2.
hw/misc: Implement mailbox properties for customer OTP and device specific private keys
Four mailbox properties are implemented as follows: 1. Customer OTP: GET_CUSTOMER_OTP and SET_CUSTOMER_OTP 2. Device-specific private key: GET_PRIVATE_KEY and SET_PRIVATE_KEY.
The customer OTP is located in the rows 36-43. The device-specific private key is located in the rows 56-63.
The customer OTP can be locked with the magic numbers 0xffffffff 0xaffe0000 when running the SET_CUSTOMER_OTP mailbox command. Bit 6 of row 32 indicates this lock, which is undocumented. The lock also applies to the device-specific private key.
Signed-off-by: Rayhan Faizel <rayhan.faizel@gmail.com> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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158a054c |
| 27-Feb-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20240227-1' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Handle atomic updates of page tables entries in MMIO during PTW * Adverti
Merge tag 'pull-target-arm-20240227-1' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Handle atomic updates of page tables entries in MMIO during PTW * Advertise Cortex-A53 erratum #843419 fix via REVIDR * MAINTAINERS: Cover hw/ide/ahci-allwinner.c with AllWinner A10 machine * misc: m48t59: replace qemu_system_reset_request() call with watchdog_perform_action() * misc: pxa2xx_timer: replace qemu_system_reset_request() call with watchdog_perform_action() * xlnx-versal-ospi: disable reentrancy detection for iomem_dac * sbsa-ref: Simplify init since PCIe is always enabled * stm32l4x5: Use TYPE_OR_IRQ when connecting STM32L4x5 EXTI fan-in IRQs * pl031: Update last RTCLR value on write in case it's read back * block: m25p80: Add support of mt35xu02gbba * xlnx-versal-virt: Add machine property ospi-flash * reset: refactor system reset to be three-phase aware * new board model raspi4b
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* tag 'pull-target-arm-20240227-1' of https://git.linaro.org/people/pmaydell/qemu-arm: (36 commits) docs/system/arm: Add RPi4B to raspi.rst hw/misc/bcm2835_property: Add missed BCM2835 properties tests/avocado/boot_linux_console.py: Add Rpi4b boot tests hw/arm/bcm2838_peripherals: Add clock_isp stub hw/arm: Add memory region for BCM2837 RPiVid ASB hw/arm/raspi4b: Temporarily disable unimplemented rpi4b devices hw/arm: Introduce Raspberry PI 4 machine hw/arm: Add GPIO and SD to BCM2838 periph hw/gpio: Connect SD controller to BCM2838 GPIO hw/gpio: Implement BCM2838 GPIO functionality hw/gpio: Add BCM2838 GPIO stub hw/arm/bcm2838: Add GIC-400 to BCM2838 SoC hw/arm: Introduce BCM2838 SoC hw/arm/raspi: Split out raspi machine common part hw/arm/bcm2853_peripherals: Split out common part of peripherals hw/arm/bcm2836: Split out common part of BCM283X classes docs/devel/reset: Update to discuss system reset hw/core/machine: Use qemu_register_resettable for sysbus reset hw/core/reset: Implement qemu_register_reset via qemu_register_resettable hw/core/reset: Add qemu_{register, unregister}_resettable() ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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cda5a7d6 |
| 25-Feb-2024 |
Sergey Kambalin <serg.oker@gmail.com> |
hw/misc/bcm2835_property: Add missed BCM2835 properties
Our model of the bcm2835 mailbox is missing a few properties that we need for the raspi4 kernel: * RPI_FWREQ_GET_CLOCKS * RPI_FWREQ_GET_THRO
hw/misc/bcm2835_property: Add missed BCM2835 properties
Our model of the bcm2835 mailbox is missing a few properties that we need for the raspi4 kernel: * RPI_FWREQ_GET_CLOCKS * RPI_FWREQ_GET_THROTTLED * RPI_FWREQ_VCHIQ_INIT
Add minimal implementations of them.
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Message-id: 20240226000259.2752893-40-sergey.kambalin@auriga.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org> [PMM: improved commit message] Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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d328fef9 |
| 04-Jan-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging
Mark VMStateField and VMStateDescription arrays const.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXA
Merge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging
Mark VMStateField and VMStateDescription arrays const.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmWPOFsdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8cCQgAnQjy3Ic1i225AElh # 0Ph3Aiw6WT9pECLoKmyroxHbTGuaEJoIXeaOhMAnowCTBLoKRR3/Ooq0DGOW+l/Z # f5PwWSkjkb+OcS+dj/kgQBu58/Gk5G8ogksqKQvci8k2okhjHmITSQDu0dtwzDZr # jVGh3gmGoat73jQyD/nAwgWFawlLkklOMR/yvnFX7EJIBepRVbkMPayoKlB+6W07 # 1kqhSwoI0vQCjhJ3Q7Q0GC4rrHK3KUq7o/25yvICf4EgPKfsaym1wAjDhdKToixl # 9T+ALZG8SiZZkBlb6l3QZ7pqtqavxYtPdZ2Gx/nMu0RRu4G33d5AVGHRrXj9qttW # 5mL7ZQ== # =uQ4C # -----END PGP SIGNATURE----- # gpg: Signature made Fri 29 Dec 2023 21:21:31 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-20231230' of https://gitlab.com/rth7680/qemu: (71 commits) docs: Constify VMstate in examples tests/unit/test-vmstate: Constify VMState util/fifo8: Constify VMState replay: Constify VMState system: Constify VMState migration: Constify VMState cpu-target: Constify VMState backends: Constify VMState audio: Constify VMState hw/misc/macio: Constify VMState hw/watchdog: Constify VMState hw/virtio: Constify VMState hw/vfio: Constify VMState hw/usb: Constify VMState hw/tpm: Constify VMState hw/timer: Constify VMState hw/ssi: Constify VMState hw/sparc: Constify VMState hw/sensor: Constify VMState hw/sd: Constify VMState ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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e4ea952f |
| 20-Dec-2023 |
Richard Henderson <richard.henderson@linaro.org> |
hw/misc: Constify VMState
Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231221031652.119827-41-richard.henderson@linaro.org>
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caa75cc5 |
| 20-Oct-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-target-arm-20231019' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm: Move raspberrypi-fw-defs.h to the include/hw/arm/ folder * hw/arm/e
Merge tag 'pull-target-arm-20231019' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm: Move raspberrypi-fw-defs.h to the include/hw/arm/ folder * hw/arm/exynos4210: Get arm_boot_info declaration from 'hw/arm/boot' * xlnx devices: remove deprecated device reset * xlnx-bbram: hw/nvram: Use dot in device type name * elf2dmp: fix coverity issues * elf2dmp: convert to g_malloc, g_new and g_free * target/arm: Fix CNTPCT_EL0 trapping from EL0 when HCR_EL2.E2H is 0 * hw/arm: refactor virt PPI logic * arm/kvm: convert to kvm_set_one_reg, kvm_get_one_reg * target/arm: Permit T32 LDM with single register * smmuv3: Advertise SMMUv3.1-XNX * target/arm: Implement FEAT_HPMN0 * Remove some unnecessary include lines * target/arm/arm-powerctl: Correctly init CPUs when powered on to lower EL * hw/timer/npcm7xx_timer: Prevent timer from counting down past zero
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmUxMF4ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3oJND/4p64q0Wxq8x8yXCDUZAHME # lZe2liBPBkqZusGfK0O4CpClwGbM5+8tMeLaRgSOUgJ/WGFiLCGAKEKB0S7EiCa5 # 1bNvVn+a7cdDj7FdYf+Dvp5fNZZIus4w+CUlUaiRyDhIfYquz53J1RD1wN5+SQ/I # g6JQRp2gONeqGM5hT+0v2J/wGMmhuI5XO+PtQ1QNGoUnAA4QNof1thYjqdTJxzfz # V2CUSOKnAT/PDcUWoy8BVPDDE+wYTnjTO1j/ZsQvnNQm7r18OiMUn85teLq1JtB+ # T3vyVZ2f2gc8lAgkKy5n3NH5fmLVgbO0WXgpWLHNkcp+shZMM6J5J/u/P6B/wk95 # DMzQy4slu/UfWMvsaxq+OjejhAtbdiIOeNfF6dAMy2NAyZplEAjlP8dsFrqAdACL # 9m/DA4ODAV6OJ3E0zQ0dI4o6kr+/wbPVseLklqn3Ss0dndjU1K9XR0qpC8OruUJq # 4h6kl5q6V3BHAoELvBtAqb0yHYdqhLqznpO8HsrUEmU5eTjDaOyyI4HW+AY5GG1R # dtvrCLSiPe0EMartMMtezaB2GxQb9O7e+OI3XL2zVxb1F+QQ+vRZE3zVIdXm+Ev4 # oBztF1peZC3c8zurjr7/MxnDSnzynpkSR1zOY8+WJnAqpQ+C1YvdF6/Llwn7IMHw # ZHh6sGzQsaAu7u/DW9yY5w== # =WreO # -----END PGP SIGNATURE----- # gpg: Signature made Thu 19 Oct 2023 06:34:22 PDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20231019' of https://git.linaro.org/people/pmaydell/qemu-arm: (24 commits) contrib/elf2dmp: Use g_malloc(), g_new() and g_free() hw/timer/npcm7xx_timer: Prevent timer from counting down past zero target/arm/arm-powerctl: Correctly init CPUs when powered on to lower EL target/arm/common-semi-target.h: Remove unnecessary boot.h include target/arm/kvm64.c: Remove unused include target/arm: Implement FEAT_HPMN0 hw/arm/smmuv3: Advertise SMMUv3.1-XNX feature hw/arm/smmuv3: Sort ID register setting into field order hw/arm/smmuv3: Update ID register bit field definitions target/arm: Permit T32 LDM with single register arm/kvm: convert to kvm_get_one_reg arm/kvm: convert to kvm_set_one_reg hw/arm/sbsa-ref: use bsa.h for PPI definitions include/hw/arm: move BSA definitions to bsa.h {include/}hw/arm: refactor virt PPI logic target/arm: Fix CNTPCT_EL0 trapping from EL0 when HCR_EL2.E2H is 0 elf2dmp: check array bounds in pdb_get_file_size elf2dmp: limit print length for sign_rsds xlnx-bbram: hw/nvram: Use dot in device type name xlnx-versal-efuse: hw/nvram: Remove deprecated device reset ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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29ecf2de |
| 12-Oct-2023 |
Thomas Huth <thuth@redhat.com> |
hw/arm: Move raspberrypi-fw-defs.h to the include/hw/arm/ folder
The file is obviously related to the raspberrypi machine, so it should reside in hw/arm/ instead of hw/misc/. And while we're at it,
hw/arm: Move raspberrypi-fw-defs.h to the include/hw/arm/ folder
The file is obviously related to the raspberrypi machine, so it should reside in hw/arm/ instead of hw/misc/. And while we're at it, also adjust the wildcard in MAINTAINERS so that it covers this file, too.
Signed-off-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Alex Bennée <alex.bennee@linaro.org> Acked-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20231012073458.860187-1-thuth@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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48ab886d |
| 19-Jun-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-target-arm-20230619' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Fix return value from LDSMIN/LDSMAX 8/16 bit atomics * Return correct resul
Merge tag 'pull-target-arm-20230619' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Fix return value from LDSMIN/LDSMAX 8/16 bit atomics * Return correct result for LDG when ATA=0 * Conversion of system insns, loads and stores to decodetree * hw/intc/allwinner-a10-pic: Handle IRQ levels other than 0 or 1 * hw/sd/allwinner-sdhost: Don't send non-boolean IRQ line levels * hw/timer/nrf51_timer: Don't lose time when timer is queried in tight loop * hw/arm/Kconfig: sbsa-ref uses Bochs display * imx_serial: set wake bit when we receive a data byte * docs: sbsa: document board to firmware interface * hw/misc/bcm2835_property: avoid hard-coded constants
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmSQZd0ZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3lvoEACHH2dWWb1WAMB4GSZbM0PA # kStY9PO7Ex87BRN6cX2T6qv40eWvZsLsgJn/igDmuv9kXIuejgw5Ri36I+Jce0ZN # +d2DyrsEH/GlIDcl86HnbG1WGB27uAu0imE8kiokNymsFbyvfLZrByi03rwPRxkp # fBVK2aFXTq1cZhjo3/43ySbF4/09ajci8uHPtnLla+WpZzoxP38GZ8qsY6WdxgEv # +ap1h2641DDCpkqqan+tEbFUczJ8QrSvUoofreOJhEAnAuqlRX8V4eiiK9McUX+P # LLUYUAMeTf9Ts2YRuJd9eUvTmxJo2WBiXFpxSvOfu5YOR5pBiDkDrGLkbY5bUvNu # Qte/O0gEG0GBwZptCnUWJtF1DoMDAnPjB3JjuBkAo0N5ch7G/McoGfNYEaNEbb6N # uKetTzlR4s0Zxv/SGxow+/kEkiDNCwna2mni563bz+L7+sRJWFEORErcNHCWckkk # 1W+C1S+pKv9EZvO4lcvJgZus6i5VlWjEOm0IrRcYO+dbA1F7T3j4miIu8JYYIPFu # IPyZytawpwq8irxTD0Z1hpsjrbkfOMb3hEbmtK4ruSCBRMBA3Zj2cd1ZrL9A00JE # xC7rLXWxUAOxEXlJ0mDLMU3XGcp5j6wbMtin9odYR0ccXOHaV8dplzLNgAusXtWO # GqKcq+m7oeSklKl/YIJsuQ== # =5BGp # -----END PGP SIGNATURE----- # gpg: Signature made Mon 19 Jun 2023 04:27:41 PM CEST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [unknown]
* tag 'pull-target-arm-20230619' of https://git.linaro.org/people/pmaydell/qemu-arm: (33 commits) hw/misc/bcm2835_property: Handle CORE_CLK_ID firmware property hw/misc/bcm2835_property: Replace magic frequency values by definitions hw/misc/bcm2835_property: Use 'raspberrypi-fw-defs.h' definitions hw/arm/raspi: Import Linux raspi definitions as 'raspberrypi-fw-defs.h' docs: sbsa: document board to firmware interface imx_serial: set wake bit when we receive a data byte hw/arm/Kconfig: sbsa-ref uses Bochs display hw/timer/nrf51_timer: Don't lose time when timer is queried in tight loop hw/sd/allwinner-sdhost: Don't send non-boolean IRQ line levels hw/intc/allwinner-a10-pic: Handle IRQ levels other than 0 or 1 target/arm: Convert load/store tags insns to decodetree target/arm: Convert load/store single structure to decodetree target/arm: Convert load/store (multiple structures) to decodetree target/arm: Convert LDAPR/STLR (imm) to decodetree target/arm: Convert load (pointer auth) insns to decodetree target/arm: Convert atomic memory ops to decodetree target/arm: Convert LDR/STR reg+reg to decodetree target/arm: Convert LDR/STR with 12-bit immediate to decodetree target/arm: Convert ld/st reg+imm9 insns to decodetree target/arm: Convert load/store-pair to decodetree ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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074259c0 |
| 12-Jun-2023 |
Sergey Kambalin <sergey.kambalin@auriga.com> |
hw/misc/bcm2835_property: Handle CORE_CLK_ID firmware property
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230
hw/misc/bcm2835_property: Handle CORE_CLK_ID firmware property
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20230612223456.33824-5-philmd@linaro.org Message-Id: <20230531155258.8361-1-sergey.kambalin@auriga.com> [PMD: Split from bigger patch: 3/4] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> [PMM: added a comment about RPI_FIRMWARE_CORE_CLK_RATE really being SoC-specific] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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5dc49636 |
| 12-Jun-2023 |
Sergey Kambalin <sergey.kambalin@auriga.com> |
hw/misc/bcm2835_property: Replace magic frequency values by definitions
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed
hw/misc/bcm2835_property: Replace magic frequency values by definitions
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230612223456.33824-4-philmd@linaro.org Message-Id: <20230531155258.8361-1-sergey.kambalin@auriga.com> [PMD: Split from bigger patch: 4/4] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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25191826 |
| 12-Jun-2023 |
Sergey Kambalin <sergey.kambalin@auriga.com> |
hw/misc/bcm2835_property: Use 'raspberrypi-fw-defs.h' definitions
Replace magic property values by a proper definition, removing redundant comments.
Signed-off-by: Sergey Kambalin <sergey.kambalin@
hw/misc/bcm2835_property: Use 'raspberrypi-fw-defs.h' definitions
Replace magic property values by a proper definition, removing redundant comments.
Signed-off-by: Sergey Kambalin <sergey.kambalin@auriga.com> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20230612223456.33824-3-philmd@linaro.org Message-Id: <20230531155258.8361-1-sergey.kambalin@auriga.com> [PMD: Split from bigger patch: 2/4] Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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c586691e |
| 02-May-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-target-arm-20230502-2' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Support building Arm targets with CONFIG_TCG=no (ie KVM only) * hw/net: n
Merge tag 'pull-target-arm-20230502-2' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * Support building Arm targets with CONFIG_TCG=no (ie KVM only) * hw/net: npcm7xx_emc: set MAC in register space * hw/arm/bcm2835_property: Implement "get command line" message * Deprecate the '-singlestep' command line option in favour of '-one-insn-per-tb' and '-accel one-insn-per-tb=on' * Deprecate 'singlestep' member of QMP StatusInfo struct * docs/about/deprecated.rst: Add "since 7.1" tag to dtb-kaslr-seed deprecation * hw/net/msf2-emac: Don't modify descriptor in-place in emac_store_desc() * raspi, aspeed: Write bootloader code correctly on big-endian hosts * hw/intc/allwinner-a10-pic: Fix bug on big-endian hosts * Fix bug in A32 ERET on big-endian hosts that caused guest crash * hw/sd/allwinner-sdhost: Correctly byteswap descriptor fields * hw/net/allwinner-sun8i-emac: Correctly byteswap descriptor fields
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmRRIqoZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3uHxEACkO5NYXhah9KnztwhEjAUH # CnM6N9IHa4iEF7doWuiS39ZP4bXxCHnX4A1GqGRhsoub5PeiXxucTXlvkwWpOfct # pX78wHW18pVNJ2jlaly0c9cEI71ojT4zbXC3kjD9f/qHx2qI3rs3Sgb6BYC8QNnx # P/EHeefrnjwgGhBvzAJ8ATO/jpMYXukuxzjbIP0/7lqB5UxcNxv5rMTTansMO46r # JN5NdOEM8M8DoJHrHR9K3+Y2Vr1XjOowDPSF8+4rRkJB2v/3415V9bInEsTAvhQu # Ftua72vjVhTRfvgLXPc9C9S5sx6KHi+NdHfl/D7eL8B4aGHtBaUXv7pJrXUZYyLy # XNztXUx5EuzxXVN2mg8PYyasnEGjNbTUckAD40iow+DSgemB+MVJRp8f7Rb2yRHh # YuajDs77NUb9rVzozM+TTJkHfgLDkWCqX2Jm2kAea/gwowzdFCVosAs0cI+cDiBb # xQUMpERGBE2QJk/+KKc5xmIHUnXZCFTC/ieY2mpr8G6upDspzP254EjNGUCgIZmW # gYI/UTSX+f7M/+fYRgtSCdJ4LYkqdxUuGfyKccc4S2F2cCuQDGURRp4jHuI1cLyt # lkrgD1Hj3d9d8ZiMwmXDtiEsJhxDmuVmikmviigfhjLZ0QBd7FdpNz7gQR3lfDwl # YEGeFrhW2MHutjWSwxQWwQ== # =ua3Q # -----END PGP SIGNATURE----- # gpg: Signature made Tue 02 May 2023 03:48:10 PM BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
* tag 'pull-target-arm-20230502-2' of https://git.linaro.org/people/pmaydell/qemu-arm: (34 commits) hw/net/allwinner-sun8i-emac: Correctly byteswap descriptor fields hw/sd/allwinner-sdhost: Correctly byteswap descriptor fields target/arm: Add compile time asserts to load/store_cpu_field macros target/arm: Define and use new load_cpu_field_low32() hw/intc/allwinner-a10-pic: Don't use set_bit()/clear_bit() hw/arm/raspi: Use arm_write_bootloader() to write boot code hw/arm/aspeed: Use arm_write_bootloader() to write the bootloader hw/arm/boot: Make write_bootloader() public as arm_write_bootloader() hw/net/msf2-emac: Don't modify descriptor in-place in emac_store_desc() docs/about/deprecated.rst: Add "since 7.1" tag to dtb-kaslr-seed deprecation qmp: Deprecate 'singlestep' member of StatusInfo qapi/run-state.json: Fix missing newline at end of file hmp: Add 'one-insn-per-tb' command equivalent to 'singlestep' accel/tcg: Report one-insn-per-tb in 'info jit', not 'info status' Document that -singlestep command line option is deprecated bsd-user: Add '-one-insn-per-tb' option equivalent to '-singlestep' linux-user: Add '-one-insn-per-tb' option equivalent to '-singlestep' accel/tcg: Use one_insn_per_tb global instead of old singlestep global softmmu: Don't use 'singlestep' global in QMP and HMP commands make one-insn-per-tb an accel option ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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f802ff1e |
| 25-Apr-2023 |
Daniel Bertalan <dani@danielbertalan.dev> |
hw/arm/bcm2835_property: Implement "get command line" message
This query copies the kernel command line into the message buffer. It was previously stubbed out to return empty, this commit makes it r
hw/arm/bcm2835_property: Implement "get command line" message
This query copies the kernel command line into the message buffer. It was previously stubbed out to return empty, this commit makes it reflect the arguments specified with `-append`.
I observed the following peculiarities on my Pi 3B+: - If the buffer is shorter than the string, the response header gives the full length, but no data is actually copied. - No NUL terminator is added: even if the buffer is long enough to fit one, the buffer's original contents are preserved past the string's end. - The VC firmware adds the following extra parameters beside the user-supplied ones (via /boot/cmdline.txt): `video`, `vc_mem.mem_base` and `vc_mem.mem_size`. This is currently not implemented in qemu.
Signed-off-by: Daniel Bertalan <dani@danielbertalan.dev> Message-id: 20230425103250.56653-1-dani@danielbertalan.dev Reviewed-by: Peter Maydell <peter.maydell@linaro.org> [PMM: added comment about NUL and short-buffer behaviour] Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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2074424e |
| 28-Apr-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-request-2023-04-28' of https://gitlab.com/thuth/qemu into staging
* Prevent reentrant DMA accesses by default * Only compile hw/rdma code when necessary * Fix a potential locking iss
Merge tag 'pull-request-2023-04-28' of https://gitlab.com/thuth/qemu into staging
* Prevent reentrant DMA accesses by default * Only compile hw/rdma code when necessary * Fix a potential locking issue in the vhost-user-test * Offer more registers in GDB for s390x TCG
# -----BEGIN PGP SIGNATURE----- # # iQJFBAABCAAvFiEEJ7iIR+7gJQEY8+q5LtnXdP5wLbUFAmRLlDkRHHRodXRoQHJl # ZGhhdC5jb20ACgkQLtnXdP5wLbU98RAApVbehXIXMF4lm0B4/pTRlP7CEjbKvNdQ # Ca/xuqiCctjisJWQMLf8WDdymzaA02ycSYo0X9diO4uisKog4kN4uYje3VTbSJnx # 7a0MlOpUqP6AR3hZYy5y/wv1M7Yjfhnj7yTUsAo/mQYoZmvqRviNwJ6ekdIU9J4W # V2EfY+R/ebNami9VvuHTqudcZxmmR+4S5m5JipeHvjFE0DJucES0S8sN3W+iSCxG # ydqG02CUoZtoorkJZccy3FPyeTVHgvcNqJbhAA5pFBgo30L+mx0llqztzLnWnLCe # GWvpW2lZ2jC5MOg8oEpbiR807eB3ITpzCu9SX0IUOxMUHpGtl49sx1WNFrrlgD4Z # b+mZSwJx4grwkU8iD/nF0apQoqEIAH6VSyRAIq1yLAsq1H4/K4c8M+bZ/jAD+gw+ # +DujZIPJ6Gcu3BeqWgOcOY1rRol3ksmRYlU8GrHTR/zIU+q3h7Gk3aH4+Ore1qnE # hI/YzyyZlQgFMvENqakPJIS9IH+h41gCltwE8YxqJyUWIBfRs7iBMzdxQuUW+c2b # n6OPYqeDlQt4hEpq4mUtZ+aJV1ey6kyk5ESLTj8QaJiZtcT1+lmvZX2ug2oeyrJm # ys2458ulKZu0rGjXWWXNFB8u3MM9xN/PLqeD/wKShyLzkit5Nfx4azw5LPbmjrbj # Twmf1HGeUiY= # =v84A # -----END PGP SIGNATURE----- # gpg: Signature made Fri 28 Apr 2023 10:39:05 AM BST # gpg: using RSA key 27B88847EEE0250118F3EAB92ED9D774FE702DB5 # gpg: issuer "thuth@redhat.com" # gpg: Good signature from "Thomas Huth <th.huth@gmx.de>" [undefined] # gpg: aka "Thomas Huth <thuth@redhat.com>" [undefined] # gpg: aka "Thomas Huth <th.huth@posteo.de>" [unknown] # gpg: aka "Thomas Huth <huth@tuxfamily.org>" [undefined] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: 27B8 8847 EEE0 2501 18F3 EAB9 2ED9 D774 FE70 2DB5
* tag 'pull-request-2023-04-28' of https://gitlab.com/thuth/qemu: apic: disable reentrancy detection for apic-msi raven: disable reentrancy detection for iomem bcm2835_property: disable reentrancy detection for iomem lsi53c895a: disable reentrancy detection for script RAM hw: replace most qemu_bh_new calls with qemu_bh_new_guarded checkpatch: add qemu_bh_new/aio_bh_new checks async: Add an optional reentrancy guard to the BH API memory: prevent dma-reentracy issues tests: vhost-user-test: release mutex on protocol violation hw/rdma: VMW_PVRDMA should depend on VMXNET3_PCI hw/rdma: Compile target-independent parts of the rdma code only once hw/rdma: Remove unused macros PG_DIR_SZ and PG_TBL_SZ s390x/gdb: Split s390-virt.xml
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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985c4a4e |
| 27-Apr-2023 |
Alexander Bulekov <alxndr@bu.edu> |
bcm2835_property: disable reentrancy detection for iomem
As the code is designed for re-entrant calls from bcm2835_property to bcm2835_mbox and back into bcm2835_property, mark iomem as reentrancy-s
bcm2835_property: disable reentrancy detection for iomem
As the code is designed for re-entrant calls from bcm2835_property to bcm2835_mbox and back into bcm2835_property, mark iomem as reentrancy-safe.
Signed-off-by: Alexander Bulekov <alxndr@bu.edu> Reviewed-by: Thomas Huth <thuth@redhat.com> Message-Id: <20230427211013.2994127-7-alxndr@bu.edu> Signed-off-by: Thomas Huth <thuth@redhat.com>
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Revision tags: v8.0.0, v7.2.0 |
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50eac424 |
| 17-Sep-2022 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-arm-20220914' of https://gitlab.com/rth7680/qemu into staging
Add cortex-a35. Fix bcm2835 framebuffer for rpi firmware. Add FEAT_ETS. Add FEAT_PMUv3p5. Cleanups to armv7m_load_kernel
Merge tag 'pull-arm-20220914' of https://gitlab.com/rth7680/qemu into staging
Add cortex-a35. Fix bcm2835 framebuffer for rpi firmware. Add FEAT_ETS. Add FEAT_PMUv3p5. Cleanups to armv7m_load_kernel.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmMhwAsdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV/7Xgf9Ezg+etwsEzY0EWtH # yoQ7ymJHM1VKqtLkbk9U+Ju18YHEi3fwbYbfLgzkAMFHKDUteKJivKm2w41tsw5g # lE+5PojQT3k8PffaqeFzKG/JsDPoqKtTa23WjkafbIQAbjRT8JtmF/JmSLaaxyqW # DozPXJ9jXMS+Q2BxHnoCBuy/Kb3zsqekCr8DOgUIXY5gcAB6q1I8SMX2BrhsIyvV # vZxNm+hFDCOJtXvkAekMrwGkiIBYoBNpswnv40ldeSvRtD8tnty73JUt+AnWoCwi # zH4k+CvWICIuZT7oxVecRhlOojtaP5cUTXs0+zhk6GxEx/X6wmXd42heO9ZJL0y1 # 6FH0xw== # =ohPU # -----END PGP SIGNATURE----- # gpg: Signature made Wed 14 Sep 2022 07:50:35 EDT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-arm-20220914' of https://gitlab.com/rth7680/qemu: target/arm: Make boards pass base address to armv7m_load_kernel() target/arm: Remove useless TARGET_BIG_ENDIAN check in armv7m_load_kernel() target/arm: Report FEAT_PMUv3p5 for TCG '-cpu max' target/arm: Support 64-bit event counters for FEAT_PMUv3p5 target/arm: Implement FEAT_PMUv3p5 cycle counter disable bits target/arm: Rename pmu_8_n feature test functions target/arm: Detect overflow when calculating next PMU interrupt target/arm: Honour MDCR_EL2.HPMD in Secure EL2 target/arm: Ignore PMCR.D when PMCR.LC is set target/arm: Don't mishandle count when enabling or disabling PMU counters target/arm: Correct value returned by pmu_counter_mask() target/arm: Don't corrupt high half of PMOVSR when cycle counter overflows target/arm: Add missing space in comment target/arm: Advertise FEAT_ETS for '-cpu max' target/arm: Implement ID_DFR1 target/arm: Implement ID_MMFR5 target/arm: Sort KVM reads of AArch32 ID registers into encoding order target/arm: Make cpregs 0, c0, c{3-15}, {0-7} correctly RAZ in v8 hw/arm/bcm2835_property: Add support for RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS target/arm: Add cortex-a35
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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3b9a030e |
| 12-Aug-2022 |
Enrik Berkhan <Enrik.Berkhan@inka.de> |
hw/arm/bcm2835_property: Add support for RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS
In more recent Raspbian OS Linux kernels, the fb driver gives up immediately if RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DI
hw/arm/bcm2835_property: Add support for RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS
In more recent Raspbian OS Linux kernels, the fb driver gives up immediately if RPI_FIRMWARE_FRAMEBUFFER_GET_NUM_DISPLAYS fails or no displays are reported.
This change simply always reports one display. It makes bcm2835_fb work again with these more recent kernels.
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Signed-off-by: Enrik Berkhan <Enrik.Berkhan@inka.de> Message-Id: <20220812143519.59134-1-Enrik.Berkhan@inka.de> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v7.0.0 |
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#
477c3b93 |
| 21-Feb-2022 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20220221-1' into staging
arm, cocoa and misc: * MAINTAINERS file updates * Mark remaining global TypeInfo instances as const *
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20220221-1' into staging
arm, cocoa and misc: * MAINTAINERS file updates * Mark remaining global TypeInfo instances as const * checkpatch: Ensure that TypeInfos are const * arm hvf: Handle unknown ID registers as RES0 * Make KVM -cpu max exactly like -cpu host * Fix '-cpu max' for HVF * Support PAuth extension for hvf * Kconfig: Add I2C_DEVICES device group * Kconfig: Add 'imply I2C_DEVICES' on boards with available i2c bus * hw/arm/armv7m: Handle disconnected clock inputs * osdep.h: pull out various things into new header files * hw/timer: fix a9gtimer vmstate * hw/arm: add initial mori-bmc board * ui/cocoa: Remove allowedFileTypes restriction in SavePanel * ui/cocoa: Do not alert even without block devices * ui/cocoa: Fix the leak of qemu_console_get_label
# gpg: Signature made Mon 21 Feb 2022 13:30:45 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20220221-1: (25 commits) ui/cocoa: Fix the leak of qemu_console_get_label ui/cocoa: Do not alert even without block devices ui/cocoa: Remove allowedFileTypes restriction in SavePanel hw/arm: add initial mori-bmc board hw/timer: fix a9gtimer vmstate MAINTAINERS: Add Akihiko Odaki to macOS-relateds include: Move hardware version declarations to new qemu/hw-version.h include: Move qemu_[id]cache_* declarations to new qemu/cacheinfo.h include: Move QEMU_MAP_* constants to mmap-alloc.h include: Move qemu_mprotect_*() to new qemu/mprotect.h include: Move qemu_madvise() and related #defines to new qemu/madvise.h hw/arm/armv7m: Handle disconnected clock inputs Kconfig: Add 'imply I2C_DEVICES' on boards with available i2c bus Kconfig: Add I2C_DEVICES device group target/arm: Support PAuth extension for hvf target/arm: Fix '-cpu max' for HVF target/arm: Unindent unnecessary else-clause target/arm: Make KVM -cpu max exactly like -cpu host target/arm: Use aarch64_cpu_register() for 'host' CPU type target/arm: Move '-cpu host' code to cpu64.c ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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5e78c98b |
| 17-Jan-2022 |
Bernhard Beschow <shentey@gmail.com> |
Mark remaining global TypeInfo instances as const
More than 1k of TypeInfo instances are already marked as const. Mark the remaining ones, too.
This commit was created with: git grep -z -l 'stati
Mark remaining global TypeInfo instances as const
More than 1k of TypeInfo instances are already marked as const. Mark the remaining ones, too.
This commit was created with: git grep -z -l 'static TypeInfo' -- '*.c' | \ xargs -0 sed -i 's/static TypeInfo/static const TypeInfo/'
Signed-off-by: Bernhard Beschow <shentey@gmail.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Thomas Huth <thuth@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Cédric Le Goater <clg@kaod.org> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Corey Minyard <cminyard@mvista.com> Message-id: 20220117145805.173070-2-shentey@gmail.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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