History log of /openbmc/qemu/hw/mem/meson.build (Results 1 – 20 of 20)
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Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0
# 13b1e966 23-Apr-2024 Richard Henderson <richard.henderson@linaro.org>

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* cleanups for stubs
* do not link pixman automatically into all targets
* optimize computation of VGA dirty memory region
*

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* cleanups for stubs
* do not link pixman automatically into all targets
* optimize computation of VGA dirty memory region
* kvm: use configs/ definition to conditionalize debug support
* hw: Add compat machines for 9.1
* target/i386: add guest-phys-bits cpu property
* target/i386: Introduce Icelake-Server-v7 and SierraForest models
* target/i386: Export RFDS bit to guests
* q35: SMM ranges cleanups
* target/i386: basic support for confidential guests
* linux-headers: update headers
* target/i386: SEV: use KVM_SEV_INIT2 if possible
* kvm: Introduce support for memory_attributes
* RAMBlock: Add support of KVM private guest memfd
* Consolidate use of warn_report_once()
* pythondeps.toml: warn about updates needed to docs/requirements.txt
* target/i386: always write 32-bits for SGDT and SIDT

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# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined]
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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (63 commits)
target/i386/translate.c: always write 32-bits for SGDT and SIDT
pythondeps.toml: warn about updates needed to docs/requirements.txt
accel/tcg/icount-common: Consolidate the use of warn_report_once()
target/i386/cpu: Merge the warning and error messages for AMD HT check
target/i386/cpu: Consolidate the use of warn_report_once()
target/i386/host-cpu: Consolidate the use of warn_report_once()
kvm/tdx: Ignore memory conversion to shared of unassigned region
kvm/tdx: Don't complain when converting vMMIO region to shared
kvm: handle KVM_EXIT_MEMORY_FAULT
physmem: Introduce ram_block_discard_guest_memfd_range()
RAMBlock: make guest_memfd require uncoordinated discard
HostMem: Add mechanism to opt in kvm guest memfd via MachineState
kvm/memory: Make memory type private by default if it has guest memfd backend
kvm: Enable KVM_SET_USER_MEMORY_REGION2 for memslot
RAMBlock: Add support of KVM private guest memfd
kvm: Introduce support for memory_attributes
trace/kvm: Split address space and slot id in trace_kvm_set_user_memory()
hw/i386/sev: Use legacy SEV VM types for older machine types
i386/sev: Add 'legacy-vm-type' parameter for SEV guest objects
target/i386: SEV: use KVM_SEV_INIT2 if possible
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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# 2c888feb 08-Apr-2024 Paolo Bonzini <pbonzini@redhat.com>

memory-device: move stubs out of stubs/

Since the memory-device stubs are needed exactly when the Kconfig symbols are not
needed, move them to hw/mem/.

Signed-off-by: Paolo Bonzini <pbonzini@redhat

memory-device: move stubs out of stubs/

Since the memory-device stubs are needed exactly when the Kconfig symbols are not
needed, move them to hw/mem/.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-ID: <20240408155330.522792-15-pbonzini@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...


# 05470c39 04-Jan-2024 Peter Maydell <peter.maydell@linaro.org>

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* configure: use a native non-cross compiler for linux-user
* meson: cleanups
* target/i386: miscellaneous cleanups and optim

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* configure: use a native non-cross compiler for linux-user
* meson: cleanups
* target/i386: miscellaneous cleanups and optimizations
* target/i386: implement CMPccXADD
* target/i386: the sgx_epc_get_section stub is reachable
* esp: check for NULL result from scsi_device_find()

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* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (46 commits)
meson.build: report graphics backends separately
configure, meson: rename targetos to host_os
meson: rename config_all
meson: remove CONFIG_ALL
meson: remove config_targetos
meson: remove CONFIG_POSIX and CONFIG_WIN32 from config_targetos
meson: remove OS definitions from config_targetos
meson: always probe u2f and canokey if the option is enabled
meson: move subdirs to "Collect sources" section
meson: move config-host.h definitions together
meson: move CFI detection code with other compiler flags
meson: keep subprojects together
meson: move accelerator dependency checks together
meson: move option validation together
meson: move program checks together
meson: add more sections to main meson.build
configure: unify again the case arms in probe_target_compiler
configure: remove unnecessary subshell
Makefile: clean qemu-iotests output
meson: use version_compare() to compare version
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# 0d66549c 31-Aug-2023 Paolo Bonzini <pbonzini@redhat.com>

meson: remove CONFIG_ALL

CONFIG_ALL is tricky to use and was ported over to Meson from the
recursive processing of Makefile variables. Meson sourcesets
however have all_sources() and all_dependenci

meson: remove CONFIG_ALL

CONFIG_ALL is tricky to use and was ported over to Meson from the
recursive processing of Makefile variables. Meson sourcesets
however have all_sources() and all_dependencies() methods that
remove the need for it.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...


# cab35c73 20-Jun-2023 Richard Henderson <richard.henderson@linaro.org>

Merge tag 'pull-tcg-20230620' of https://gitlab.com/rth7680/qemu into staging

tcg: Define _CALL_AIX for clang on ppc64
accel/tcg: Build fix for macos catalina
accel/tcg: Handle MO_ATOM_WITHIN16 in d

Merge tag 'pull-tcg-20230620' of https://gitlab.com/rth7680/qemu into staging

tcg: Define _CALL_AIX for clang on ppc64
accel/tcg: Build fix for macos catalina
accel/tcg: Handle MO_ATOM_WITHIN16 in do_st16_leN
accel/tcg: Restrict SavedIOTLB to system emulation
accel/tcg: Use generic 'helper-proto-common.h' header
plugins: Remove unused 'exec/helper-proto.h' header
*: Check for CONFIG_USER_ONLY instead of CONFIG_SOFTMMU

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* tag 'pull-tcg-20230620' of https://gitlab.com/rth7680/qemu:
cputlb: Restrict SavedIOTLB to system emulation
exec/cpu-defs: Check for SOFTMMU instead of !USER_ONLY
accel/tcg/cpu-exec: Use generic 'helper-proto-common.h' header
plugins: Remove unused 'exec/helper-proto.h' header
meson: Replace softmmu_ss -> system_ss
meson: Replace CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY
meson: Alias CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY
accel/tcg: Check for USER_ONLY definition instead of SOFTMMU one
hw/core/cpu: Check for USER_ONLY definition instead of SOFTMMU one
target/ppc: Check for USER_ONLY definition instead of SOFTMMU one
target/m68k: Check for USER_ONLY definition instead of SOFTMMU one
target/tricore: Remove pointless CONFIG_SOFTMMU guard
target/i386: Simplify i386_tr_init_disas_context()
tcg/ppc: Define _CALL_AIX for clang on ppc64(be)
accel/tcg: Handle MO_ATOM_WITHIN16 in do_st16_leN
host/include/x86_64: Use __m128i for "x" constraints

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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# de6cd759 13-Jun-2023 Philippe Mathieu-Daudé <philmd@linaro.org>

meson: Replace softmmu_ss -> system_ss

We use the user_ss[] array to hold the user emulation sources,
and the softmmu_ss[] array to hold the system emulation ones.
Hold the latter in the 'system_ss[

meson: Replace softmmu_ss -> system_ss

We use the user_ss[] array to hold the user emulation sources,
and the softmmu_ss[] array to hold the system emulation ones.
Hold the latter in the 'system_ss[]' array for parity with user
emulation.

Mechanical change doing:

$ sed -i -e s/softmmu_ss/system_ss/g $(git grep -l softmmu_ss)

Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Message-Id: <20230613133347.82210-10-philmd@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


Revision tags: v8.0.0
# 674acdd1 10-Mar-2023 Peter Maydell <peter.maydell@linaro.org>

Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging

virtio,pc,pci: features, fixes

Several features that landed at the last possible moment:

Passthrough HDM d

Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging

virtio,pc,pci: features, fixes

Several features that landed at the last possible moment:

Passthrough HDM decoder emulation
Refactor cryptodev
RAS error emulation and injection
acpi-index support on non-hotpluggable slots
Dynamically switch to vhost shadow virtqueues at vdpa net migration

Plus a couple of bugfixes that look important to have in the release.

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

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* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (72 commits)
virtio: fix reachable assertion due to stale value of cached region size
hw/virtio/vhost-user: avoid using unitialized errp
hw/pxb-cxl: Support passthrough HDM Decoders unless overridden
hw/pci: Add pcie_count_ds_port() and pcie_find_port_first() helpers
hw/mem/cxl_type3: Add CXL RAS Error Injection Support.
hw/pci/aer: Make PCIE AER error injection facility available for other emulation to use.
hw/cxl: Fix endian issues in CXL RAS capability defaults / masks
hw/mem/cxl-type3: Add AER extended capability
hw/pci-bridge/cxl_root_port: Wire up MSI
hw/pci-bridge/cxl_root_port: Wire up AER
hw/pci/aer: Add missing routing for AER errors
hw/pci/aer: Implement PCI_ERR_UNCOR_MASK register
pcihp: add ACPI PCI hotplug specific is_hotpluggable_bus() callback
pcihp: move fields enabling hotplug into AcpiPciHpState
acpi: pci: move out ACPI PCI hotplug generator from generic slot generator build_append_pci_bus_devices()
acpi: pci: move BSEL into build_append_pcihp_slots()
acpi: pci: drop BSEL usage when deciding that device isn't hotpluggable
pci: move acpi-index uniqueness check to generic PCI device code
tests: acpi: update expected blobs
tests: acpi: add non zero function device with acpi-index on non-hotpluggble bus
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# 415442a1 02-Mar-2023 Jonathan Cameron <Jonathan.Cameron@huawei.com>

hw/mem/cxl_type3: Add CXL RAS Error Injection Support.

CXL uses PCI AER Internal errors to signal to the host that an error has
occurred. The host can then read more detailed status from the CXL RAS

hw/mem/cxl_type3: Add CXL RAS Error Injection Support.

CXL uses PCI AER Internal errors to signal to the host that an error has
occurred. The host can then read more detailed status from the CXL RAS
capability.

For uncorrectable errors: support multiple injection in one operation
as this is needed to reliably test multiple header logging support in an
OS. The equivalent feature doesn't exist for correctable errors, so only
one error need be injected at a time.

Note:
- Header content needs to be manually specified in a fashion that
matches the specification for what can be in the header for each
error type.

Injection via QMP:
{ "execute": "qmp_capabilities" }
...
{ "execute": "cxl-inject-uncorrectable-errors",
"arguments": {
"path": "/machine/peripheral/cxl-pmem0",
"errors": [
{
"type": "cache-address-parity",
"header": [ 3, 4]
},
{
"type": "cache-data-parity",
"header": [0,1,2,3,4,5,6,7,8,9,10,11,12,13,14,15,16,17,18,19,20,21,22,23,24,25,26,27,28,29,30,31]
},
{
"type": "internal",
"header": [ 1, 2, 4]
}
]
}}
...
{ "execute": "cxl-inject-correctable-error",
"arguments": {
"path": "/machine/peripheral/cxl-pmem0",
"type": "physical"
} }

Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20230302133709.30373-9-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

show more ...


Revision tags: v7.2.0
# eec39811 16-May-2022 Richard Henderson <richard.henderson@linaro.org>

Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging

virtio,pc,pci: fixes,cleanups,features

most of CXL support
fixes, cleanups all over the place

Signed-off-by:

Merge tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging

virtio,pc,pci: fixes,cleanups,features

most of CXL support
fixes, cleanups all over the place

Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

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# Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469

* tag 'for_upstream' of git://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (86 commits)
vhost-user-scsi: avoid unlink(NULL) with fd passing
virtio-net: don't handle mq request in userspace handler for vhost-vdpa
vhost-vdpa: change name and polarity for vhost_vdpa_one_time_request()
vhost-vdpa: backend feature should set only once
vhost-net: fix improper cleanup in vhost_net_start
vhost-vdpa: fix improper cleanup in net_init_vhost_vdpa
virtio-net: align ctrl_vq index for non-mq guest for vhost_vdpa
virtio-net: setup vhost_dev and notifiers for cvq only when feature is negotiated
hw/i386/amd_iommu: Fix IOMMU event log encoding errors
hw/i386: Make pic a property of common x86 base machine type
hw/i386: Make pit a property of common x86 base machine type
include/hw/pci/pcie_host: Correct PCIE_MMCFG_SIZE_MAX
include/hw/pci/pcie_host: Correct PCIE_MMCFG_BUS_MASK
docs/vhost-user: Clarifications for VHOST_USER_ADD/REM_MEM_REG
vhost-user: more master/slave things
virtio: add vhost support for virtio devices
virtio: drop name parameter for virtio_init()
virtio/vhost-user: dynamically assign VhostUserHostNotifiers
hw/virtio/vhost-user: don't suppress F_CONFIG when supported
include/hw: start documenting the vhost API
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


# e1706ea8 29-Apr-2022 Ben Widawsky <ben.widawsky@intel.com>

hw/cxl/device: Add a memory device (8.2.8.5)

A CXL memory device (AKA Type 3) is a CXL component that contains some
combination of volatile and persistent memory. It also implements the
previously d

hw/cxl/device: Add a memory device (8.2.8.5)

A CXL memory device (AKA Type 3) is a CXL component that contains some
combination of volatile and persistent memory. It also implements the
previously defined mailbox interface as well as the memory device
firmware interface.

Although the memory device is configured like a normal PCIe device, the
memory traffic is on an entirely separate bus conceptually (using the
same physical wires as PCIe, but different protocol).

Once the CXL topology is fully configure and address decoders committed,
the guest physical address for the memory device is part of a larger
window which is owned by the platform. The creation of these windows
is later in this series.

The following example will create a 256M device in a 512M window:
-object "memory-backend-file,id=cxl-mem1,share,mem-path=cxl-type3,size=512M"
-device "cxl-type3,bus=rp0,memdev=cxl-mem1,id=cxl-pmem0"

Note: Dropped PCDIMM info interfaces for now. They can be added if
appropriate at a later date.

Signed-off-by: Ben Widawsky <ben.widawsky@intel.com>
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com>
Message-Id: <20220429144110.25167-18-Jonathan.Cameron@huawei.com>
Reviewed-by: Michael S. Tsirkin <mst@redhat.com>
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>

show more ...


Revision tags: v7.0.0, v6.2.0
# 4d1a525d 14-Oct-2021 Richard Henderson <richard.henderson@linaro.org>

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Meson conversions + introspection-based command line parser

# gpg: Signature made Thu 14 Oct 2021 12:51:54 AM PDT
# g

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Meson conversions + introspection-based command line parser

# gpg: Signature made Thu 14 Oct 2021 12:51:54 AM PDT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]

* remotes/bonzini/tags/for-upstream: (26 commits)
configure: automatically parse command line for meson -D options
meson-buildoptions: include list of tracing backends
configure: prepare for auto-generated option parsing
configure: accept "internal" for --enable-capstone/slirp/fdt
configure: remove deprecated --{enable, disable}-git-update
configure, meson: move more compiler checks to Meson
configure: remove obsolete Solaris ar check
configure, meson: move Spice configure handling to meson
configure, meson: move netmap detection to meson
configure, meson: move vde detection to meson
configure, meson: move libaio check to meson.build
configure, meson: move pthread_setname_np checks to Meson
configure, meson: move remaining HAVE_* compiler tests to Meson
meson: HAVE_GDB_BIN is not used by C code
configure, meson: remove CONFIG_GCOV from config-host.mak
configure, meson: get HOST_WORDS_BIGENDIAN via the machine object
configure, meson: move CONFIG_HOST_DSOSUF to Meson
trace: move configuration from configure to Meson
trace: simple: pass trace_file unmodified to config-host.h
configure, meson: move fuzzing configuration to Meson
...

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

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# 65ce87d4 07-Oct-2021 Paolo Bonzini <pbonzini@redhat.com>

kconfig: split CONFIG_SPARSE_MEM from fuzzing

Pass CONFIG_FUZZ via host_kconfig, and use it to select the
sparse-mem device.

Cc: Alexander Oleinik <alxndr@bu.edu>
Reviewed-by: Alexander Bulekov <al

kconfig: split CONFIG_SPARSE_MEM from fuzzing

Pass CONFIG_FUZZ via host_kconfig, and use it to select the
sparse-mem device.

Cc: Alexander Oleinik <alxndr@bu.edu>
Reviewed-by: Alexander Bulekov <alxndr@bu.edu>
Reviewed-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Tested-by: Alexander Bulekov <alxndr@bu.edu>
Message-Id: <20211007130829.632254-1-pbonzini@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...


Revision tags: v6.1.0
# 367196ca 17-May-2021 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging

Pull request trivial-branch 20210515

# gpg: Signature made Sat 15 May 2021 11:02:59 BST
# gpg:

Merge remote-tracking branch 'remotes/vivier2/tags/trivial-branch-for-6.1-pull-request' into staging

Pull request trivial-branch 20210515

# gpg: Signature made Sat 15 May 2021 11:02:59 BST
# gpg: using RSA key CD2F75DDC8E3A4DC2E4F5173F30C38BD3F2FBE3C
# gpg: issuer "laurent@vivier.eu"
# gpg: Good signature from "Laurent Vivier <lvivier@redhat.com>" [full]
# gpg: aka "Laurent Vivier <laurent@vivier.eu>" [full]
# gpg: aka "Laurent Vivier (Red Hat) <lvivier@redhat.com>" [full]
# Primary key fingerprint: CD2F 75DD C8E3 A4DC 2E4F 5173 F30C 38BD 3F2F BE3C

* remotes/vivier2/tags/trivial-branch-for-6.1-pull-request:
target/avr: Ignore unimplemented WDR opcode
hw/avr/atmega.c: use the avr51 cpu for atmega1280
target/sh4: Return error if CPUClass::get_phys_page_debug() fails
multi-process: Avoid logical AND of mutually exclusive tests
hw/pci-host: Do not build gpex-acpi.c if GPEX is not selected
hw/mem/meson: Fix linking sparse-mem device with fuzzer
cutils: fix memory leak in get_relocated_path()
hw/rtc/mc146818rtc: Convert to 3-phase reset (Resettable interface)
hw/timer/etraxfs_timer: Convert to 3-phase reset (Resettable interface)
hw/gpio/aspeed: spelling fix (addtional)
qapi: spelling fix (addtional)
virtiofsd: Fix check of chown()'s return value
virtio-net: Constify VirtIOFeature feature_sizes[]
virtio-blk: Constify VirtIOFeature feature_sizes[]
hw/virtio: Pass virtio_feature_get_config_size() a const argument
backends/tpm: Replace qemu_mutex_lock calls with QEMU_LOCK_GUARD

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# b51d4467 06-Apr-2021 Philippe Mathieu-Daudé <philmd@redhat.com>

hw/mem/meson: Fix linking sparse-mem device with fuzzer

sparse-mem.c is added to the 'mem_ss' source set, which itself
is conditionally added to softmmu_ss if CONFIG_MEM_DEVICE is
selected.
But if C

hw/mem/meson: Fix linking sparse-mem device with fuzzer

sparse-mem.c is added to the 'mem_ss' source set, which itself
is conditionally added to softmmu_ss if CONFIG_MEM_DEVICE is
selected.
But if CONFIG_MEM_DEVICE isn't selected, we get a link failure
even if CONFIG_FUZZ is selected:

/usr/bin/ld: tests_qtest_fuzz_generic_fuzz.c.o: in function `generic_pre_fuzz':
tests/qtest/fuzz/generic_fuzz.c:826: undefined reference to `sparse_mem_init'
clang-10: error: linker command failed with exit code 1 (use -v to see invocation)

Fix by adding sparse-mem.c directly to the softmmu_ss set.

Fixes: 230376d285b ("memory: add a sparse memory device for fuzzing")
Signed-off-by: Philippe Mathieu-Daudé <philmd@redhat.com>
Reviewed-by: Alexander Bulekov <alxndr@bu.edu>
Message-Id: <20210406133944.4193691-1-philmd@redhat.com>
Signed-off-by: Laurent Vivier <laurent@vivier.eu>

show more ...


# 56b89f45 17-Mar-2021 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging

* add --enable/--disable-libgio to configure (Denis)
* small fixes (Pavel, myself)
* fuzzing update (Alexander)

Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging

* add --enable/--disable-libgio to configure (Denis)
* small fixes (Pavel, myself)
* fuzzing update (Alexander)

# gpg: Signature made Tue 16 Mar 2021 18:30:38 GMT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* remotes/bonzini-gitlab/tags/for-upstream:
qemu-timer: allow freeing a NULL timer
hw/i8254: fix vmstate load
scsi: fix sense code for EREMOTEIO
Revert "accel: kvm: Add aligment assert for kvm_log_clear_one_slot"
configure: add option to explicitly enable/disable libgio
fuzz: move some DMA hooks
fuzz: configure a sparse-mem device, by default
memory: add a sparse memory device for fuzzing
fuzz: add a am53c974 generic-fuzzer config
fuzz: add instructions for building reproducers
fuzz: add a script to build reproducers
fuzz: don't leave orphan llvm-symbolizers around
fuzz: fix the pro100 generic-fuzzer config
MAINTAINERS: Cover fuzzer reproducer tests within 'Device Fuzzing'
tests/qtest: Only run fuzz-virtio-scsi when virtio-scsi is available
tests/qtest: Only run fuzz-megasas-test if megasas device is available

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

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# 230376d2 15-Mar-2021 Alexander Bulekov <alxndr@bu.edu>

memory: add a sparse memory device for fuzzing

For testing, it can be useful to simulate an enormous amount of memory
(e.g. 2^64 RAM). This adds an MMIO device that acts as sparse memory.
When somet

memory: add a sparse memory device for fuzzing

For testing, it can be useful to simulate an enormous amount of memory
(e.g. 2^64 RAM). This adds an MMIO device that acts as sparse memory.
When something writes a nonzero value to a sparse-mem address, we
allocate a block of memory. For now, since the only user of this device
is the fuzzer, we do not track and free zeroed blocks. The device has a
very low priority (so it can be mapped beneath actual RAM, and virtual
device MMIO regions).

Signed-off-by: Alexander Bulekov <alxndr@bu.edu>
Reviewed-by: Darren Kenny <darren.kenny@oracle.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...


Revision tags: v5.2.0
# 2d2c73d0 14-Sep-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200914-1' into staging

* hw/misc/a9scu: Do not allow invalid CPU count
* hw/misc/a9scu: Minor cleanups
* hw/timer/armv7m_syst

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200914-1' into staging

* hw/misc/a9scu: Do not allow invalid CPU count
* hw/misc/a9scu: Minor cleanups
* hw/timer/armv7m_systick: assert that board code set system_clock_scale
* decodetree: Improve identifier matching
* target/arm: Clean up neon fp insn size field decode
* target/arm: Remove KVM support for 32-bit Arm hosts
* hw/arm/mps2: New board models mps2-an386, mps2-an500
* Deprecate Unicore32 port
* Deprecate lm32 port
* target/arm: Count PMU events when MDCR.SPME is set
* hw/arm: versal-virt: Correct the tx/rx GEM clocks
* New Nuvoton iBMC board models npcm750-evb, quanta-gsj

# gpg: Signature made Mon 14 Sep 2020 16:02:06 BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20200914-1: (32 commits)
tests/acceptance: console boot tests for quanta-gsj
docs/system: Add Nuvoton machine documentation
hw/arm/npcm7xx: add board setup stub for CPU and UART clocks
hw/arm: Wire up BMC boot flash for npcm750-evb and quanta-gsj
hw/ssi: NPCM7xx Flash Interface Unit device model
hw/mem: Stubbed out NPCM7xx Memory Controller model
hw/nvram: NPCM7xx OTP device model
hw/arm: Load -bios image as a boot ROM for npcm7xx
roms: Add virtual Boot ROM for NPCM7xx SoCs
hw/arm: Add two NPCM7xx-based machines
hw/arm: Add NPCM730 and NPCM750 SoC models
hw/timer: Add NPCM7xx Timer device model
hw/misc: Add NPCM7xx Clock Controller device model
hw/misc: Add NPCM7xx System Global Control Registers device model
hw/arm: versal-virt: Correct the tx/rx GEM clocks
target/arm: Count PMU events when MDCR.SPME is set
Deprecate lm32 port
Deprecate Unicore32 port
docs/system/arm/mps2.rst: Make board list consistent
hw/arm/mps2: New board model mps2-an500
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


# 1351f892 11-Sep-2020 Havard Skinnemoen <hskinnemoen@google.com>

hw/mem: Stubbed out NPCM7xx Memory Controller model

This just implements the bare minimum to cause the boot block to skip
memory initialization.

Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Review

hw/mem: Stubbed out NPCM7xx Memory Controller model

This just implements the bare minimum to cause the boot block to skip
memory initialization.

Reviewed-by: Tyrone Ting <kfting@nuvoton.com>
Reviewed-by: Cédric Le Goater <clg@kaod.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Tested-by: Alexander Bulekov <alxndr@bu.edu>
Signed-off-by: Havard Skinnemoen <hskinnemoen@google.com>
Message-id: 20200911052101.2602693-10-hskinnemoen@google.com
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


# 7fd51e68 21-Aug-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging

New build system, with "fake in-tree builds" support.

Missing:
* converting configure tests
* converting unit te

Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging

New build system, with "fake in-tree builds" support.

Missing:
* converting configure tests
* converting unit tests
* converting some remaining parts of the installation

# gpg: Signature made Fri 21 Aug 2020 11:33:35 BST
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* remotes/bonzini-gitlab/tags/for-upstream: (152 commits)
docs: convert build system documentation to rST
meson: update build-system documentation
meson: avoid unstable module warning with Meson 0.56.0 or newer
meson: convert po/
meson: convert VNC and dependent libraries to meson
meson: move SDL and SDL-image detection to meson
meson: convert sample plugins
meson: replace create-config with meson configure_file
rules.mak: drop unneeded macros
meson: convert check-block
meson: build texi doc
docs: automatically track manual dependencies
meson: sphinx-build
remove Makefile.target
rules.mak: remove version.o
meson: convert systemtap files
configure: place compatibility symlinks in target directories
meson: link emulators without Makefile.target
meson: plugins
meson: cpu-emu
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


Revision tags: v5.0.0, v4.2.0
# 97813b94 15-Aug-2019 Marc-André Lureau <marcandre.lureau@redhat.com>

meson: convert hw/mem

Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>