Revision tags: v9.2.0, v9.1.2, v9.1.1 |
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#
f774a677 |
| 15-Oct-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20241015-1' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm/omap1: Remove unused omap_uwire_attach() method * stm32f405: Add R
Merge tag 'pull-target-arm-20241015-1' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm/omap1: Remove unused omap_uwire_attach() method * stm32f405: Add RCC device to stm32f405 SoC * arm/gicv3: add missing casts * hw/misc: Create STM32L4x5 SYSCFG clock * hw/arm: Add SPI to Allwinner A10 * hw/intc/omap_intc: Remove now-unnecessary abstract base class * hw/char/pl011: Use correct masks for IBRD and FBRD * docs/devel: Convert txt files to rST * Remove MAX111X, MAX7310, DSCM-1XXXX, pcmcia devices (used only by now-removed omap/pxa2xx boards) * vl.c: Remove pxa2xx-specific -portrait and -rotate options * dma: Fix function names in documentation * hw/arm/xilinx_zynq: Add various missing unimplemented devices
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmcOeWEZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3jCMD/482mpT1s+mrEJFWSJJXU4G # 8kr4Zj6+NafbayJ0vHTkpSbkEbPxuvDiUqmlnbI+3o11i+Z3IyiaGZbba7dyNnKl # 02MdQavL0dB+eMrcFNofRRvwvsposuj2ixgwTQe6L32HSFdHerVVwuhHM/wfwyCh # DKt7gPRovD/7CtwDOSpyW7cK64WK1IUlE8VEsbFdQbCPkopm55LQ2sLT4TshadpG # A6xcxyLN0x/lHgCmvijB1T09LSc1nQpUEQNIokC4f1Rmy6HNgGDYY1G7GAJf99mT # nWhATuuhZThiYfRbN5KQoS9tGEUduxtkGhHiOgpdXpgc3cS7RusCHoqAnibpsVh3 # TgAkaRAX1d/jQ2KYR2h2jI3nh66ObhrFRT3dkzRZrIvmK9zeWUKmS9lzZ94aVfPH # +MtBPwsO5OhzEABs8WpMY9V1nYaYDsFATMc1akUSaSLn1Er9Uz66NIk+J4Lob4P0 # 78IPvTmwvAIITiqQvkISsc37n5a2/toeaffU2hPKtQLlhyilWynEZA5YItrXSTuk # gYIBxyZSbzGj/ofZ9T9C0GDLbhJp9ksNIpIqRUiHOH3z9b85r7HVZORp+COw/ZXR # UGak6rpJ+XVOxVL/cPRTvZB0RbUHIZh7WLNH2G7Tfv4E4llqL81iuImHXVh/2CXO # 9GWr9qbDLDYQ+BI7ipLAYg== # =n2CA # -----END PGP SIGNATURE----- # gpg: Signature made Tue 15 Oct 2024 15:17:05 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20241015-1' of https://git.linaro.org/people/pmaydell/qemu-arm: (28 commits) hw/arm/xilinx_zynq: Add various missing unimplemented devices dma: Fix function names in documentation vl.c: Remove pxa2xx-specific -portrait and -rotate options hw/block: Remove ecc hw: Remove PCMCIA subsystem hw/ide: Remove DSCM-1XXXX microdrive device model hw/gpio: Remove MAX7310 device hw/adc: Remove MAX111X device docs/devel/lockcnt: Include kernel-doc API documentation include: Move QemuLockCnt APIs to their own header docs/devel/rcu: Convert to rST format docs/devel/multiple-iothreads: Convert to rST format docs/devel/lockcnt: Convert to rST format docs/devel/blkverify: Convert to rST format docs/devel/blkdebug: Convert to rST format hw/char/pl011: Use correct masks for IBRD and FBRD hw/intc/omap_intc: Remove now-unnecessary abstract base class hw/arm: Add SPI to Allwinner A10 hw/ssi: Allwinner A10 SPI emulation tests/qtest: Check STM32L4x5 clock connections ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
ff788b70 |
| 14-Oct-2024 |
Peter Maydell <peter.maydell@linaro.org> |
hw/adc: Remove MAX111X device
The MAX111X ADC device was used only by the XScale-based Zaurus machine types. Now they have all been removed, we can drop this device model too.
Because this device i
hw/adc: Remove MAX111X device
The MAX111X ADC device was used only by the XScale-based Zaurus machine types. Now they have all been removed, we can drop this device model too.
Because this device is an SSI device, in theory it could be created by users on the command line for boards with a different SSI controller, but we don't believe users are doing this -- it would be impossible on the command line to connect up the GPIO inputs which correspond to ADC inputs, or the GPIO output which is an interrupt line. The only example a web search produces for "device max1111" or "device max1110" is our own bug report https://gitlab.com/qemu-project/qemu/-/issues/2228 where it's used as an example of a bogus command that causes an assertion in an aspeed machine type that wasn't expecting anything other than flash devices on its SMC bus.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Message-id: 20241003140010.1653808-2-peter.maydell@linaro.org
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Revision tags: v9.1.0 |
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#
cab35c73 |
| 20-Jun-2023 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-tcg-20230620' of https://gitlab.com/rth7680/qemu into staging
tcg: Define _CALL_AIX for clang on ppc64 accel/tcg: Build fix for macos catalina accel/tcg: Handle MO_ATOM_WITHIN16 in d
Merge tag 'pull-tcg-20230620' of https://gitlab.com/rth7680/qemu into staging
tcg: Define _CALL_AIX for clang on ppc64 accel/tcg: Build fix for macos catalina accel/tcg: Handle MO_ATOM_WITHIN16 in do_st16_leN accel/tcg: Restrict SavedIOTLB to system emulation accel/tcg: Use generic 'helper-proto-common.h' header plugins: Remove unused 'exec/helper-proto.h' header *: Check for CONFIG_USER_ONLY instead of CONFIG_SOFTMMU
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmSRYmIdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8zbAgAlX4GcShS1OU1BDRe # b0HHHj1fFBB/9yk8f/5WuQb2snYS+pcZCez9XeT175ugovXSOz+shvmFrbRPvpfj # q8C88CIKCJRsXnhWqKWOKDqgTttu2WNXOvCe0eCZbUoGQ9K1seMvUBq6T50fNv2H # fXeHtLSu/+jiHIN3+woJqdgrkp0cko2rrpnwIpjuIsY1iz/J/VKEHmnv7Ah+GsRs # OTYnR7iN6uhBXVll14r3UCylbgdEz58sSSEi3dYYfaTRuijDwOzM0evhk6+5XzHP # DYwGdbtDE5HJOrCLiKegk80Gh6v1XVZQWnn9PdiN1eJcQsWNT9mYV9/4IsCVrsF4 # 8r5KUg== # =JmjK # -----END PGP SIGNATURE----- # gpg: Signature made Tue 20 Jun 2023 10:25:06 AM CEST # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [ultimate]
* tag 'pull-tcg-20230620' of https://gitlab.com/rth7680/qemu: cputlb: Restrict SavedIOTLB to system emulation exec/cpu-defs: Check for SOFTMMU instead of !USER_ONLY accel/tcg/cpu-exec: Use generic 'helper-proto-common.h' header plugins: Remove unused 'exec/helper-proto.h' header meson: Replace softmmu_ss -> system_ss meson: Replace CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY meson: Alias CONFIG_SOFTMMU -> CONFIG_SYSTEM_ONLY accel/tcg: Check for USER_ONLY definition instead of SOFTMMU one hw/core/cpu: Check for USER_ONLY definition instead of SOFTMMU one target/ppc: Check for USER_ONLY definition instead of SOFTMMU one target/m68k: Check for USER_ONLY definition instead of SOFTMMU one target/tricore: Remove pointless CONFIG_SOFTMMU guard target/i386: Simplify i386_tr_init_disas_context() tcg/ppc: Define _CALL_AIX for clang on ppc64(be) accel/tcg: Handle MO_ATOM_WITHIN16 in do_st16_leN host/include/x86_64: Use __m128i for "x" constraints
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
de6cd759 |
| 13-Jun-2023 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
meson: Replace softmmu_ss -> system_ss
We use the user_ss[] array to hold the user emulation sources, and the softmmu_ss[] array to hold the system emulation ones. Hold the latter in the 'system_ss[
meson: Replace softmmu_ss -> system_ss
We use the user_ss[] array to hold the user emulation sources, and the softmmu_ss[] array to hold the system emulation ones. Hold the latter in the 'system_ss[]' array for parity with user emulation.
Mechanical change doing:
$ sed -i -e s/softmmu_ss/system_ss/g $(git grep -l softmmu_ss)
Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20230613133347.82210-10-philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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Revision tags: v8.0.0, v7.2.0, v7.0.0, v6.2.0 |
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#
81d8537c |
| 12-Oct-2021 |
Richard Henderson <richard.henderson@linaro.org> |
Merge remote-tracking branch 'remotes/clg/tags/pull-aspeed-20211012' into staging
Aspeed patches :
* I2C QOMify (Cedric) * SMC model cleanup and QOMify (Cedric) * ADC model (Peter and Andrew) * GPI
Merge remote-tracking branch 'remotes/clg/tags/pull-aspeed-20211012' into staging
Aspeed patches :
* I2C QOMify (Cedric) * SMC model cleanup and QOMify (Cedric) * ADC model (Peter and Andrew) * GPIO fixes (Peter)
# gpg: Signature made Tue 12 Oct 2021 12:36:22 AM PDT # gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1 # gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [marginal] # gpg: WARNING: This key is not certified with sufficiently trusted signatures! # gpg: It is not certain that the signature belongs to the owner. # Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1
* remotes/clg/tags/pull-aspeed-20211012: aspeed/smc: Dump address offset in trace events aspeed/wdt: Add trace events hw/arm: Integrate ADC model into Aspeed SoC hw/adc: Add basic Aspeed ADC model hw: aspeed_gpio: Fix GPIO array indexing hw: aspeed_gpio: Fix pin I/O type declarations aspeed/i2c: QOMify AspeedI2CBus aspeed/smc: Remove unused attribute 'irqline' aspeed/smc: Introduce a new addr_width() class handler aspeed/smc: Add default reset values aspeed/smc: QOMify AspeedSMCFlash aspeed/smc: Rename AspeedSMCFlash 'id' to 'cs' aspeed/smc: Remove the 'size' attribute from AspeedSMCFlash aspeed/smc: Remove the 'flash' attribute from AspeedSMCFlash aspeed/smc: Drop AspeedSMCController structure aspeed/smc: Stop using the model name for the memory regions aspeed/smc: Introduce aspeed_smc_error() helper aspeed/smc: Add watchdog Control/Status Registers
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
5857974d |
| 12-Oct-2021 |
Andrew Jeffery <andrew@aj.id.au> |
hw/adc: Add basic Aspeed ADC model
This model implements enough behaviour to do basic functionality tests such as device initialisation and read out of dummy sample values. The sample value generati
hw/adc: Add basic Aspeed ADC model
This model implements enough behaviour to do basic functionality tests such as device initialisation and read out of dummy sample values. The sample value generation strategy is similar to the STM ADC already in the tree.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [clg : support for multiple engines (AST2600) ] Signed-off-by: Cédric Le Goater <clg@kaod.org> [pdel : refactored engine register struct fields to regs[] array field] [pdel : added guest-error checking for upper-8 channel regs in AST2600] [pdel : allow 16-bit reads of the channel data registers] Signed-off-by: Peter Delevoryas <pdel@fb.com> Message-Id: <20211005052604.1674891-2-pdel@fb.com> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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859524ee |
| 21-Sep-2021 |
Andrew Jeffery <andrew@aj.id.au> |
hw/adc: Add basic Aspeed ADC model
This model implements enough behaviour to do basic functionality tests such as device initialisation and read out of dummy sample values. The sample value generati
hw/adc: Add basic Aspeed ADC model
This model implements enough behaviour to do basic functionality tests such as device initialisation and read out of dummy sample values. The sample value generation strategy is similar to the STM ADC already in the tree.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au> [clg : support for multiple engines (AST2600) ] Signed-off-by: Cédric Le Goater <clg@kaod.org>
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Revision tags: v6.1.0 |
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#
9516034d |
| 11-Jul-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-2' into staging
Some qemu updates for IPMI and I2C
Move some ADC file to where they belong and move some sensors to a sensor directo
Merge remote-tracking branch 'remotes/cminyard/tags/for-qemu-6.1-2' into staging
Some qemu updates for IPMI and I2C
Move some ADC file to where they belong and move some sensors to a sensor directory, since with new BMCs coming in lots of different sensors should be coming in. Keep from cluttering things up.
Add support for I2C PMBus devices.
Replace the confusing and error-prone i2c_send_recv and i2c_transfer with specific send and receive functions. Several errors have already been made with these, avoid any new errors.
Fix the watchdog_expired field in the IPMI watchdog, it's not a bool, it's a u8. After a vmstate transfer, the new value could be wrong.
# gpg: Signature made Fri 09 Jul 2021 17:25:04 BST # gpg: using RSA key FD0D5CE67CE0F59A6688268661F38C90919BFF81 # gpg: Good signature from "Corey Minyard <cminyard@mvista.com>" [unknown] # gpg: aka "Corey Minyard <minyard@acm.org>" [unknown] # gpg: aka "Corey Minyard <corey@minyard.net>" [unknown] # gpg: aka "Corey Minyard <minyard@mvista.com>" [unknown] # gpg: WARNING: This key is not certified with a trusted signature! # gpg: There is no indication that the signature belongs to the owner. # Primary key fingerprint: FD0D 5CE6 7CE0 F59A 6688 2686 61F3 8C90 919B FF81
* remotes/cminyard/tags/for-qemu-6.1-2: (24 commits) tests/qtest: add tests for MAX34451 device model hw/misc: add MAX34451 device tests/qtest: add tests for ADM1272 device model hw/misc: add ADM1272 device hw/i2c: add support for PMBus ipmi/sim: fix watchdog_expired data type error in IPMIBmcSim struct hw/i2c: Introduce i2c_start_recv() and i2c_start_send() hw/i2c: Extract i2c_do_start_transfer() from i2c_start_transfer() hw/i2c: Make i2c_start_transfer() direction argument a boolean hw/i2c: Rename i2c_set_slave_address() -> i2c_slave_set_address() hw/i2c: Remove confusing i2c_send_recv() hw/misc/auxbus: Replace i2c_send_recv() by i2c_recv() & i2c_send() hw/misc/auxbus: Replace 'is_write' boolean by its value hw/misc/auxbus: Explode READ_I2C / WRITE_I2C_MOT cases hw/misc/auxbus: Fix MOT/classic I2C mode hw/i2c/ppc4xx_i2c: Replace i2c_send_recv() by i2c_recv() & i2c_send() hw/i2c/ppc4xx_i2c: Add reference to datasheet hw/display/sm501: Replace i2c_send_recv() by i2c_recv() & i2c_send() hw/display/sm501: Simplify sm501_i2c_write() logic hw/input/lm832x: Define TYPE_LM8323 in public header ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
58f3e3fe |
| 18-May-2021 |
Corey Minyard <cminyard@mvista.com> |
adc: Move the max111x driver to the adc directory
It's an adc, put it where it belongs.
Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.o
adc: Move the max111x driver to the adc directory
It's an adc, put it where it belongs.
Cc: Andrzej Zaborowski <balrogg@gmail.com> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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246f530c |
| 18-May-2021 |
Corey Minyard <cminyard@mvista.com> |
adc: Move the zynq-xadc file to the adc directories
It's an ADC, put it where it belongs.
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Alistair Francis <alistair@alistair23.me> Cc: Peter Ma
adc: Move the zynq-xadc file to the adc directories
It's an ADC, put it where it belongs.
Cc: Edgar E. Iglesias <edgar.iglesias@gmail.com> Cc: Alistair Francis <alistair@alistair23.me> Cc: Peter Maydell <peter.maydell@linaro.org> Cc: qemu-arm@nongnu.org Signed-off-by: Corey Minyard <cminyard@mvista.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com>
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#
8a496862 |
| 09-Dec-2020 |
Andrew Jeffery <andrew@aj.id.au> |
hw/adc: Add basic Aspeed ADC model
This model implements enough behaviour to do basic functionality tests such as device initialisation and read out of dummy sample values. The sample value generati
hw/adc: Add basic Aspeed ADC model
This model implements enough behaviour to do basic functionality tests such as device initialisation and read out of dummy sample values. The sample value generation strategy is similar to the STM ADC already in the tree.
Signed-off-by: Andrew Jeffery <andrew@aj.id.au> Signed-off-by: Cédric Le Goater <clg@kaod.org>
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#
f8e1d885 |
| 12-Jan-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210112-1' into staging
target-arm queue: * arm: Support emulation of ARMv8.4-TTST extension * arm: Update cpu.h ID register fi
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210112-1' into staging
target-arm queue: * arm: Support emulation of ARMv8.4-TTST extension * arm: Update cpu.h ID register field definitions * arm: Fix breakage of XScale instruction emulation * hw/net/lan9118: Fix RX Status FIFO PEEK value * npcm7xx: Add ADC and PWM emulation * ui/cocoa: Make "open docs" help menu entry work again when binary is run from the build tree * ui/cocoa: Fix openFile: deprecation on Big Sur * docs: Add qemu-storage-daemon(1) manpage to meson.build
# gpg: Signature made Tue 12 Jan 2021 21:22:15 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210112-1: ui/cocoa: Fix openFile: deprecation on Big Sur hw/*: Use type casting for SysBusDevice in NPCM7XX hw/misc: Add QTest for NPCM7XX PWM Module hw/misc: Add a PWM module for NPCM7XX hw/adc: Add an ADC module for NPCM7XX hw/timer: Refactor NPCM7XX Timer to use CLK clock hw/misc: Add clock converter in NPCM7XX CLK module hw/net/lan9118: Add symbolic constants for register offsets hw/net/lan9118: Fix RX Status FIFO PEEK value target/arm: Don't decode insns in the XScale/iWMMXt space as cp insns docs: Add qemu-storage-daemon(1) manpage to meson.build ui/cocoa: Update path to docs in build tree target/arm: add aarch32 ID register fields to cpu.h target/arm: add aarch64 ID register fields to cpu.h target/arm: add descriptions of CLIDR_EL1, CCSIDR_EL1, CTR_EL0 to cpu.h target/arm: make ARMCPU.ctr 64-bit target/arm: make ARMCPU.clidr 64-bit target/arm: fix typo in cpu.h ID_AA64PFR1 field name target/arm: enable Small Translation tables in max CPU target/arm: ARMv8.4-TTST extension
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
77c05b0b |
| 08-Jan-2021 |
Hao Wu <wuhaotsh@google.com> |
hw/adc: Add an ADC module for NPCM7XX
The ADC is part of NPCM7XX Module. Its behavior is controled by the ADC_CON register. It converts one of the eight analog inputs into a digital input and stores
hw/adc: Add an ADC module for NPCM7XX
The ADC is part of NPCM7XX Module. Its behavior is controled by the ADC_CON register. It converts one of the eight analog inputs into a digital input and stores it in the ADC_DATA register when enabled.
Users can alter input value by using qom-set QMP command.
Reviewed-by: Havard Skinnemoen <hskinnemoen@google.com> Reviewed-by: Tyrone Ting <kfting@nuvoton.com> Signed-off-by: Hao Wu <wuhaotsh@google.com> Message-id: 20210108190945.949196-4-wuhaotsh@google.com [PMM: Added missing hw/adc/trace.h file] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v5.2.0 |
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#
7fd51e68 |
| 21-Aug-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
New build system, with "fake in-tree builds" support.
Missing: * converting configure tests * converting unit te
Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging
New build system, with "fake in-tree builds" support.
Missing: * converting configure tests * converting unit tests * converting some remaining parts of the installation
# gpg: Signature made Fri 21 Aug 2020 11:33:35 BST # gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83 # gpg: issuer "pbonzini@redhat.com" # gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full] # gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full] # Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1 # Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83
* remotes/bonzini-gitlab/tags/for-upstream: (152 commits) docs: convert build system documentation to rST meson: update build-system documentation meson: avoid unstable module warning with Meson 0.56.0 or newer meson: convert po/ meson: convert VNC and dependent libraries to meson meson: move SDL and SDL-image detection to meson meson: convert sample plugins meson: replace create-config with meson configure_file rules.mak: drop unneeded macros meson: convert check-block meson: build texi doc docs: automatically track manual dependencies meson: sphinx-build remove Makefile.target rules.mak: remove version.o meson: convert systemtap files configure: place compatibility symlinks in target directories meson: link emulators without Makefile.target meson: plugins meson: cpu-emu ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v5.0.0, v4.2.0 |
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#
b53d555f |
| 17-Aug-2019 |
Marc-André Lureau <marcandre.lureau@redhat.com> |
meson: convert hw/adc
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@redhat.com> Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
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