Revision tags: v9.2.0 |
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#
24602b77 |
| 28-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: bug fixes, new test
Some small bug fixes, notably a fix for a regression in cpu hotplug afte
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: bug fixes, new test
Some small bug fixes, notably a fix for a regression in cpu hotplug after migration. I also included a new test, just to help make sure we don't regress cxl.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: vhost: fail device start if iotlb update fails bios-tables-test: Add data for complex numa test (GI, GP etc) bios-tables-test: Add complex SRAT / HMAT test for GI GP bios-tables-test: Allow for new acpihmat-generic-x test data. qapi/qom: Change Since entry for AcpiGenericPortProperties to 9.2 hw/acpi: Fix size of HID in build_append_srat_acpi_device_handle() qapi: fix device-sync-config since-version hw/cxl: Check for zero length features in cmd_features_set_feature() tests/acpi: update expected blobs Revert "hw/acpi: Make CPUs ACPI `presence` conditional during vCPU hot-unplug" Revert "hw/acpi: Update ACPI `_STA` method with QOM vCPU ACPI Hotplug states" qtest: allow ACPI DSDT Table changes vhost_net: fix assertion triggered by batch of host notifiers processing
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v9.1.2 |
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#
13a4a6ba |
| 07-Nov-2024 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
hw/acpi: Fix size of HID in build_append_srat_acpi_device_handle()
The size should always be 8 so hard code that. By coincidience the incorrect use of sizeof(char *) is 8 on 64 bit hosts, but was ca
hw/acpi: Fix size of HID in build_append_srat_acpi_device_handle()
The size should always be 8 so hard code that. By coincidience the incorrect use of sizeof(char *) is 8 on 64 bit hosts, but was caught by CI testing with i686 as the host.
Reported-by: Michael S. Tsirkin <mst@redhat.com> Closes: https://lore.kernel.org/qemu-devel/20241104110025-mutt-send-email-mst@kernel.org/ Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20241107123446.902801-2-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Daniel P. Berrangé <berrange@redhat.com>
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#
9eb9350c |
| 05-Nov-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: features, fixes, cleanups
CXL now can use Generic Port Affinity Structures. CXL now allows c
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: features, fixes, cleanups
CXL now can use Generic Port Affinity Structures. CXL now allows control of link speed and width vhost-user-blk now supports live resize, by means of a new device-sync-config command amd iommu now supports interrupt remapping pcie devices now report extended tag field support intel_iommu dropped support for Transient Mapping, to match VTD spec arch agnostic ACPI infrastructure for vCPU Hotplug
Fixes, cleanups all over the place.
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (65 commits) intel_iommu: Add missed reserved bit check for IEC descriptor intel_iommu: Add missed sanity check for 256-bit invalidation queue intel_iommu: Send IQE event when setting reserved bit in IQT_TAIL hw/acpi: Update GED with vCPU Hotplug VMSD for migration tests/qtest/bios-tables-test: Update DSDT golden masters for x86/{pc,q35} hw/acpi: Update ACPI `_STA` method with QOM vCPU ACPI Hotplug states qtest: allow ACPI DSDT Table changes hw/acpi: Make CPUs ACPI `presence` conditional during vCPU hot-unplug hw/pci: Add parenthesis to PCI_BUILD_BDF macro hw/cxl: Ensure there is enough data to read the input header in cmd_get_physical_port_state() hw/cxl: Ensure there is enough data for the header in cmd_ccls_set_lsa() hw/cxl: Check that writes do not go beyond end of target attributes hw/cxl: Ensuring enough data to read parameters in cmd_tunnel_management_cmd() hw/cxl: Avoid accesses beyond the end of cel_log. hw/cxl: Check the length of data requested fits in get_log() hw/cxl: Check enough data in cmd_firmware_update_transfer() hw/cxl: Check input length is large enough in cmd_events_clear_records() hw/cxl: Check input includes at least the header in cmd_features_set_feature() hw/cxl: Check size of input data to dynamic capacity mailbox commands hw/cxl/cxl-mailbox-util: Fix output buffer index update when retrieving DC extents ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v9.1.1 |
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#
cf2181ae |
| 16-Sep-2024 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
hw/acpi: Make storage of node id uint32_t to reduce fragility
>From review of generic port introduction.
The value is handled as a uint32_t so store it in that type. The value cannot in reality exc
hw/acpi: Make storage of node id uint32_t to reduce fragility
>From review of generic port introduction.
The value is handled as a uint32_t so store it in that type. The value cannot in reality exceed MAX_NODES which is currently 128 but if the types are matched there is no need to rely on that restriction.
Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20240916174237.1843213-1-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
a82fe829 |
| 16-Sep-2024 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
hw/acpi: Generic Port Affinity Structure support
These are very similar to the recently added Generic Initiators but instead of representing an initiator of memory traffic they represent an edge poi
hw/acpi: Generic Port Affinity Structure support
These are very similar to the recently added Generic Initiators but instead of representing an initiator of memory traffic they represent an edge point beyond which may lie either targets or initiators. Here we add these ports such that they may be targets of hmat_lb records to describe the latency and bandwidth from host side initiators to the port. A discoverable mechanism such as UEFI CDAT read from CXL devices and switches is used to discover the remainder of the path, and the OS can build up full latency and bandwidth numbers as need for work and data placement decisions.
Acked-by: Markus Armbruster <armbru@redhat.com> Tested-by: "Huang, Ying" <ying.huang@intel.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20240916174122.1843197-1-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
d8a4b4c3 |
| 16-Sep-2024 |
Jonathan Cameron <Jonathan.Cameron@huawei.com> |
hw/acpi: Move AML building code for Generic Initiators to aml_build.c
Rather than attempting to create a generic function with mess of the two different device handle types, use a PCI handle specifi
hw/acpi: Move AML building code for Generic Initiators to aml_build.c
Rather than attempting to create a generic function with mess of the two different device handle types, use a PCI handle specific variant. If the ACPI handle form is needed then that can be introduced alongside this with little duplicated code.
Drop the PCIDeviceHandle in favor of just passing the bus, devfn and segment directly. devfn kept as a single byte because ARI means that in this case it is just an 8 bit function number.
Suggested-by: Igor Mammedov <imammedo@redhat.com> Link: https://lore.kernel.org/qemu-devel/20240618142333.102be976@imammedo.users.ipa.redhat.com/ Tested-by: "Huang, Ying" <ying.huang@intel.com> Reviewed-by: Igor Mammedov <imammedo@redhat.com> Signed-off-by: Jonathan Cameron <Jonathan.Cameron@huawei.com> Message-Id: <20240916171017.1841767-4-Jonathan.Cameron@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
173c427e |
| 28-Sep-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-request-2024-09-25' of https://gitlab.com/thuth/qemu into staging
* Convert more Avocado tests to the new functional test framework * Clean up assert() statements, use g_assert_not_r
Merge tag 'pull-request-2024-09-25' of https://gitlab.com/thuth/qemu into staging
* Convert more Avocado tests to the new functional test framework * Clean up assert() statements, use g_assert_not_reached() when possible * Improve output of the gitlab CI jobs
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* tag 'pull-request-2024-09-25' of https://gitlab.com/thuth/qemu: (44 commits) .gitlab-ci.d: Make separate collapsible log sections for build and test .gitlab-ci.d: Split build and test in cross build job templates scripts/checkpatch.pl: emit error when using assert(false) tests/qtest: remove return after g_assert_not_reached() qom: remove return after g_assert_not_reached() qobject: remove return after g_assert_not_reached() migration: remove return after g_assert_not_reached() hw/ppc: remove return after g_assert_not_reached() hw/pci: remove return after g_assert_not_reached() hw/net: remove return after g_assert_not_reached() hw/hyperv: remove return after g_assert_not_reached() include/qemu: remove return after g_assert_not_reached() tcg/loongarch64: remove break after g_assert_not_reached() fpu: remove break after g_assert_not_reached() target/riscv: remove break after g_assert_not_reached() target/arm: remove break after g_assert_not_reached() hw/tpm: remove break after g_assert_not_reached() hw/scsi: remove break after g_assert_not_reached() hw/net: remove break after g_assert_not_reached() hw/acpi: remove break after g_assert_not_reached() ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
60053abd |
| 18-Sep-2024 |
Pierrick Bouvier <pierrick.bouvier@linaro.org> |
hw/acpi: remove break after g_assert_not_reached()
This patch is part of a series that moves towards a consistent use of g_assert_not_reached() rather than an ad hoc mix of different assertion mecha
hw/acpi: remove break after g_assert_not_reached()
This patch is part of a series that moves towards a consistent use of g_assert_not_reached() rather than an ad hoc mix of different assertion mechanisms.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-ID: <20240919044641.386068-18-pierrick.bouvier@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
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#
3f46ff1d |
| 18-Sep-2024 |
Pierrick Bouvier <pierrick.bouvier@linaro.org> |
hw/acpi: replace assert(0) with g_assert_not_reached()
This patch is part of a series that moves towards a consistent use of g_assert_not_reached() rather than an ad hoc mix of different assertion m
hw/acpi: replace assert(0) with g_assert_not_reached()
This patch is part of a series that moves towards a consistent use of g_assert_not_reached() rather than an ad hoc mix of different assertion mechanisms.
Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org> Message-ID: <20240919044641.386068-2-pierrick.bouvier@linaro.org> Signed-off-by: Thomas Huth <thuth@redhat.com>
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Revision tags: v9.1.0 |
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#
cbccded4 |
| 08-Mar-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-riscv-to-apply-20240308-1' of https://github.com/alistair23/qemu into staging
RISC-V PR for 9.0
* Update $ra with current $pc in trans_cm_jalt * Enable SPCR for SCPI virt machine *
Merge tag 'pull-riscv-to-apply-20240308-1' of https://github.com/alistair23/qemu into staging
RISC-V PR for 9.0
* Update $ra with current $pc in trans_cm_jalt * Enable SPCR for SCPI virt machine * Allow large kernels to boot by moving the initrd further away in RAM * Sync hwprobe keys with kernel * Named features riscv,isa, 'svade' rework * FIX xATP_MODE validation * Add missing include guard in pmu.h * Add SRAT and SLIT ACPI tables * libqos fixes and add a riscv machine * Add Ztso extension * Use 'zfa' instead of 'Zfa' * Update KVM exts to Linux 6.8 * move ratified/frozen exts to non-experimental * Ensure mcountinhibit, mcounteren, scounteren, hcounteren are 32-bit * mark_vs_dirty() before loads and stores * Remove 'is_store' bool from load/store fns * Fix shift count overflow * Fix setipnum_le write emulation for APLIC MSI-mode * Fix in_clrip[x] read emulation * Fix privilege mode of G-stage translation for debugging * Fix ACPI MCFG table for virt machine
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* tag 'pull-riscv-to-apply-20240308-1' of https://github.com/alistair23/qemu: (34 commits) target/riscv: fix ACPI MCFG table target/riscv: Fix privilege mode of G-stage translation for debugging hw/intc/riscv_aplic: Fix in_clrip[x] read emulation hw/intc/riscv_aplic: Fix setipnum_le write emulation for APLIC MSI-mode target/riscv: Fix shift count overflow trans_rvv.c.inc: remove 'is_store' bool from load/store fns trans_rvv.c.inc: mark_vs_dirty() before loads and stores target/riscv: mcountinhibit, mcounteren, scounteren, hcounteren is 32-bit target/riscv: move ratified/frozen exts to non-experimental target/riscv/kvm: update KVM exts to Linux 6.8 linux-headers: Update to Linux v6.8-rc6 tests: riscv64: Use 'zfa' instead of 'Zfa' linux-user/riscv: Add Ztso extension to hwprobe RISC-V: Add support for Ztso tests/libqos: add riscv/virt machine nodes hw/riscv/virt.c: make aclint compatible with 'qtest' accel hw/riscv/virt.c: add virtio-iommu-pci hotplug support hw/riscv/virt.c: create '/soc/pci@...' fdt node earlier hw/riscv/virt-acpi-build.c: Add SRAT and SLIT ACPI tables target/riscv: Add missing include guard in pmu.h ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
7dd0b070 |
| 28-Jan-2024 |
Sia Jee Heng <jeeheng.sia@starfivetech.com> |
hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location
RISC-V should also generate the SPCR in a manner similar to ARM. Therefore, instead of replicating the code, relocate this function
hw/arm/virt-acpi-build.c: Migrate SPCR creation to common location
RISC-V should also generate the SPCR in a manner similar to ARM. Therefore, instead of replicating the code, relocate this function to the common AML build.
Signed-off-by: Sia Jee Heng <jeeheng.sia@starfivetech.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-ID: <20240129021440.17640-2-jeeheng.sia@starfivetech.com> [ Changes by AF: - Add missing Language SPCR entry ] Signed-off-by: Alistair Francis <alistair.francis@wdc.com>
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#
b55e4b9c |
| 21-Sep-2023 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging
trivial patches for 2023-09-21
# -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmUL/84
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging
trivial patches for 2023-09-21
# -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmUL/84PHG1qdEB0bHMu # bXNrLnJ1AAoJEHAbT2saaT5Zlz4H/iI7Rhmsw6E46WhQPz1oly8p5I3m6Tcxs5B3 # nagfaJC0EYjKyMZC1bsATJwRj8robCb5SDhZeUfudt1ytZYFfH3ulvlUrGYrMQRW # YEfBFIDLexqrLpsykc6ovl2NB5BXQsK3n6NNbnYE1OxQt8Cy4kNQi1bStrZ8JzDE # lIxvWZdwoQJ2K0VRDGRLrL6XG80qeONSXEoppXxJlfhk1Ar3Ruhijn3REzfQybvV # 1zIa1/h80fSLuwOGSPuOLqVCt6JzTuOOrfYc9F+sjcmIQWHLECy6CwTHEbb921Tw # 9HD6ah4rvkxoN2NWSPo/kM6tNW/pyOiYwYldx5rfWcQ5mhScuO8= # =u6P0 # -----END PGP SIGNATURE----- # gpg: Signature made Thu 21 Sep 2023 04:33:18 EDT # gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59 # gpg: issuer "mjt@tls.msk.ru" # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full] # gpg: aka "Michael Tokarev <mjt@debian.org>" [full] # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59
* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: docs/devel/reset.rst: Correct function names docs/cxl: Cleanout some more aarch64 examples. hw/mem/cxl_type3: Add missing copyright and license notice hw/cxl: Fix out of bound array access docs/cxl: Change to lowercase as others hw/cxl/cxl_device: Replace magic number in CXLError definition hw/pci-bridge/cxl_upstream: Fix bandwidth entry base unit for SSLBIS hw/cxl: Fix CFMW config memory leak hw/i386/pc: fix code comment on cumulative flash size subprojects: Use the correct .git suffix in the repository URLs hw/other: spelling fixes hw/tpm: spelling fixes hw/pci: spelling fixes hw/net: spelling fixes i386: spelling fixes bsd-user: spelling fixes ppc: spelling fixes
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
9b4b4e51 |
| 14-Jul-2023 |
Michael Tokarev <mjt@tls.msk.ru> |
hw/other: spelling fixes
Signed-off-by: Michael Tokarev <mjt@tls.msk.ru> Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v8.0.0 |
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#
d6271b65 |
| 09-Jan-2023 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: features, cleanups, fixes
mostly vhost-vdpa: guest announce feature emulation when using
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
virtio,pc,pci: features, cleanups, fixes
mostly vhost-vdpa: guest announce feature emulation when using shadow virtqueue support for configure interrupt startup speed ups
an acpi change to only generate cluster node in PPTT when specified for arm
misc fixes, cleanups
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Sun 08 Jan 2023 08:01:39 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (50 commits) vhost-scsi: fix memleak of vsc->inflight acpi: cpuhp: fix guest-visible maximum access size to the legacy reg block tests: acpi: aarch64: Add *.topology tables tests: acpi: aarch64: Add topology test for aarch64 tests: acpi: Add and whitelist *.topology blobs tests: virt: Update expected ACPI tables for virt test hw/acpi/aml-build: Only generate cluster node in PPTT when specified tests: virt: Allow changes to PPTT test table virtio-pci: fix proxy->vector_irqfd leak in virtio_pci_set_guest_notifiers vdpa: commit all host notifier MRs in a single MR transaction vhost: configure all host notifiers in a single MR transaction vhost: simplify vhost_dev_enable_notifiers vdpa: harden the error path if get_iova_range failed vdpa-dev: get iova range explicitly docs/devel: Rules on #include in headers include: Include headers where needed include/hw/virtio: Break inclusion loop include/hw/cxl: Break inclusion loop cxl_pci.h and cxl_cdat_h include/hw/pci: Include hw/pci/pci.h where needed include/hw/pci: Split pci_device.h off pci.h ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
97f4effe |
| 29-Dec-2022 |
Yicong Yang <yangyicong@hisilicon.com> |
hw/acpi/aml-build: Only generate cluster node in PPTT when specified
Currently we'll always generate a cluster node no matter user has specified '-smp clusters=X' or not. Cluster is an optional leve
hw/acpi/aml-build: Only generate cluster node in PPTT when specified
Currently we'll always generate a cluster node no matter user has specified '-smp clusters=X' or not. Cluster is an optional level and will participant the building of Linux scheduling domains and only appears on a few platforms. It's unncessary to always build it when it cannot reflect the real topology on platforms having no cluster implementation and to avoid affecting the linux scheduling domains in the VM. So only generate the cluster topology in ACPI PPTT when the user has specified it explicitly in -smp.
Tested qemu-system-aarch64 with `-smp 8` and linux 6.1-rc1, without this patch: estuary:/sys/devices/system/cpu/cpu0/topology$ cat cluster_* ff # cluster_cpus 0-7 # cluster_cpus_list 56 # cluster_id
with this patch: estuary:/sys/devices/system/cpu/cpu0/topology$ cat cluster_* ff # cluster_cpus 0-7 # cluster_cpus_list 36 # cluster_id, with no cluster node kernel will make it to physical package id
Acked-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Yanan Wang <wangyanan55@huawei.com> Tested-by: Yanan Wang <wangyanan55@huawei.com> Signed-off-by: Yicong Yang <yangyicong@hisilicon.com> Message-Id: <20221229065513.55652-3-yangyicong@huawei.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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Revision tags: v7.2.0 |
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#
f21f1cfe |
| 07-Nov-2022 |
Stefan Hajnoczi <stefanha@redhat.com> |
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
pci,pc,virtio: features, tests, fixes, cleanups
lots of acpi rework first version of biosbits infrastructur
Merge tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu into staging
pci,pc,virtio: features, tests, fixes, cleanups
lots of acpi rework first version of biosbits infrastructure ASID support in vhost-vdpa core_count2 support in smbios PCIe DOE emulation virtio vq reset HMAT support part of infrastructure for viommu support in vhost-vdpa VTD PASID support fixes, tests all over the place
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEXQn9CHHI+FuUyooNKB8NuNKNVGkFAmNpXDkPHG1zdEByZWRo # YXQuY29tAAoJECgfDbjSjVRpD0AH/2G8ZPrgrxJC9y3uD5/5J6QRzO+TsDYbg5ut # uBf4rKSHHzcu6zdyAfsrhbAKKzyD4HrEGNXZrBjnKM1xCiB/SGBcDIWntwrca2+s # 5Dpbi4xvd4tg6tVD4b47XNDCcn2uUbeI0e2M5QIbtCmzdi/xKbFAfl5G8DQp431X # Kmz79G4CdKWyjVlM0HoYmdCw/4FxkdjD02tE/Uc5YMrePNaEg5Bw4hjCHbx1b6ur # 6gjeXAtncm9s4sO0l+sIdyiqlxiTry9FSr35WaQ0qPU+Og5zaf1EiWfdl8TRo4qU # EAATw5A4hyw11GfOGp7oOVkTGvcNB/H7aIxD7emdWZV8+BMRPKo= # =zTCn # -----END PGP SIGNATURE----- # gpg: Signature made Mon 07 Nov 2022 14:27:53 EST # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* tag 'for_upstream' of https://git.kernel.org/pub/scm/virt/kvm/mst/qemu: (83 commits) checkpatch: better pattern for inline comments hw/virtio: introduce virtio_device_should_start tests/acpi: update tables for new core count test bios-tables-test: add test for number of cores > 255 tests/acpi: allow changes for core_count2 test bios-tables-test: teach test to use smbios 3.0 tables hw/smbios: add core_count2 to smbios table type 4 vhost-user: Support vhost_dev_start vhost: Change the sequence of device start intel-iommu: PASID support intel-iommu: convert VTD_PE_GET_FPD_ERR() to be a function intel-iommu: drop VTDBus intel-iommu: don't warn guest errors when getting rid2pasid entry vfio: move implement of vfio_get_xlat_addr() to memory.c tests: virt: Update expected *.acpihmatvirt tables tests: acpi: aarch64/virt: add a test for hmat nodes with no initiators hw/arm/virt: Enable HMAT on arm virt machine tests: Add HMAT AArch64/virt empty table files tests: acpi: q35: update expected blobs *.hmat-noinitiators expected HMAT: tests: acpi: q35: add test for hmat nodes without initiators ...
Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>
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#
4496d1d3 |
| 11-Oct-2022 |
Miguel Luis <miguel.luis@oracle.com> |
acpi: fadt: support revision 6.0 of the ACPI specification
Update the Fixed ACPI Description Table (FADT) to revision 6.0 of the ACPI specification adding the field "Hypervisor Vendor Identity".
Th
acpi: fadt: support revision 6.0 of the ACPI specification
Update the Fixed ACPI Description Table (FADT) to revision 6.0 of the ACPI specification adding the field "Hypervisor Vendor Identity".
This field's description states the following: "64-bit identifier of hypervisor vendor. All bytes in this field are considered part of the vendor identity. These identifiers are defined independently by the vendors themselves, usually following the name of the hypervisor product. Version information should NOT be included in this field - this shall simply denote the vendor's name or identifier. Version information can be communicated through a supplemental vendor-specific hypervisor API. Firmware implementers would place zero bytes into this field, denoting that no hypervisor is present in the actual firmware."
Signed-off-by: Miguel Luis <miguel.luis@oracle.com> Reviewed-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20221011181730.10885-3-miguel.luis@oracle.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
b0c3c603 |
| 09-May-2022 |
Richard Henderson <richard.henderson@linaro.org> |
Merge tag 'pull-target-arm-20220509' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * MAINTAINERS/.mailmap: update email for Leif Lindholm * hw/arm: add version
Merge tag 'pull-target-arm-20220509' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * MAINTAINERS/.mailmap: update email for Leif Lindholm * hw/arm: add version information to sbsa-ref machine DT * Enable new features for -cpu max: FEAT_Debugv8p2, FEAT_Debugv8p4, FEAT_RAS (minimal version only), FEAT_IESB, FEAT_CSV2, FEAT_CSV2_2, FEAT_CSV3, FEAT_DGH * Emulate Cortex-A76 * Emulate Neoverse-N1 * Fix the virt board default NUMA topology
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmJ5AbsZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3vyFEACZZ6tRVJYB6YpIzI7rho9x # hVQIMTc4D5lmVetJnbLdLazifIy60oIOtSKV3Y3oj5DLMcsf6NITrPaFPWNRX3Nm # mcbTCT5FGj8i7b1CkpEylLwvRQbIaoz2GnJPckdYelxxAq1uJNog3fmoG8nVtJ1F # HfXVCVkZGQyiyr6Y2/zn3vpdp9n6/4RymN8ugizkcgIRII87DKV+DNDalw613JG4 # 5xxBOGkYzo5DZM8TgL8Ylmb5Jy9XY0EN1xpkyHFOg6gi0B3UZTxHq5SvK6NFoZLJ # ogyhmMh6IjEfhUIDCtWG9VCoPyWpOXAFoh7D7akFVB4g2SIvBvcuGzFxCAsh5q3K # s+9CgNX1SZpJQkT1jLjQlNzoUhh8lNc7QvhPWVrbAj3scc+1xVnS5MJsokEV21Cx # /bp3mFwCL+Q4gjsMKx1nKSvxLv8xlxRtIilmlfj+wvpkenIfIwHYjbvItJTlAy1L # +arx8fqImNQorxO6oMjOuAlSbNnDKup5qvwGghyu/qz/YEnGQVzN6gI324Km081L # 1u31H/B3C2rj3qMsYMp5yOqgprXi1D5c6wfYIpLD/C4UfHgIlRiprawZPDM7fAhX # vxhUhhj3e9OgkbC9yqd6SUR2Uk3YaQlp319LyoZa3VKSvjBTciFsMXXnIV1UitYp # BGtz8+FypPVkYH7zQB9c7Q== # =ey1m # -----END PGP SIGNATURE----- # gpg: Signature made Mon 09 May 2022 04:57:47 AM PDT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]
* tag 'pull-target-arm-20220509' of https://git.linaro.org/people/pmaydell/qemu-arm: (32 commits) hw/acpi/aml-build: Use existing CPU topology to build PPTT table hw/arm/virt: Fix CPU's default NUMA node ID qtest/numa-test: Correct CPU and NUMA association in aarch64_numa_cpu() hw/arm/virt: Consider SMP configuration in CPU topology qtest/numa-test: Specify CPU topology in aarch64_numa_cpu() qapi/machine.json: Add cluster-id hw/arm: add versioning to sbsa-ref machine DT target/arm: Define neoverse-n1 target/arm: Define cortex-a76 target/arm: Enable FEAT_DGH for -cpu max target/arm: Enable FEAT_CSV3 for -cpu max target/arm: Enable FEAT_CSV2_2 for -cpu max target/arm: Enable FEAT_CSV2 for -cpu max target/arm: Enable FEAT_IESB for -cpu max target/arm: Enable FEAT_RAS for -cpu max target/arm: Implement ESB instruction target/arm: Implement virtual SError exceptions target/arm: Enable SCR and HCR bits for RAS target/arm: Add minimal RAS registers target/arm: Enable FEAT_Debugv8p4 for -cpu max ...
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>
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#
ae9141d4 |
| 03-May-2022 |
Gavin Shan <gshan@redhat.com> |
hw/acpi/aml-build: Use existing CPU topology to build PPTT table
When the PPTT table is built, the CPU topology is re-calculated, but it's unecessary because the CPU topology has been populated in v
hw/acpi/aml-build: Use existing CPU topology to build PPTT table
When the PPTT table is built, the CPU topology is re-calculated, but it's unecessary because the CPU topology has been populated in virt_possible_cpu_arch_ids() on arm/virt machine.
This reworks build_pptt() to avoid by reusing the existing IDs in ms->possible_cpus. Currently, the only user of build_pptt() is arm/virt machine.
Signed-off-by: Gavin Shan <gshan@redhat.com> Tested-by: Yanan Wang <wangyanan55@huawei.com> Reviewed-by: Yanan Wang <wangyanan55@huawei.com> Acked-by: Igor Mammedov <imammedo@redhat.com> Acked-by: Michael S. Tsirkin <mst@redhat.com> Message-id: 20220503140304.855514-7-gshan@redhat.com Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v7.0.0 |
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#
04ddcda6 |
| 22-Mar-2022 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'fixes-pull-request' of gitlab.com:marcandre.lureau/qemu into staging
Fixes and cleanups for 7.0
Hi,
A collection of fixes & cleanup patches that should be safe for 7.0 inclusion.
# gpg
Merge tag 'fixes-pull-request' of gitlab.com:marcandre.lureau/qemu into staging
Fixes and cleanups for 7.0
Hi,
A collection of fixes & cleanup patches that should be safe for 7.0 inclusion.
# gpg: Signature made Tue 22 Mar 2022 12:11:30 GMT # gpg: using RSA key 87A9BD933F87C606D276F62DDAE8E10975969CE5 # gpg: issuer "marcandre.lureau@redhat.com" # gpg: Good signature from "Marc-André Lureau <marcandre.lureau@redhat.com>" [full] # gpg: aka "Marc-André Lureau <marcandre.lureau@gmail.com>" [full] # Primary key fingerprint: 87A9 BD93 3F87 C606 D276 F62D DAE8 E109 7596 9CE5
* tag 'fixes-pull-request' of gitlab.com:marcandre.lureau/qemu: (21 commits) qapi: remove needless include Remove trailing ; after G_DEFINE_AUTO macro tests: remove needless include error: use GLib to remember the program name qga: remove bswap.h include qapi: remove needless include meson: fix CONFIG_ATOMIC128 check meson: move int128 checks from configure qapi: remove needless include util: remove the net/net.h dependency util: remove needless includes scripts/modinfo-collect: remove unused/dead code Move HOST_LONG_BITS to compiler.h Simplify HOST_LONG_BITS compiler.h: replace QEMU_SENTINEL with G_GNUC_NULL_TERMINATED compiler.h: replace QEMU_WARN_UNUSED_RESULT with G_GNUC_WARN_UNUSED_RESULT Replace GCC_FMT_ATTR with G_GNUC_PRINTF Drop qemu_foo() socket API wrapper m68k/nios2-semi: fix gettimeofday() result check vl: typo fix in a comment ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
9edc6313 |
| 20-Feb-2022 |
Marc-André Lureau <marcandre.lureau@redhat.com> |
Replace GCC_FMT_ATTR with G_GNUC_PRINTF
One less qemu-specific macro. It also helps to make some headers/units only depend on glib, and thus moved in standalone projects eventually.
Signed-off-by:
Replace GCC_FMT_ATTR with G_GNUC_PRINTF
One less qemu-specific macro. It also helps to make some headers/units only depend on glib, and thus moved in standalone projects eventually.
Signed-off-by: Marc-André Lureau <marcandre.lureau@redhat.com> Reviewed-by: Richard W.M. Jones <rjones@redhat.com>
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#
9f0369ef |
| 08-Mar-2022 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
virtio,pc,pci: features, cleanups, fixes
vhost-user enabled on non-linux systems beginning of nvme sriov support bigger tx
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
virtio,pc,pci: features, cleanups, fixes
vhost-user enabled on non-linux systems beginning of nvme sriov support bigger tx queue for vdpa virtio iommu bypass FADT flag to detect legacy keyboards
Fixes, cleanups all over the place
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Mon 07 Mar 2022 22:43:31 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream: (47 commits) hw/acpi/microvm: turn on 8042 bit in FADT boot architecture flags if present tests/acpi: i386: update FACP table differences hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table tests/acpi: i386: allow FACP acpi table changes docs: vhost-user: add subsection for non-Linux platforms configure, meson: allow enabling vhost-user on all POSIX systems vhost: use wfd on functions setting vring call fd event_notifier: add event_notifier_get_wfd() pci: drop COMPAT_PROP_PCP for 2.0 machine types hw/smbios: Add table 4 parameter, "processor-id" x86: cleanup unused compat_apic_id_mode vhost-vsock: detach the virqueue element in case of error pc: add option to disable PS/2 mouse/keyboard acpi: pcihp: pcie: set power on cap on parent slot pci: expose TYPE_XIO3130_DOWNSTREAM name pci: show id info when pci BDF conflict hw/misc/pvpanic: Use standard headers instead headers: Add pvpanic.h pci-bridge/xio3130_downstream: Fix error handling pci-bridge/xio3130_upstream: Fix error handling ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
# Conflicts: # docs/specs/index.rst
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#
5334bf57 |
| 04-Mar-2022 |
Liav Albani <liavalb@gmail.com> |
hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table
This can allow the guest OS to determine more easily if i8042 controller is present in the system or not, so it doesn't need t
hw/acpi: add indication for i8042 in IA-PC boot flags of the FADT table
This can allow the guest OS to determine more easily if i8042 controller is present in the system or not, so it doesn't need to do probing of the controller, but just initialize it immediately, before enumerating the ACPI AML namespace.
The 8042 bit in IAPC_BOOT_ARCH was introduced from ACPI spec v2 (FADT revision 2 and above). Therefore, in this change, we only enable this bit for x86/q35 machine types since x86/i440fx machines use FADT ACPI table with revision 1.
Signed-off-by: Liav Albani <liavalb@gmail.com> Signed-off-by: Ani Sinha <ani@anisinha.ca> Message-Id: <20220304154032.2071585-3-ani@anisinha.ca> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
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#
0d564a3e |
| 06-Feb-2022 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
virtio,pc: features, cleanups, fixes
Part of ACPI ERST support fixes, cleanups
Signed-off-by: Michael S. Tsirkin <mst@redh
Merge remote-tracking branch 'remotes/mst/tags/for_upstream' into staging
virtio,pc: features, cleanups, fixes
Part of ACPI ERST support fixes, cleanups
Signed-off-by: Michael S. Tsirkin <mst@redhat.com>
# gpg: Signature made Sun 06 Feb 2022 09:36:24 GMT # gpg: using RSA key 5D09FD0871C8F85B94CA8A0D281F0DB8D28D5469 # gpg: issuer "mst@redhat.com" # gpg: Good signature from "Michael S. Tsirkin <mst@kernel.org>" [full] # gpg: aka "Michael S. Tsirkin <mst@redhat.com>" [full] # Primary key fingerprint: 0270 606B 6F3C DF3D 0B17 0970 C350 3912 AFBE 8E67 # Subkey fingerprint: 5D09 FD08 71C8 F85B 94CA 8A0D 281F 0DB8 D28D 5469
* remotes/mst/tags/for_upstream: (24 commits) util/oslib-posix: Fix missing unlock in the error path of os_mem_prealloc() ACPI ERST: step 6 of bios-tables-test.c ACPI ERST: bios-tables-test testcase ACPI ERST: qtest for ERST ACPI ERST: create ACPI ERST table for pc/x86 machines ACPI ERST: build the ACPI ERST table ACPI ERST: support for ACPI ERST feature ACPI ERST: header file for ERST ACPI ERST: PCI device_id for ERST ACPI ERST: bios-tables-test.c steps 1 and 2 libvhost-user: Map shared RAM with MAP_NORESERVE to support virtio-mem with hugetlb libvhost-user: handle removal of identical regions libvhost-user: prevent over-running max RAM slots libvhost-user: fix VHOST_USER_REM_MEM_REG not closing the fd libvhost-user: Simplify VHOST_USER_REM_MEM_REG libvhost-user: Add vu_add_mem_reg input validation libvhost-user: Add vu_rem_mem_reg input validation tests: acpi: test short OEM_ID/OEM_TABLE_ID values in test_oem_fields() tests: acpi: update expected blobs acpi: fix OEM ID/OEM Table ID padding ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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748c030f |
| 12-Jan-2022 |
Igor Mammedov <imammedo@redhat.com> |
acpi: fix OEM ID/OEM Table ID padding
Commit [2] broke original '\0' padding of OEM ID and OEM Table ID fields in headers of ACPI tables. While it doesn't have impact on default values since QEMU us
acpi: fix OEM ID/OEM Table ID padding
Commit [2] broke original '\0' padding of OEM ID and OEM Table ID fields in headers of ACPI tables. While it doesn't have impact on default values since QEMU uses 6 and 8 characters long values respectively, it broke usecase where IDs are provided on QEMU CLI. It shouldn't affect guest (but may cause licensing verification issues in guest OS). One of the broken usecases is user supplied SLIC table with IDs shorter than max possible length, where [2] mangles IDs with extra spaces in RSDT and FADT tables whereas guest OS expects those to mirror the respective values of the used SLIC table.
Fix it by replacing whitespace padding with '\0' padding in accordance with [1] and expectations of guest OS
1) ACPI spec, v2.0b 17.2 AML Grammar Definition ... //OEM ID of up to 6 characters. If the OEM ID is //shorter than 6 characters, it can be terminated //with a NULL character.
2) Fixes: 602b458201 ("acpi: Permit OEM ID and OEM table ID fields to be changed") Resolves: https://gitlab.com/qemu-project/qemu/-/issues/707 Reported-by: Dmitry V. Orekhov <dima.orekhov@gmail.com> Signed-off-by: Igor Mammedov <imammedo@redhat.com> Cc: qemu-stable@nongnu.org Message-Id: <20220112130332.1648664-4-imammedo@redhat.com> Reviewed-by: Michael S. Tsirkin <mst@redhat.com> Signed-off-by: Michael S. Tsirkin <mst@redhat.com> Reviewed-by: Ani Sinha <ani@anisinha.ca> Tested-by: Dmitry V. Orekhov dima.orekhov@gmail.com
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