Merge tag 'for-upstream-i386' of https://gitlab.com/bonzini/qemu into staging

* target/i386: new feature bits for AMD processors
* target/i386/tcg: improvements around flag handling
* target/i386: a

Merge tag 'for-upstream-i386' of https://gitlab.com/bonzini/qemu into staging

* target/i386: new feature bits for AMD processors
* target/i386/tcg: improvements around flag handling
* target/i386: add AVX10 support
* target/i386: add GraniteRapids-v2 model
* dockerfiles: add libcbor
* New nitro-enclave machine type
* qom: cleanups to object_new
* configure: detect 64-bit MIPS for rust
* configure: deprecate 32-bit MIPS

# -----BEGIN PGP SIGNATURE-----
#
# iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmcjvkQUHHBib256aW5p
# QHJlZGhhdC5jb20ACgkQv/vSX3jHroPIKgf/etNpO2T+eLFtWN/Qd5eopBXqNd9k
# KmeK9EgW9lqx2IPGNen33O+uKpb/TsMmubSsSF+YxTp7pmkc8+71f3rBMaIAD02r
# /paHSMVw0+f12DAFQz1jdvGihR7Mew0wcF/UdEt737y6vEmPxLTyYG3Gfa4NSZwT
# /V5jTOIcfUN/UEjNgIp6NTuOEESKmlqt22pfMapgkwMlAJYeeJU2X9eGYE86wJbq
# ZSXNgK3jL9wGT2XKa3e+OKzHfFpSkrB0JbQbdico9pefnBokN/hTeeUJ81wBAc7u
# i00W1CEQVJ5lhBc121d4AWMp83ME6HijJUOTMmJbFIONPsITFPHK1CAkng==
# =D4nR
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 31 Oct 2024 17:28:36 GMT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream-i386' of https://gitlab.com/bonzini/qemu: (49 commits)
target/i386: Introduce GraniteRapids-v2 model
target/i386: Add AVX512 state when AVX10 is supported
target/i386: Add feature dependencies for AVX10
target/i386: add CPUID.24 features for AVX10
target/i386: add AVX10 feature and AVX10 version property
target/i386: return bool from x86_cpu_filter_features
target/i386: do not rely on ExtSaveArea for accelerator-supported XCR0 bits
target/i386: cpu: set correct supported XCR0 features for TCG
target/i386: use + to put flags together
target/i386: use higher-precision arithmetic to compute CF
target/i386: use compiler builtin to compute PF
target/i386: make flag variables unsigned
target/i386: add a note about gen_jcc1
target/i386: add a few more trivial CCPrepare cases
target/i386: optimize TEST+Jxx sequences
target/i386: optimize computation of ZF from CC_OP_DYNAMIC
target/i386: Wrap cc_op_live with a validity check
target/i386: Introduce cc_op_size
target/i386: Rearrange CCOp
target/i386: remove CC_OP_CLR
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

docs/nitro-enclave: Documentation for nitro-enclave machine type

Signed-off-by: Dorjoy Chowdhury <dorjoychy111@gmail.com>
Reviewed-by: Alexander Graf <graf@amazon.com>
Link: https://lore.kernel.org/

docs/nitro-enclave: Documentation for nitro-enclave machine type

Signed-off-by: Dorjoy Chowdhury <dorjoychy111@gmail.com>
Reviewed-by: Alexander Graf <graf@amazon.com>
Link: https://lore.kernel.org/r/20241008211727.49088-7-dorjoychy111@gmail.com
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

Merge tag 'edgar/xen-queue-2024-09-04.for-upstream' of https://gitlab.com/edgar.iglesias/qemu into staging

Edgars Xen queue.

# -----BEGIN PGP SIGNATURE-----
#
# iQEzBAABCgAdFiEErET+3BT38evtv0FRKcWW

Merge tag 'edgar/xen-queue-2024-09-04.for-upstream' of https://gitlab.com/edgar.iglesias/qemu into staging

Edgars Xen queue.

# -----BEGIN PGP SIGNATURE-----
#
# iQEzBAABCgAdFiEErET+3BT38evtv0FRKcWWeA9ryoMFAmbYfMIACgkQKcWWeA9r
# yoNPfwgAuK6MyPGEJh75Pe7yEmkVeuL0RPTmet5Ie1WrywNsn91IybQGLctpxr1s
# 7m2Zhl3IWXV5Jezfr9gEnLF+LYBQgK0ENJWDTPuIqf7D5ZRtOVeaNqrQVJ10Jomn
# s1pn4kWtHxKsgWTzcdi3qP7vhxn1PllxE+yuOcoYQIHcUp1oQAHr6ApbAcxseWBE
# qPdgxT7nlvFdcKqkzxSgKy5MWjs3xcBg6R5Ywoy+t7lb003swivPnkK6MSt1P03h
# EkQsTWr0Ox4nACOWt15U0MoK5rtBEN7Gsox0FUEPF3QhmAJt75FTFLs8+JhqcnKH
# LMxud5C6t6FcI+kxPqPoIdEWy5uM6g==
# =hW3R
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 04 Sep 2024 16:29:06 BST
# gpg: using RSA key AC44FEDC14F7F1EBEDBF415129C596780F6BCA83
# gpg: Good signature from "Edgar E. Iglesias (Xilinx key) <edgar.iglesias@xilinx.com>" [unknown]
# gpg: aka "Edgar E. Iglesias <edgar.iglesias@gmail.com>" [full]
# Primary key fingerprint: AC44 FEDC 14F7 F1EB EDBF 4151 29C5 9678 0F6B CA83

* tag 'edgar/xen-queue-2024-09-04.for-upstream' of https://gitlab.com/edgar.iglesias/qemu:
docs/system/i386: xenpvh: Add a basic description
hw/i386/xen: Add a Xen PVH x86 machine
hw/xen: pvh-common: Add support for creating PCIe/GPEX
hw/arm: xenpvh: Reverse virtio-mmio creation order
hw/arm: xenpvh: Rename xen_arm.c -> xen-pvh.c
hw/arm: xenpvh: Break out a common PVH machine
hw/arm: xenpvh: Move stubbed functions to xen-stubs.c
hw/arm: xenpvh: Remove double-negation in warning
hw/arm: xenpvh: Add support for SMP guests
hw/arm: xenpvh: Tweak machine description
hw/arm: xenpvh: Update file header to use SPDX
MAINTAINERS: Add docs/system/arm/xenpvh.rst

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

docs/system/i386: xenpvh: Add a basic description

Signed-off-by: Edgar E. Iglesias <edgar.iglesias@amd.com>
Reviewed-by: Stefano Stabellini <sstabellini@kernel.org>

Merge tag 'pull-target-arm-20230512' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
* More refactoring of files into tcg/
* Don't allow stage 2 page table walks

Merge tag 'pull-target-arm-20230512' of https://git.linaro.org/people/pmaydell/qemu-arm into staging

target-arm queue:
* More refactoring of files into tcg/
* Don't allow stage 2 page table walks to downgrade to NS
* Fix handling of SW and NSW bits for stage 2 walks
* MAINTAINERS: Update Akihiko Odaki's email address
* ui: Fix pixel colour channel order for PNG screenshots
* docs: Remove unused weirdly-named cross-reference targets
* hw/mips/malta: Fix minor dead code issue
* Fixes for the "allow CONFIG_TCG=n" changes
* tests/qtest: Don't run cdrom boot tests if no accelerator is present
* target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check

# -----BEGIN PGP SIGNATURE-----
#
# iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmReXCMZHHBldGVyLm1h
# eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3hUTEACL2MrxSmAssP0pZ6qQGqgM
# uKz1aL8WDz2MyDzgt0jvy+bRw6081k4iyFGLpsHPWjAm9lipwVSIbVKsvJOrXxpJ
# LDfllv6XtGF/W0o0NDB2KRjC9ro71JoWWJrvjXPYImid3cBfmSdgyR3eUgOLbfj6
# qT2U9nKk8heRDXVb/BWorvajbZm0GaIypL4wUh3Ab2W17Fot073QZLpwcI7LQTJR
# RkyyknzCfaN0xLQ4wEsqJjfLpxgnB2XubSXtG86or7kiIC5/sPivE7fDj0BK9hAM
# Lpe/fkqBrCMGH3K4AC6zDWHQyDtrUT8IKTjR/kIdkjTBcVSzTyfiGob8/Tlmsez9
# rv0vrRJdNguJVo7zd2F17HmsPf4fznS56Yz392kY16LEV/OC6gISz2Sp7qdgbqHA
# ArEFQaYDi2AE/u2wBduZV+SVgZaDrEVtTDo5aw7ms3ebnaMFjB1YmMdp0vZE0p89
# Nlx2ooh0DsYOSLHGWjgRmegGpHgiWcYIW2Ekj2BvzB11fH9lbxvHZMavYNGugdh+
# Z0zj3qRp58+Qg7529AvLe9BWSGhIg6GIuTR/ROux6UL0EV6IZNcjtXQhEOSBqFMF
# uRjcbWOKZtPcpgC7aJj8JeeuzzkaqvWziw8S/ajRes65PvCCQvlxNlJfv49MkS5S
# iMYyID863vocejQpGMqs6A==
# =D3ev
# -----END PGP SIGNATURE-----
# gpg: Signature made Fri 12 May 2023 04:32:51 PM BST
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [full]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [full]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [full]

* tag 'pull-target-arm-20230512' of https://git.linaro.org/people/pmaydell/qemu-arm:
target/arm: Correct AArch64.S2MinTxSZ 32-bit EL1 input size check
tests/qtest: Don't run cdrom boot tests if no accelerator is present
target/arm: Select CONFIG_ARM_V7M when TCG is enabled
target/arm: Select SEMIHOSTING when using TCG
hw/mips/malta: Fix minor dead code issue
docs: Remove unused weirdly-named cross-reference targets
ui: Fix pixel colour channel order for PNG screenshots
MAINTAINERS: Update Akihiko Odaki's email address
target/arm: Fix handling of SW and NSW bits for stage 2 walks
target/arm: Don't allow stage 2 page table walks to downgrade to NS
target/arm: Move helper-{a64,mve,sme,sve}.h to tcg/
target/arm: Move translate-a32.h, arm_ldst.h, sve_ldst_internal.h to tcg/

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

docs: Remove unused weirdly-named cross-reference targets

In the doc sources, we have a few cross-reference targets with odd
names "pcsys_005fxyz". These are the legacy of the semi-automated
conver

docs: Remove unused weirdly-named cross-reference targets

In the doc sources, we have a few cross-reference targets with odd
names "pcsys_005fxyz". These are the legacy of the semi-automated
conversion of the old info docs to rST (the '005f' is because ASCII
0x5f is '_' and the old info link names had underscores in them).

Remove the targets which nothing links to, and rename the two targets
which are used to something a bit more descriptive.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20230421163642.1151904-1-peter.maydell@linaro.org
Reviewed-by: Markus Armbruster <armbru@redhat.com>

show more ...

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* bugfixes
* show machine ACPI support in QAPI
* Core Xen emulation support for KVM/x86

# -----BEGIN PGP SIGNATURE-----
#
#

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* bugfixes
* show machine ACPI support in QAPI
* Core Xen emulation support for KVM/x86

# -----BEGIN PGP SIGNATURE-----
#
# iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmQAlrYUHHBib256aW5p
# QHJlZGhhdC5jb20ACgkQv/vSX3jHroONWwf/fxDUMcZUvvatNxiVMhNfqEt/cL0F
# Durv1PmbbeVh9PP0W7XFkEXO3LCIRDyR4rtmCs7gHGdmzDOWQ+QIWgQijQ/y7ElQ
# bTVsvs0+s/6H3csP3dJTJaXSHshbQvrAZTsyk5KcAB6xdL1KqulfLUoGvXJhAmRs
# NKZN8un+nuAhFhL0VBWA9eQaP+BVHQI5ItAj8PaoBby4+Q9fNnat6j1/G4iLly8J
# dxIwCnuRHLiB3melWtadwbv6ddLJFeZNa50HUIsynqoItTzmRVr+oXz1yfq087dB
# 9uksmoqb+icGEdwqs0iYbQ/dhVnIrMDpn/n2Us28S5VdIMVvxr1JEbEkSQ==
# =0jY8
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 02 Mar 2023 12:29:42 GMT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu: (62 commits)
Makefile: qemu-bundle is a directory
qapi: Add 'acpi' field to 'query-machines' output
hw/xen: Subsume xen_be_register_common() into xen_be_init()
i386/xen: Document Xen HVM emulation
kvm/i386: Add xen-evtchn-max-pirq property
hw/xen: Support MSI mapping to PIRQ
hw/xen: Support GSI mapping to PIRQ
hw/xen: Implement emulated PIRQ hypercall support
i386/xen: Implement HYPERVISOR_physdev_op
hw/xen: Automatically add xen-platform PCI device for emulated Xen guests
hw/xen: Add basic ring handling to xenstore
hw/xen: Add xen_xenstore device for xenstore emulation
hw/xen: Add backend implementation of interdomain event channel support
i386/xen: handle HVMOP_get_param
i386/xen: Reserve Xen special pages for console, xenstore rings
i386/xen: handle PV timer hypercalls
hw/xen: Implement GNTTABOP_query_size
i386/xen: Implement HYPERVISOR_grant_table_op and GNTTABOP_[gs]et_verson
hw/xen: Support mapping grant frames
hw/xen: Add xen_gnttab device for grant table emulation
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

Merge branch 'xenfv-kvm-15' of git://git.infradead.org/users/dwmw2/qemu into HEAD

This adds support for emulating Xen under Linux/KVM, based on kernel
patches which have been present since Linux v5.

Merge branch 'xenfv-kvm-15' of git://git.infradead.org/users/dwmw2/qemu into HEAD

This adds support for emulating Xen under Linux/KVM, based on kernel
patches which have been present since Linux v5.12. As with the kernel
support, it's derived from work started by João Martins of Oracle in
2018.

This series just adds the basic platform support — CPUID, hypercalls,
event channels, a stub of XenStore.

A full single-tenant internal implementation of XenStore, and patches
to make QEMU's Xen PV drivers work with this Xen emulation, are waiting
in the wings to be submitted in a follow-on patch series.

As noted in the documentation, it's enabled by setting the xen-version
property on the KVM accelerator, e.g.:

qemu-system-x86_64 -serial mon:stdio -M q35 -display none -m 1G -smp 2 \
-accel kvm,xen-version=0x4000e,kernel-irqchip=split \
-kernel vmlinuz-6.0.7-301.fc37.x86_64 \
-append "console=ttyS0 root=/dev/sda1" \
-drive file=/var/lib/libvirt/images/fedora28.qcow2,if=none,id=disk \
-device ahci,id=ahci -device ide-hd,drive=disk,bus=ahci.0

Even before this was merged, we've already been using it to find and fix
bugs in the Linux kernel Xen guest support:

https://lore.kernel.org/all/4bffa69a949bfdc92c4a18e5a1c3cbb3b94a0d32.camel@infradead.org/
https://lore.kernel.org/all/871qnunycr.ffs@tglx/

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

i386/xen: Document Xen HVM emulation

Signed-off-by: David Woodhouse <dwmw2@amazon.co.uk>
Reviewed-by: Paul Durrant <paul@xen.org>

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* ac97 cleanups (Zoltan)
* default the amount of prealloc-threads to smp-cpus (Jaroslav)
* fix disabling MPX on "-cpu host" w

Merge tag 'for-upstream' of https://gitlab.com/bonzini/qemu into staging

* ac97 cleanups (Zoltan)
* default the amount of prealloc-threads to smp-cpus (Jaroslav)
* fix disabling MPX on "-cpu host" with MPX-capable host (Maciej)
* thread-pool performance optimizations (myself)
* Hyper-V enlightenment enabling and docs (Vitaly)
* check ELF header in elf2dmp (Viktor)
* tweak LBREn migration (Weijiang)

# -----BEGIN PGP SIGNATURE-----
#
# iQFIBAABCAAyFiEE8TM4V0tmI4mGbHaCv/vSX3jHroMFAmKOgwgUHHBib256aW5p
# QHJlZGhhdC5jb20ACgkQv/vSX3jHroOO3Qf7Btcvr2ex9qZ1yThlmZ6hl20WvQZe
# GlKBq5xJnx2FUpvrH/AiNl2qfiBN5emhzJp1oBieQusDDsWVblmRpWgzUkUZvh0H
# s5rKsNuOPdhqaxLH4sRCXS2FCVOy81d+lc9yYe5bzy3EHDO/qzMjye+JoBhXtQve
# 3gOcOb1srIB/xSGNur2iCJkcauhBOipOo77kryfWekfReA3glHGnwhuEO+F+gXT3
# hiEO6TuRHjVrVCExbsDJb2pV2sSH6FxOP09BZ84IT0puv/FfgnUGCiNVfVNmMgNq
# KYysG7vPlRSaDX17bt3UlS4Y6yKb1vZpnvymRRkWxWLIfuAVVNm0vgHBpg==
# =gX2j
# -----END PGP SIGNATURE-----
# gpg: Signature made Wed 25 May 2022 12:27:04 PM PDT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [undefined]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* tag 'for-upstream' of https://gitlab.com/bonzini/qemu:
i386: docs: Convert hyperv.txt to rST
i386: Hyper-V Direct TLB flush hypercall
i386: Hyper-V Support extended GVA ranges for TLB flush hypercalls
i386: Hyper-V XMM fast hypercall input feature
i386: Hyper-V Enlightened MSR bitmap feature
i386: Use hv_build_cpuid_leaf() for HV_CPUID_NESTED_FEATURES
ide_ioport_read: Return lower octet of data register instead of 0xFF
target/i386/kvm: Fix disabling MPX on "-cpu host" with MPX-capable host
hw/audio/ac97: Remove unneeded local variables
hw/audio/ac97: Remove unimplemented reset functions
hw/audio/ac97: Coding style fixes to avoid checkpatch errors
contrib/elf2dmp: add ELF dump header checking
thread-pool: remove stopping variable
thread-pool: replace semaphore with condition variable
thread-pool: optimize scheduling of completion bottom half
hostmem: default the amount of prealloc-threads to smp-cpus
target/i386: Remove LBREn bit check when access Arch LBR MSRs

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

i386: docs: Convert hyperv.txt to rST

rSTify docs/hyperv.txt and link it from docs/system/target-i386.rst.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20220525115949.1294004-

i386: docs: Convert hyperv.txt to rST

rSTify docs/hyperv.txt and link it from docs/system/target-i386.rst.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20220525115949.1294004-7-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

Merge remote-tracking branch 'remotes/legoater/tags/pull-ppc-20220210' into staging

ppc-7.0 queue

* Exception model rework (Fabiano)
* Unused CPU models removal (Fabiano and Cédric)
* Fix for VOF i

Merge remote-tracking branch 'remotes/legoater/tags/pull-ppc-20220210' into staging

ppc-7.0 queue

* Exception model rework (Fabiano)
* Unused CPU models removal (Fabiano and Cédric)
* Fix for VOF installation (Alexey)
* Misc fixes

# gpg: Signature made Thu 10 Feb 2022 12:59:07 GMT
# gpg: using RSA key A0F66548F04895EBFE6B0B6051A343C7CFFBECA1
# gpg: Good signature from "Cédric Le Goater <clg@kaod.org>" [undefined]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: A0F6 6548 F048 95EB FE6B 0B60 51A3 43C7 CFFB ECA1

* remotes/legoater/tags/pull-ppc-20220210: (42 commits)
spapr/vof: Install rom and nvram binaries
docs: rstfy confidential guest documentation
target/ppc: Change VSX instructions behavior to fill with zeros
target/ppc: books: Remove excp_model argument from ppc_excp_apply_ail
target/ppc: Assert if MSR bits differ from msr_mask during exceptions
target/ppc: powerpc_excp: Move common code to the caller function
target/ppc: Remove powerpc_excp_legacy
target/ppc: 7xx: Set SRRs directly in exception code
target/ppc: 7xx: Software TLB cleanup
target/ppc: 7xx: System Reset cleanup
target/ppc: 7xx: System Call exception cleanup
target/ppc: 7xx: Program exception cleanup
target/ppc: 7xx: External interrupt cleanup
target/ppc: 7xx: Machine Check exception cleanup
target/ppc: Simplify powerpc_excp_7xx
target/ppc: Introduce powerpc_excp_7xx
target/ppc: Merge 7x5 and 7x0 exception model IDs
target/ppc: 6xx: Set SRRs directly in exception code
target/ppc: 6xx: Software TLB exceptions cleanup
target/ppc: 6xx: System Reset interrupt cleanup
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

docs: rstfy confidential guest documentation

Also rstfy the documentation for AMD SEV, and link it.

The documentation for PEF had been merged into the pseries doc,
fix the reference.

Signed-off-by

docs: rstfy confidential guest documentation

Also rstfy the documentation for AMD SEV, and link it.

The documentation for PEF had been merged into the pseries doc,
fix the reference.

Signed-off-by: Cornelia Huck <cohuck@redhat.com>
Reviewed-by: Daniel Henrique Barboza <danielhb413@gmail.com>
Message-Id: <20220204161251.241877-1-cohuck@redhat.com>
Signed-off-by: Cédric Le Goater <clg@kaod.org>

show more ...

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Meson version update
* fix search path when configuring with --cpu
* support for measured SEV boot with -kernel (Dov)

Merge remote-tracking branch 'remotes/bonzini/tags/for-upstream' into staging

* Meson version update
* fix search path when configuring with --cpu
* support for measured SEV boot with -kernel (Dov)
* fix missing BQL locks (Emanuele)
* retrieve applesmc key from the host (Pedro)
* KVM PV feature documentation (Vitaly)

# gpg: Signature made Tue 05 Oct 2021 04:13:00 AM PDT
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]

* remotes/bonzini/tags/for-upstream:
meson: show library versions in the summary
target/xtensa: list cores in a text file
hexagon: use env keyword argument to pass PYTHONPATH
meson: switch minimum meson version to 0.58.2, minimum recommended to 0.59.2
meson: bump submodule to 0.59.2
migration: add missing qemu_mutex_lock_iothread in migration_completion
migration: block-dirty-bitmap: add missing qemu_mutex_lock_iothread
configure, meson: move CPU_CFLAGS out of QEMU_CFLAGS
hw/misc: applesmc: use host osk as default on macs
x86/sev: generate SEV kernel loader hashes in x86_load_linux
sev/i386: Introduce sev_add_kernel_loader_hashes for measured linux boot
i386: docs: Briefly describe KVM PV features

Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...

i386: docs: Briefly describe KVM PV features

KVM PV features don't seem to be documented anywhere, in particular, the
fact that some of the features are enabled by default and some are not can
only

i386: docs: Briefly describe KVM PV features

KVM PV features don't seem to be documented anywhere, in particular, the
fact that some of the features are enabled by default and some are not can
only be figured out from the code.

Signed-off-by: Vitaly Kuznetsov <vkuznets@redhat.com>
Message-Id: <20211004140445.624875-1-vkuznets@redhat.com>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging

* SGX implementation for x86
* Miscellaneous bugfixes
* Fix dependencies from ROMs to qtests

# gpg: Signature ma

Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging

* SGX implementation for x86
* Miscellaneous bugfixes
* Fix dependencies from ROMs to qtests

# gpg: Signature made Thu 30 Sep 2021 14:30:35 BST
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* remotes/bonzini-gitlab/tags/for-upstream: (33 commits)
meson_options.txt: Switch the default value for the vnc option to 'auto'
build-sys: add HAVE_IPPROTO_MPTCP
memory: Add tracepoint for dirty sync
memory: Name all the memory listeners
target/i386: Fix memory leak in sev_read_file_base64()
tests: qtest: bios-tables-test depends on the unpacked edk2 ROMs
meson: unpack edk2 firmware even if --disable-blobs
target/i386: Add the query-sgx-capabilities QMP command
target/i386: Add HMP and QMP interfaces for SGX
docs/system: Add SGX documentation to the system manual
sgx-epc: Add the fill_device_info() callback support
i440fx: Add support for SGX EPC
q35: Add support for SGX EPC
i386: acpi: Add SGX EPC entry to ACPI tables
i386/pc: Add e820 entry for SGX EPC section(s)
hw/i386/pc: Account for SGX EPC sections when calculating device memory
hw/i386/fw_cfg: Set SGX bits in feature control fw_cfg accordingly
Adjust min CPUID level to 0x12 when SGX is enabled
i386: Propagate SGX CPUID sub-leafs to KVM
i386: kvm: Add support for exposing PROVISIONKEY to guest
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

docs/system: Add SGX documentation to the system manual

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20210719112

docs/system: Add SGX documentation to the system manual

Signed-off-by: Sean Christopherson <sean.j.christopherson@intel.com>
Signed-off-by: Yang Zhong <yang.zhong@intel.com>
Message-Id: <20210719112136.57018-34-yang.zhong@intel.com>
[Convert to reStructuredText, and adopt the standard === --- ~~~ headings
suggested for example by Linux. - Paolo]
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging

* Fixes for "-cpu max" on i386 TCG (Daniel)
* vVMLOAD/VMSAVE and vGIF implementation (Lara)
* Reorganize i386 tar

Merge remote-tracking branch 'remotes/bonzini-gitlab/tags/for-upstream' into staging

* Fixes for "-cpu max" on i386 TCG (Daniel)
* vVMLOAD/VMSAVE and vGIF implementation (Lara)
* Reorganize i386 targets documentation in preparation for SGX (myself)
* Meson cleanups (myself, Thomas)
* NVMM fixes (Reinoud)
* Suppress bogus -Wstringop-overflow (Richard)

# gpg: Signature made Mon 13 Sep 2021 12:56:33 BST
# gpg: using RSA key F13338574B662389866C7682BFFBD25F78C7AE83
# gpg: issuer "pbonzini@redhat.com"
# gpg: Good signature from "Paolo Bonzini <bonzini@gnu.org>" [full]
# gpg: aka "Paolo Bonzini <pbonzini@redhat.com>" [full]
# Primary key fingerprint: 46F5 9FBD 57D6 12E7 BFD4 E2F7 7E15 100C CD36 69B1
# Subkey fingerprint: F133 3857 4B66 2389 866C 7682 BFFB D25F 78C7 AE83

* remotes/bonzini-gitlab/tags/for-upstream: (21 commits)
docs: link to archived Fedora code of conduct
Fix nvmm_ram_block_added() function arguments
Only check CONFIG_NVMM when NEED_CPU_H is defined
util: Suppress -Wstringop-overflow in qemu_thread_start
fw_cfg: add etc/msr_feature_control
meson: remove dead variable
meson: do not use python.full_path() unnecessarily
meson: look up cp and dtrace with find_program()
meson.build: Do not look for VNC-related libraries if have_system is not set
docs/system: move x86 CPU configuration to a separate document
docs/system: standardize man page sections to --- with overline
docs: standardize directory index to --- with overline
docs: standardize book titles to === with overline
target/i386: Added vVMLOAD and vVMSAVE feature
target/i386: Added changed priority check for VIRQ
target/i386: Added ignore TPR check in ctl_has_irq
target/i386: Added VGIF V_IRQ masking capability
target/i386: Moved int_ctl into CPUX86State structure
target/i386: Added VGIF feature
target/i386: VMRUN and VMLOAD canonicalizations
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

docs/system: move x86 CPU configuration to a separate document

Currently, cpu-models-x86.rst.inc is included in target-i386.rst directly.
To make the toctree more homogeneous when adding more docume

docs/system: move x86 CPU configuration to a separate document

Currently, cpu-models-x86.rst.inc is included in target-i386.rst directly.
To make the toctree more homogeneous when adding more documentation,
include it through a first-class .rst file.

Together with the previous changes to the man page skeletons, this also
frees "===" for the headings, so that cpu-models-x86.rst.inc need not
assume anything about the headings used by target-i386.rst.

Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>

show more ...

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201123' into staging

target-arm queue:
* incorporate 'orphan' rST docs into manuals
* linux-user/arm: Deliver SIGTRAP for UDF

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201123' into staging

target-arm queue:
* incorporate 'orphan' rST docs into manuals
* linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpoints
* target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0
* document raspi boards and tosa
* docs/system: Deprecate raspi2/raspi3 machine aliases
* docs/system/arm: Document OpenPOWER Witherspoon BMC model Front LEDs
* MAINTAINERS: add lines for docs files for Arm boards
* hw/intc: fix heap-buffer-overflow in rxicu_realize()
* hw/arm: Fix bad print format specifiers
* target/arm: fix stage 2 page-walks in 32-bit emulation

# gpg: Signature made Mon 23 Nov 2020 11:42:02 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20201123: (24 commits)
docs/system/pr-manager.rst: Fix minor docs nits
docs: Split qemu-pr-helper documentation into tools manual
docs: Move pr-manager.rst into the system manual
docs: Move microvm.rst into the system manual
docs: Split out 'pc' machine model docs into their own file
docs/system/virtio-pmem.rst: Fix minor style issues
docs: Move virtio-pmem.rst into the system manual
docs: Move cpu-hotplug.rst into the system manual
docs: Move virtio-net-failover.rst into the system manual
linux-user/arm: Deliver SIGTRAP for UDF patterns used as breakpoints
target/arm: Make SYS_HEAPINFO work with RAM that doesn't start at 0
docs/system/arm: Document the Sharp Zaurus SL-6000
docs/system/arm: Document OpenPOWER Witherspoon BMC model Front LEDs
docs/system/arm: Document the various raspi boards
docs/system: Deprecate raspi2/raspi3 machine aliases
MAINTAINERS: Cover system/arm/sx1.rst with OMAP machines
MAINTAINERS: Cover system/arm/sbsa.rst with SBSA-REF machine
MAINTAINERS: Fix system/arm/orangepi.rst path
MAINTAINERS: Cover system/arm/nuvoton.rst with Nuvoton NPCM7xx
MAINTAINERS: Cover system/arm/aspeed.rst with ASPEED BMC machines
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

docs: Move microvm.rst into the system manual

Now that target-i386.rst has a place to list documentation of
machines other than the 'pc' machine, we have a place we can
move the microvm documentatio

docs: Move microvm.rst into the system manual

Now that target-i386.rst has a place to list documentation of
machines other than the 'pc' machine, we have a place we can
move the microvm documentation to.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

show more ...

docs: Split out 'pc' machine model docs into their own file

Currently target-i386.rst includes the documentation of the 'pc'
machine model inline. Split it out into its own file, in a
similar way to

docs: Split out 'pc' machine model docs into their own file

Currently target-i386.rst includes the documentation of the 'pc'
machine model inline. Split it out into its own file, in a
similar way to target-i386.rst; this gives us a place to put
documentation of other i386 machine models, such as 'microvm'.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>

show more ...

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-docs-20200306' into staging

docs:
* Convert qemu-doc from Texinfo to rST

# gpg: Signature made Fri 06 Mar 2020 11:08:15 GMT
# gpg:

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-docs-20200306' into staging

docs:
* Convert qemu-doc from Texinfo to rST

# gpg: Signature made Fri 06 Mar 2020 11:08:15 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-docs-20200306: (33 commits)
*.hx: Remove all the STEXI/ETEXI blocks
docs: Remove old texinfo sources
docs: Stop building qemu-doc
ui/cocoa.m: Update documentation file and pathname
docs: Generate qemu.1 manpage with Sphinx
docs: Split out sections for the manpage into .rst.inc files
qemu-options.hx: Fix up the autogenerated rST
qemu-options.hx: Add rST documentation fragments
scripts/hxtool-conv: Archive script used in qemu-options.hx conversion
docs: Roll -prom-env and -g target-specific info into qemu-options.hx
docs: Roll semihosting option information into qemu-options.hx
doc/scripts/hxtool.py: Strip trailing ':' from DEFHEADING/ARCHHEADING
hmp-commands-info.hx: Add rST documentation fragments
hmp-commands.hx: Add rST documentation fragments
docs/system: convert Texinfo documentation to rST
docs/system: convert the documentation of deprecated features to rST.
docs/system: convert managed startup to rST.
docs/system: Convert security.texi to rST format
docs/system: Convert qemu-cpu-models.texi to rST
docs: Create defs.rst.inc as a place to define substitutions
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...

docs: Split out sections for the manpage into .rst.inc files

Sphinx doesn't have very good facilities for marking chunks
of documentation as "put this in the manpage only". So instead
we move the pa

docs: Split out sections for the manpage into .rst.inc files

Sphinx doesn't have very good facilities for marking chunks
of documentation as "put this in the manpage only". So instead
we move the parts we want to put into both the HTML manuals
and the manpage into their own .rst.inc files, which we can
include from both the main manual rst files and a new toplevel
rst file that will be the skeleton of the qemu.1 manpage.

In this commit, just split out the parts of the documentation
that go in the manpage.

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Message-id: 20200228153619.9906-29-peter.maydell@linaro.org

show more ...

docs/system: convert Texinfo documentation to rST

Apart from targets.rst, which was written by hand, this is an automated
conversion obtained with the following command:

makeinfo --force -o - --d

docs/system: convert Texinfo documentation to rST

Apart from targets.rst, which was written by hand, this is an automated
conversion obtained with the following command:

makeinfo --force -o - --docbook \
-D 'qemu_system_x86 QEMU_SYSTEM_X86_MACRO' \
-D 'qemu_system QEMU_SYSTEM_MACRO' \
$texi | pandoc -f docbook -t rst+smart | perl -e '
$/=undef;
$_ = <>;
s/^- − /- /gm;
s/QEMU_SYSTEM_MACRO/|qemu_system|/g;
s/QEMU_SYSTEM_X86_MACRO/|qemu_system_x86|/g;
s/(?=::\n\n +\|qemu)/.. parsed-literal/g;
s/:\n\n::$/::/gm;
print' > $rst

In addition, the following changes were made manually:

- target-i386.rst and target-mips.rst: replace CPU model documentation with
an include directive

- monitor.rst: replace the command section with a comment

- images.rst: add toctree

- target-arm.rst: Replace use of :math: (which Sphinx complains
about) with :sup:, and hide it behind |I2C| and |I2C| substitutions.

Content that is not @included remains exclusive to qemu-doc.texi.

Signed-off-by: Paolo Bonzini <pbonzini@redhat.com>
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Tested-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Message-id: 20200228153619.9906-20-peter.maydell@linaro.org
Message-id: 20200226113034.6741-19-pbonzini@redhat.com
[PMM: Fixed target-arm.rst use of :math:; remove out of date
note about images.rst from commit message; fixed expansion
of |qemu_system_x86|; use parsed-literal in invocation.rst
when we want to use |qemu_system_x86|; fix incorrect subsection
level for "OS requirements" in target-i386.rst; fix incorrect
syntax for making links to other sections of the manual]
Reviewed-by: Peter Maydell <peter.maydell@linaro.org>
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...