Revision tags: v9.2.0, v9.1.2, v9.1.1 |
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#
f774a677 |
| 15-Oct-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-target-arm-20241015-1' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm/omap1: Remove unused omap_uwire_attach() method * stm32f405: Add R
Merge tag 'pull-target-arm-20241015-1' of https://git.linaro.org/people/pmaydell/qemu-arm into staging
target-arm queue: * hw/arm/omap1: Remove unused omap_uwire_attach() method * stm32f405: Add RCC device to stm32f405 SoC * arm/gicv3: add missing casts * hw/misc: Create STM32L4x5 SYSCFG clock * hw/arm: Add SPI to Allwinner A10 * hw/intc/omap_intc: Remove now-unnecessary abstract base class * hw/char/pl011: Use correct masks for IBRD and FBRD * docs/devel: Convert txt files to rST * Remove MAX111X, MAX7310, DSCM-1XXXX, pcmcia devices (used only by now-removed omap/pxa2xx boards) * vl.c: Remove pxa2xx-specific -portrait and -rotate options * dma: Fix function names in documentation * hw/arm/xilinx_zynq: Add various missing unimplemented devices
# -----BEGIN PGP SIGNATURE----- # # iQJNBAABCAA3FiEE4aXFk81BneKOgxXPPCUl7RQ2DN4FAmcOeWEZHHBldGVyLm1h # eWRlbGxAbGluYXJvLm9yZwAKCRA8JSXtFDYM3jCMD/482mpT1s+mrEJFWSJJXU4G # 8kr4Zj6+NafbayJ0vHTkpSbkEbPxuvDiUqmlnbI+3o11i+Z3IyiaGZbba7dyNnKl # 02MdQavL0dB+eMrcFNofRRvwvsposuj2ixgwTQe6L32HSFdHerVVwuhHM/wfwyCh # DKt7gPRovD/7CtwDOSpyW7cK64WK1IUlE8VEsbFdQbCPkopm55LQ2sLT4TshadpG # A6xcxyLN0x/lHgCmvijB1T09LSc1nQpUEQNIokC4f1Rmy6HNgGDYY1G7GAJf99mT # nWhATuuhZThiYfRbN5KQoS9tGEUduxtkGhHiOgpdXpgc3cS7RusCHoqAnibpsVh3 # TgAkaRAX1d/jQ2KYR2h2jI3nh66ObhrFRT3dkzRZrIvmK9zeWUKmS9lzZ94aVfPH # +MtBPwsO5OhzEABs8WpMY9V1nYaYDsFATMc1akUSaSLn1Er9Uz66NIk+J4Lob4P0 # 78IPvTmwvAIITiqQvkISsc37n5a2/toeaffU2hPKtQLlhyilWynEZA5YItrXSTuk # gYIBxyZSbzGj/ofZ9T9C0GDLbhJp9ksNIpIqRUiHOH3z9b85r7HVZORp+COw/ZXR # UGak6rpJ+XVOxVL/cPRTvZB0RbUHIZh7WLNH2G7Tfv4E4llqL81iuImHXVh/2CXO # 9GWr9qbDLDYQ+BI7ipLAYg== # =n2CA # -----END PGP SIGNATURE----- # gpg: Signature made Tue 15 Oct 2024 15:17:05 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # gpg: aka "Peter Maydell <peter@archaic.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* tag 'pull-target-arm-20241015-1' of https://git.linaro.org/people/pmaydell/qemu-arm: (28 commits) hw/arm/xilinx_zynq: Add various missing unimplemented devices dma: Fix function names in documentation vl.c: Remove pxa2xx-specific -portrait and -rotate options hw/block: Remove ecc hw: Remove PCMCIA subsystem hw/ide: Remove DSCM-1XXXX microdrive device model hw/gpio: Remove MAX7310 device hw/adc: Remove MAX111X device docs/devel/lockcnt: Include kernel-doc API documentation include: Move QemuLockCnt APIs to their own header docs/devel/rcu: Convert to rST format docs/devel/multiple-iothreads: Convert to rST format docs/devel/lockcnt: Convert to rST format docs/devel/blkverify: Convert to rST format docs/devel/blkdebug: Convert to rST format hw/char/pl011: Use correct masks for IBRD and FBRD hw/intc/omap_intc: Remove now-unnecessary abstract base class hw/arm: Add SPI to Allwinner A10 hw/ssi: Allwinner A10 SPI emulation tests/qtest: Check STM32L4x5 clock connections ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
9240d65e |
| 14-Oct-2024 |
Inès Varhol <ines.varhol@telecom-paris.fr> |
hw/clock: Expose 'qtest-clock-period' QOM property for QTests
Expose the clock period via the QOM 'qtest-clock-period' property so it can be used in QTests. This property is only accessible in QTest
hw/clock: Expose 'qtest-clock-period' QOM property for QTests
Expose the clock period via the QOM 'qtest-clock-period' property so it can be used in QTests. This property is only accessible in QTests (not via HMP).
Signed-off-by: Inès Varhol <ines.varhol@telecom-paris.fr> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Message-id: 20241003081105.40836-3-ines.varhol@telecom-paris.fr Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v9.1.0 |
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#
2fd8df93 |
| 02-Apr-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging
trivial patches for 2024-04-02
# -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmYL4EQ
Merge tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu into staging
trivial patches for 2024-04-02
# -----BEGIN PGP SIGNATURE----- # # iQFDBAABCAAtFiEEe3O61ovnosKJMUsicBtPaxppPlkFAmYL4EQPHG1qdEB0bHMu # bXNrLnJ1AAoJEHAbT2saaT5ZyhIH/1sz3OeyczgPeMsICXpCnkQps8cDKuzUMkHA # BHZGQ9AvFNZVw0YzgY+h1u2zPnsN0WNpWuxe8dbZODHcBjeJVZ5yOyJ6TWVVuKDn # 6TzOfhGOeaUthNphpfZaM1q7fJfwU8zW3/pe6OCsD92Czxb8Eao3T4ONzVNZVXU9 # 3KPXPD9weWnY/sozXDqPFJmwn0LDL5o6IhPz+Ypp5xFrOTC+5+C/UmgTGIsuKTcO # kQ96gVwCr3tm1YeJtEGfNOar/lt75jHHV2wbizaz2Jpwv9GHwtHXJOtQ38fIYxlm # UPZ+L982SjfgaIHLCGOtLYJWSXsK5xI31HDSK1ZIiJquocZE1jU= # =ZGw+ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 02 Apr 2024 11:39:00 BST # gpg: using RSA key 7B73BAD68BE7A2C289314B22701B4F6B1A693E59 # gpg: issuer "mjt@tls.msk.ru" # gpg: Good signature from "Michael Tokarev <mjt@tls.msk.ru>" [full] # gpg: aka "Michael Tokarev <mjt@corpit.ru>" [full] # gpg: aka "Michael Tokarev <mjt@debian.org>" [full] # Primary key fingerprint: 6EE1 95D1 886E 8FFB 810D 4324 457C E0A0 8044 65C5 # Subkey fingerprint: 7B73 BAD6 8BE7 A2C2 8931 4B22 701B 4F6B 1A69 3E59
* tag 'pull-trivial-patches' of https://gitlab.com/mjt0k/qemu: hmp: Add help information for watchdog action: inject-nmi Fix some typos in documentation (found by codespell) fpu/softfloat: Remove mention of TILE-Gx target usb-audio: Fix invalid values in AudioControl descriptors
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
f6822fee |
| 31-Mar-2024 |
Stefan Weil <sw@weilnetz.de> |
Fix some typos in documentation (found by codespell)
Signed-off-by: Stefan Weil <sw@weilnetz.de> Reviewed-by: Michael Tokarev <mjt@tls.msk.ru> Signed-off-by: Michael Tokarev <mjt@tls.msk.ru>
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#
38a23eb3 |
| 26-Mar-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'hw-misc-20240326' of https://github.com/philmd/qemu into staging
Misc HW patch queue
[hw] - Do not silently overwrite 'io_timeout' property in scsi-generic (Lorenz) - Propagate period wh
Merge tag 'hw-misc-20240326' of https://github.com/philmd/qemu into staging
Misc HW patch queue
[hw] - Do not silently overwrite 'io_timeout' property in scsi-generic (Lorenz) - Propagate period when enabling a clock in stm32l4x5 mux (Arnaud, Phil) - Add missing smbios_get_table_legacy() stub (Igor) - Append a space in gpa2hva() HMP error message (Yao) - Fix compiler warning in 'execlog' plugin (Yao)
[target] - i386: Enable page walking from MMIO memory (Gregory, Jonathan) - tricore: Use correct string format in cpu_tlb_fill (Phil)
[docs] - Fix formatting in amigang.rst (Zoltan)
[ui] - Fix cocoa regression in platform fullscreen toggling (Akihiko)
# -----BEGIN PGP SIGNATURE----- # # iQIzBAABCAAdFiEE+qvnXhKRciHc/Wuy4+MsLN6twN4FAmYC7QoACgkQ4+MsLN6t # wN4WIw//cLw1caDa8ki3htGWGVI2P/QFdsvId7ah4Iul7znf6NWUORDBjvIvLpaF # sesPF7BRQ/qJFT5ttB8DsKc1IHw3IASAGL/NK3i7v9GkRiBJNJvQRO2rVfNmXvN8 # ++AZ/J+Y1OZ4Y1hcxXGUVIpwKzndR5Oz9zNXQ+C0CQqYljwxC3huB3m6C7vKOgeq # SNKVw/hrTBYLzyvooKqLb6Xual2+olSwc2/BwqUOOCP6Y1HmgQeWy5ckJqsuVS2T # 5q5VtkduBCsUhgmflsLF3LCKrNTQUw+jOAGH2gyRvXMjmvwCmNy5xo8eOD0iTwXb # +Ffp/kfqm2N1QwNWcBi39+BU+Plti03mnL7C9jNzaEBaQ9Q7wMNqASN0daHSk3vh # 4Vw/FsaUJAohInKYghCgO0fUVpeLis+8p5lDD7QwAL9tiYk7/tgrbtyNLb+m/3P9 # pPNGt9Fnijg+/zDDfjVYwtDMRbL0df7SqTjhJW3TIQ+d83tmoVuCDmBysEXywzSt # 5e4yyjDf8q1C23yipK9I84wuvWjfIDYIPSUzCKaZYf4xbdx7GyNaOoOqWZYpordD # ua/4hRuQ4AcDuCe3XBKsmAex6wpYodjnfEi5Y5uV8vyPfeiVQodY/07pok/NZjEL # tUNy3EkQFqXxT1ctT7FhN2eh6WjSo0SJFtIjVDarJ0mUkS4VXgM= # =ccz/ # -----END PGP SIGNATURE----- # gpg: Signature made Tue 26 Mar 2024 15:43:06 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* tag 'hw-misc-20240326' of https://github.com/philmd/qemu: ui/cocoa: Use NSTrackingInVisibleRect ui/cocoa: Resize window after toggling zoom-to-fit ui/cocoa: Fix aspect ratio hw/smbios: add stub for smbios_get_table_legacy() contrib/plugins/execlog: Fix compiler warning docs/system/ppc/amigang.rst: Fix formatting hw/misc/stm32l4x5_rcc: Propagate period when enabling a clock hw/misc/stm32l4x5_rcc: Inline clock_update() in clock_mux_update() hw/clock: Let clock_set_mul_div() return a boolean value target/tricore/helper: Use correct string format in cpu_tlb_fill() monitor/hmp-cmds-target: Append a space in error message in gpa2hva() hw/scsi/scsi-generic: Fix io_timeout property not applying target/i386/tcg: Enable page walking from MMIO memory
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
52405b7f |
| 22-Mar-2024 |
Philippe Mathieu-Daudé <philmd@linaro.org> |
hw/clock: Let clock_set_mul_div() return a boolean value
Let clock_set_mul_div() return a boolean value whether the clock has been updated or not, similarly to clock_set().
Return early when clock_
hw/clock: Let clock_set_mul_div() return a boolean value
Let clock_set_mul_div() return a boolean value whether the clock has been updated or not, similarly to clock_set().
Return early when clock_set_mul_div() is called with same mul/div values the clock has.
Acked-by: Luc Michel <luc@lmichel.fr> Signed-off-by: Philippe Mathieu-Daudé <philmd@linaro.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Message-Id: <20240325152827.73817-2-philmd@linaro.org>
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#
d328fef9 |
| 04-Jan-2024 |
Peter Maydell <peter.maydell@linaro.org> |
Merge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging
Mark VMStateField and VMStateDescription arrays const.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXA
Merge tag 'pull-20231230' of https://gitlab.com/rth7680/qemu into staging
Mark VMStateField and VMStateDescription arrays const.
# -----BEGIN PGP SIGNATURE----- # # iQFRBAABCgA7FiEEekgeeIaLTbaoWgXAZN846K9+IV8FAmWPOFsdHHJpY2hhcmQu # aGVuZGVyc29uQGxpbmFyby5vcmcACgkQZN846K9+IV8cCQgAnQjy3Ic1i225AElh # 0Ph3Aiw6WT9pECLoKmyroxHbTGuaEJoIXeaOhMAnowCTBLoKRR3/Ooq0DGOW+l/Z # f5PwWSkjkb+OcS+dj/kgQBu58/Gk5G8ogksqKQvci8k2okhjHmITSQDu0dtwzDZr # jVGh3gmGoat73jQyD/nAwgWFawlLkklOMR/yvnFX7EJIBepRVbkMPayoKlB+6W07 # 1kqhSwoI0vQCjhJ3Q7Q0GC4rrHK3KUq7o/25yvICf4EgPKfsaym1wAjDhdKToixl # 9T+ALZG8SiZZkBlb6l3QZ7pqtqavxYtPdZ2Gx/nMu0RRu4G33d5AVGHRrXj9qttW # 5mL7ZQ== # =uQ4C # -----END PGP SIGNATURE----- # gpg: Signature made Fri 29 Dec 2023 21:21:31 GMT # gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F # gpg: issuer "richard.henderson@linaro.org" # gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full] # Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F
* tag 'pull-20231230' of https://gitlab.com/rth7680/qemu: (71 commits) docs: Constify VMstate in examples tests/unit/test-vmstate: Constify VMState util/fifo8: Constify VMState replay: Constify VMState system: Constify VMState migration: Constify VMState cpu-target: Constify VMState backends: Constify VMState audio: Constify VMState hw/misc/macio: Constify VMState hw/watchdog: Constify VMState hw/virtio: Constify VMState hw/vfio: Constify VMState hw/usb: Constify VMState hw/tpm: Constify VMState hw/timer: Constify VMState hw/ssi: Constify VMState hw/sparc: Constify VMState hw/sensor: Constify VMState hw/sd: Constify VMState ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
2563c97f |
| 20-Dec-2023 |
Richard Henderson <richard.henderson@linaro.org> |
docs: Constify VMstate in examples
Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro
docs: Constify VMstate in examples
Reviewed-by: Juan Quintela <quintela@redhat.com> Reviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org> Signed-off-by: Richard Henderson <richard.henderson@linaro.org> Message-Id: <20231221031652.119827-72-richard.henderson@linaro.org>
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Revision tags: v8.0.0, v7.2.0, v7.0.0, v6.2.0 |
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#
079b1252 |
| 01-Sep-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210901' into staging
* Refactor M-profile systick to use Clocks instead of system_clock_scale global * clock: Provide builtin
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210901' into staging
* Refactor M-profile systick to use Clocks instead of system_clock_scale global * clock: Provide builtin multiplier/divider * Add A64FX processor model * Enable MVE emulation in Cortex-M55 * hw: Add compat machines for 6.2 * hw/intc/arm_gicv3: Replace mis-used MEMTX_* constants by booleans * hw/arm/raspi: Remove deprecated raspi2/raspi3 aliases
# gpg: Signature made Wed 01 Sep 2021 11:35:57 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210901: (51 commits) arm: Remove system_clock_scale global hw/timer/stellaris-gptm: Use Clock input instead of system_clock_scale hw/arm/stellaris: Split stellaris-gptm into its own file hw/arm/stellaris: Fix code style issues in GPTM code hw/timer/armv7m_systick: Use clock inputs instead of system_clock_scale hw/arm/msf2-soc: Wire up refclk hw/arm/msf2: Use Clock input to MSF2_SOC instead of m3clk property hw/arm/msf2_soc: Don't allocate separate MemoryRegions hw/arm/stellaris: Wire sysclk up to armv7m hw/arm/stellaris: split stellaris_sys_init() hw/arm/nrf51: Wire up sysclk hw/arm/stm32vldiscovery: Delete trailing blank line hw/arm/stm32f405: Wire up sysclk and refclk hw/arm/stm32f205: Wire up sysclk and refclk hw/arm/stm32f100: Wire up sysclk and refclk hw/arm: Don't allocate separate MemoryRegions in stm32 SoC realize clock: Provide builtin multiplier/divider hw/arm/mps2.c: Connect up armv7m clocks armsse: Wire up systick cpuclk clock hw/arm/armv7m: Create input clocks ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v6.1.0 |
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#
99abcbc7 |
| 12-Aug-2021 |
Peter Maydell <peter.maydell@linaro.org> |
clock: Provide builtin multiplier/divider
It is quite common for a clock tree to involve possibly programmable clock multipliers or dividers, where the frequency of a clock is for instance divided b
clock: Provide builtin multiplier/divider
It is quite common for a clock tree to involve possibly programmable clock multipliers or dividers, where the frequency of a clock is for instance divided by 8 to produce a slower clock to feed to a particular device.
Currently we provide no convenient mechanism for modelling this. You can implement it by having an input Clock and an output Clock, and manually setting the period of the output clock in the period-changed callback of the input clock, but that's quite clunky.
This patch adds support in the Clock objects themselves for setting a multiplier or divider. The effect of setting this on a clock is that when the clock's period is changed, all the children of the clock are set to period * multiplier / divider, rather than being set to the same period as the parent clock.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Alexandre Iooss <erdnaxe@crans.org> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Reviewed-by: Damien Hedde <damien.hedde@greensocs.com> Message-id: 20210812093356.1946-10-peter.maydell@linaro.org
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#
5c6295a4 |
| 10-Mar-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210310' into staging
target-arm queue: * Add new mps3-an547 board * target/arm: Restrict v7A TCG cpus to TCG accel * Implemen
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210310' into staging
target-arm queue: * Add new mps3-an547 board * target/arm: Restrict v7A TCG cpus to TCG accel * Implement a Xilinx CSU DMA model * hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt()
# gpg: Signature made Wed 10 Mar 2021 13:56:20 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210310: (54 commits) hw/timer/renesas_tmr: Fix use of uninitialized data in read_tcnt() hw/timer/renesas_tmr: Prefix constants for CSS values with CSS_ hw/ssi: xilinx_spips: Remove DMA related dead codes from zynqmp_spips hw/ssi: xilinx_spips: Clean up coding convention issues hw/arm: xlnx-zynqmp: Connect a Xilinx CSU DMA module for QSPI hw/arm: xlnx-zynqmp: Clean up coding convention issues hw/dma: Implement a Xilinx CSU DMA model target/arm: Restrict v7A TCG cpus to TCG accel tests/qtest/sse-timer-test: Test counter scaling changes tests/qtest/sse-timer-test: Test the system timer tests/qtest/sse-timer-test: Add simple test of the SSE counter docs/system/arm/mps2.rst: Document the new mps3-an547 board hw/arm/mps2-tz: Add new mps3-an547 board hw/arm/mps2-tz: Make initsvtor0 setting board-specific hw/arm/mps2-tz: Support running APB peripherals on different clock hw/misc/mps2-scc: Implement changes for AN547 hw/misc/mps2-fpgaio: Support AN547 DBGCTRL register hw/misc/mps2-fpgaio: Fold counters subsection into main vmstate hw/arm/mps2-tz: Make UART overflow IRQ board-specific hw/arm/armsse: Add SSE-300 support ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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#
cd3a53b7 |
| 19-Feb-2021 |
Peter Maydell <peter.maydell@linaro.org> |
clock: Add clock_ns_to_ticks() function
Add a clock_ns_to_ticks() function which does the opposite of clock_ticks_to_ns(): given a duration in nanoseconds, it returns the number of clock ticks that
clock: Add clock_ns_to_ticks() function
Add a clock_ns_to_ticks() function which does the opposite of clock_ticks_to_ns(): given a duration in nanoseconds, it returns the number of clock ticks that would happen in that time. This is useful for devices that have a free running counter register whose value can be calculated when it is read.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Reviewed-by: Hao Wu <wuhaotsh@google.com> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210219144617.4782-4-peter.maydell@linaro.org
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#
e4341623 |
| 19-Feb-2021 |
Peter Maydell <peter.maydell@linaro.org> |
clock: Add ClockPreUpdate callback event type
Add a new callback event type ClockPreUpdate, which is called on period changes before the period is updated.
Signed-off-by: Peter Maydell <peter.mayde
clock: Add ClockPreUpdate callback event type
Add a new callback event type ClockPreUpdate, which is called on period changes before the period is updated.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Reviewed-by: Hao Wu <wuhaotsh@google.com> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210219144617.4782-3-peter.maydell@linaro.org
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5ee0abed |
| 19-Feb-2021 |
Peter Maydell <peter.maydell@linaro.org> |
clock: Add ClockEvent parameter to callbacks
The Clock framework allows users to specify a callback which is called after the clock's period has been updated. Some users need to also have a callbac
clock: Add ClockEvent parameter to callbacks
The Clock framework allows users to specify a callback which is called after the clock's period has been updated. Some users need to also have a callback which is called before the clock period is updated.
As the first step in adding support for notifying Clock users on pre-update events, add an argument to the ClockCallback to specify what event is being notified, and add an argument to the various functions for registering a callback to specify which events are of interest to that callback.
Note that the documentation update renders correct the previously incorrect claim in 'Adding a new clock' that callbacks "will be explained in a following section".
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Message-id: 20210219144617.4782-2-peter.maydell@linaro.org
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9df52f58 |
| 29-Jan-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210129-1' into staging
target-arm queue: * Implement ID_PFR2 * Conditionalize DBGDIDR * rename xlnx-zcu102.canbusN properties
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20210129-1' into staging
target-arm queue: * Implement ID_PFR2 * Conditionalize DBGDIDR * rename xlnx-zcu102.canbusN properties * provide powerdown/reset mechanism for secure firmware on 'virt' board * hw/misc: Fix arith overflow in NPCM7XX PWM module * target/arm: Replace magic value by MMU_DATA_LOAD definition * configure: fix preadv errors on Catalina macOS with new XCode * Various configure and other cleanups in preparation for iOS support * hvf: Add hypervisor entitlement to output binaries (needed for Big Sur) * Implement pvpanic-pci device * Convert the CMSDK timer devices to the Clock framework
# gpg: Signature made Fri 29 Jan 2021 16:08:02 GMT # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20210129-1: (46 commits) hw/arm/stellaris: Remove board-creation reset of STELLARIS_SYS arm: Remove frq properties on CMSDK timer, dualtimer, watchdog, ARMSSE arm: Don't set freq properties on CMSDK timer, dualtimer, watchdog, ARMSSE hw/arm/armsse: Use Clock to set system_clock_scale tests/qtest/cmsdk-apb-watchdog-test: Test clock changes hw/watchdog/cmsdk-apb-watchdog: Convert to use Clock input hw/timer/cmsdk-apb-dualtimer: Convert to use Clock input hw/timer/cmsdk-apb-timer: Convert to use Clock input hw/arm/stellaris: Create Clock input for watchdog hw/arm/stellaris: Convert SSYS to QOM device hw/arm/musca: Create and connect ARMSSE Clocks hw/arm/mps2-tz: Create and connect ARMSSE Clocks hw/arm/mps2: Create and connect SYSCLK Clock hw/arm/mps2: Inline CMSDK_APB_TIMER creation hw/arm/armsse: Wire up clocks hw/arm/armsse: Rename "MAINCLK" property to "MAINCLK_FRQ" hw/watchdog/cmsdk-apb-watchdog: Add Clock input hw/timer/cmsdk-apb-dualtimer: Add Clock input hw/timer/cmsdk-apb-timer: Add Clock input hw/timer/cmsdk-apb-timer: Rename CMSDKAPBTIMER struct to CMSDKAPBTimer ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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132b1025 |
| 28-Jan-2021 |
Peter Maydell <peter.maydell@linaro.org> |
clock: Add new clock_has_source() function
Add a function for checking whether a clock has a source. This is useful for devices which have input clocks that must be wired up by the board as it allo
clock: Add new clock_has_source() function
Add a function for checking whether a clock has a source. This is useful for devices which have input clocks that must be wired up by the board as it allows them to fail in realize rather than ploughing on with a zero-period clock.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-id: 20210128114145.20536-3-peter.maydell@linaro.org Message-id: 20210121190622.22000-3-peter.maydell@linaro.org
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2e0b5bbe |
| 05-Jan-2021 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210104' into staging
MIPS patches queue
- Use PCI macros (Philippe Mathieu-Daudé) - Clean up VT82C686B south bridge (BALATON Zoltan)
Merge remote-tracking branch 'remotes/philmd-gitlab/tags/mips-20210104' into staging
MIPS patches queue
- Use PCI macros (Philippe Mathieu-Daudé) - Clean up VT82C686B south bridge (BALATON Zoltan) - Introduce clock_ticks_to_ns() (Peter Maydell) - Add Loongson-3 machine (Huacai Chen) - Make addresses used by bootloader unsigned (Jiaxun Yang) - Clean fuloong2e PROM environment (Jiaxun Yang) - Add integration test of fuloong2e booting Linux (Jiaxun Yang)
# gpg: Signature made Mon 04 Jan 2021 22:37:48 GMT # gpg: using RSA key FAABE75E12917221DCFD6BB2E3E32C2CDEADC0DE # gpg: Good signature from "Philippe Mathieu-Daudé (F4BUG) <f4bug@amsat.org>" [full] # Primary key fingerprint: FAAB E75E 1291 7221 DCFD 6BB2 E3E3 2C2C DEAD C0DE
* remotes/philmd-gitlab/tags/mips-20210104: (35 commits) tests/acceptance: Test boot_linux_console for fuloong2e hw/mips/fuloong2e: Correct cpuclock in PROM environment hw/mips/fuloong2e: Remove unused env entry hw/mips/fuloong2e: Replace faulty documentation links hw/mips/fuloong2e: Remove define DEBUG_FULOONG2E_INIT hw/mips: Use address translation helper to handle ENVP_ADDR hw/mips/malta: Use address translation helper to calculate bootloader_run_addr hw/mips: Make bootloader addresses unsigned docs/system: Update MIPS machine documentation hw/mips: Add Loongson-3 machine support hw/mips: Add Loongson-3 boot parameter helpers hw/mips: Implement fw_cfg_arch_key_name() hw/intc: Rework Loongson LIOINTC clock: Define and use new clock_display_freq() clock: Remove clock_get_ns() target/mips: Don't use clock_get_ns() in clock period calculation clock: Introduce clock_ticks_to_ns() vt82c686: Rename superio config related parts vt82c686: Use shorter name for local variable holding object state vt82c686: Remove unneeded includes and defines ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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b7cd9c1e |
| 15-Dec-2020 |
Peter Maydell <peter.maydell@linaro.org> |
clock: Define and use new clock_display_freq()
It's common to want to print a human-readable indication of a clock's frequency. Provide a utility function in the clock API to return a string which i
clock: Define and use new clock_display_freq()
It's common to want to print a human-readable indication of a clock's frequency. Provide a utility function in the clock API to return a string which is a displayable representation of the frequency, and use it in qdev-monitor.c.
Before:
(qemu) info qtree [...] dev: xilinx,zynq_slcr, id "" clock-in "ps_clk" freq_hz=3.333333e+07 mmio 00000000f8000000/0000000000001000
After:
dev: xilinx,zynq_slcr, id "" clock-in "ps_clk" freq_hz=33.3 MHz mmio 00000000f8000000/0000000000001000
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201215150929.30311-5-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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de6a65f1 |
| 15-Dec-2020 |
Peter Maydell <peter.maydell@linaro.org> |
clock: Remove clock_get_ns()
Remove the now-unused clock_get_ns() API and the CLOCK_PERIOD_TO_NS() macro that only it was using.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: P
clock: Remove clock_get_ns()
Remove the now-unused clock_get_ns() API and the CLOCK_PERIOD_TO_NS() macro that only it was using.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201215150929.30311-4-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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554d5237 |
| 15-Dec-2020 |
Peter Maydell <peter.maydell@linaro.org> |
clock: Introduce clock_ticks_to_ns()
The clock_get_ns() API claims to return the period of a clock in nanoseconds. Unfortunately since it returns an integer and a clock's period is represented in un
clock: Introduce clock_ticks_to_ns()
The clock_get_ns() API claims to return the period of a clock in nanoseconds. Unfortunately since it returns an integer and a clock's period is represented in units of 2^-32 nanoseconds, the result is often an approximation, and calculating a clock expiry deadline by multiplying clock_get_ns() by a number-of-ticks is unacceptably inaccurate.
Introduce a new API clock_ticks_to_ns() which returns the number of nanoseconds it takes the clock to make a given number of ticks. This function can do the complete calculation internally and will thus give a more accurate result.
Signed-off-by: Peter Maydell <peter.maydell@linaro.org> Tested-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Reviewed-by: Luc Michel <luc@lmichel.fr> Reviewed-by: Richard Henderson <richard.henderson@linaro.org> Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org> Message-Id: <20201215150929.30311-2-peter.maydell@linaro.org> Signed-off-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
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Revision tags: v5.2.0 |
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126eeee6 |
| 30-Apr-2020 |
Peter Maydell <peter.maydell@linaro.org> |
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200430-1' into staging
target-arm queue: * xlnx-zdma: Fix endianness handling of descriptor loading * nrf51: Fix last GPIO CNF
Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20200430-1' into staging
target-arm queue: * xlnx-zdma: Fix endianness handling of descriptor loading * nrf51: Fix last GPIO CNF address * gicv3: Use gicr_typer in arm_gicv3_icc_reset * msf2: Add EMAC block to SmartFusion2 SoC * New clock modelling framework * hw/arm: versal: Setup the ADMA with 128bit bus-width * Cadence: gem: fix wraparound in 64bit descriptors * cadence_gem: clear RX control descriptor * target/arm: Vectorize integer comparison vs zero * hw/arm/virt: dt: add kaslr-seed property * hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes
# gpg: Signature made Thu 30 Apr 2020 15:43:54 BST # gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE # gpg: issuer "peter.maydell@linaro.org" # gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate] # gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate] # Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE
* remotes/pmaydell/tags/pull-target-arm-20200430-1: (30 commits) hw/arm: xlnx-zcu102: Disable unsupported FDT firmware nodes hw/arm: xlnx-zcu102: Move arm_boot_info into XlnxZCU102 device_tree: Constify compat in qemu_fdt_node_path() device_tree: Allow name wildcards in qemu_fdt_node_path() target/arm/cpu: Update coding style to make checkpatch.pl happy target/arm: Make cpu_register() available for other files target/arm: Restrict the Address Translate write operation to TCG accel hw/arm/virt: dt: add kaslr-seed property hw/arm/virt: dt: move creation of /secure-chosen to create_fdt() target/arm: Vectorize integer comparison vs zero net: cadence_gem: clear RX control descriptor Cadence: gem: fix wraparound in 64bit descriptors hw/arm: versal: Setup the ADMA with 128bit bus-width qdev-monitor: print the device's clock with info qtree hw/arm/xilinx_zynq: connect uart clocks to slcr hw/char/cadence_uart: add clock support hw/misc/zynq_slcr: add clock generation for uarts docs/clocks: add device's clock documentation qdev-clock: introduce an init array to ease the device construction qdev: add clock input&output support to devices. ...
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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Revision tags: v5.0.0 |
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31e5784a |
| 17-Apr-2020 |
Peter Maydell <peter.maydell@linaro.org> |
docs/clocks: add device's clock documentation
Add the documentation about the clock inputs and outputs in devices.
This is based on the original work of Frederic Konrad.
Signed-off-by: Damien Hedd
docs/clocks: add device's clock documentation
Add the documentation about the clock inputs and outputs in devices.
This is based on the original work of Frederic Konrad.
Signed-off-by: Damien Hedde <damien.hedde@greensocs.com> Reviewed-by: Alistair Francis <alistair.francis@wdc.com> Reviewed-by: Edgar E. Iglesias <edgar.iglesias@xilinx.com> Message-id: 20200406135251.157596-6-damien.hedde@greensocs.com [PMM: Editing pass for minor grammar, style and Sphinx formatting fixes] Reviewed-by: Peter Maydell <peter.maydell@linaro.org> Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
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