History log of /openbmc/qemu/disas/capstone.c (Results 1 – 9 of 9)
Revision (<<< Hide revision tags) (Show revision tags >>>) Date Author Comments
Revision tags: v9.2.0, v9.1.2, v9.1.1, v9.1.0, v8.0.0, v7.2.0
# f1d33f55 06-Oct-2022 Stefan Hajnoczi <stefanha@redhat.com>

Merge tag 'pull-testing-gdbstub-plugins-gitdm-061022-3' of https://github.com/stsquad/qemu into staging

testing, gdbstub, plugin and gitdm updates

- cleanup scripts/ci/setup in advance of ppc64 r

Merge tag 'pull-testing-gdbstub-plugins-gitdm-061022-3' of https://github.com/stsquad/qemu into staging

testing, gdbstub, plugin and gitdm updates

- cleanup scripts/ci/setup in advance of ppc64 runner
- ensure detected gdb reported to TCG tests
- update hexagon container with build deps
- move alpine container to tagged release
- fix overflow during qos-test test tree iteration
- allow bios blobs to be built with test cross compilers
- introduce monitor_puts for plain strings
- share disas code between monitor and plugins
- fix bug in execlog plugin
- add more tcg plugin documentation, reorg
- fix link to semihosting spec
- re-factor gdbstub to use AccelClass/Ops
- many gitdm updates
- fix race with plugin mutex lock and linux-user fork()

# -----BEGIN PGP SIGNATURE-----
#
# iQEzBAABCgAdFiEEZoWumedRZ7yvyN81+9DbCVqeKkQFAmM+s+YACgkQ+9DbCVqe
# KkSDwgf/Qj0OScOr5Bfw3/KAV0/SFL1vHISb2r5qZVG4DvdY/c/sitPBHPJ8N5jQ
# 918M8AiI3+4Mb/GwkdYBEyWgVZ5ELOkJTObypa5pwmF1K/xDUlG7ZRmJ9+xkJ44Q
# TmrVLQyw6d907B2u+DfqX68AYYnto1yQT/eUo6TiLdIJ5NXIYRn5u34snG9qWHja
# b/Dp7DxnoJMS1EhlMhukekCHGGNUeYn4ewIKbsG1EouH5PndzrvP8LRAcWyxv0m4
# tD2bEAHCMKqTqefkNgG7GCO3HND1JBfWdckx3OD4hBnMnuNtsZBL23QN7MDytgnv
# 0JnYSwkWZCuMIt7oKCOXLUbCjQG97Q==
# =1vZ4
# -----END PGP SIGNATURE-----
# gpg: Signature made Thu 06 Oct 2022 06:54:30 EDT
# gpg: using RSA key 6685AE99E75167BCAFC8DF35FBD0DB095A9E2A44
# gpg: Good signature from "Alex Bennée (Master Work Key) <alex.bennee@linaro.org>" [unknown]
# gpg: WARNING: This key is not certified with a trusted signature!
# gpg: There is no indication that the signature belongs to the owner.
# Primary key fingerprint: 6685 AE99 E751 67BC AFC8 DF35 FBD0 DB09 5A9E 2A44

* tag 'pull-testing-gdbstub-plugins-gitdm-061022-3' of https://github.com/stsquad/qemu: (52 commits)
plugins: add [pre|post]fork helpers to linux-user
contrib/gitdm: add Université Grenoble Alpes
contrib/gitdm: add Simon to individual contributors
contrib/gitdm: add China Telecom to the domain map
contrib/gitdm: add ISCAS to the academics group
contrib/gitdm: add WANG Xuerui to individual contributers
contrib/gitdm: add Paul to individual contributors
contrib/gitdm: add mapping for Loongson Technology
accel/kvm: move kvm_update_guest_debug to inline stub
gdbstub: move guest debug support check to ops
gdbstub: move breakpoint logic to accel ops
gdbstub: move sstep flags probing into AccelClass
gdbstub: move into its own sub directory
semihosting: update link to spec
docs/devel: document the test plugins
contrib/plugins: reset skip when matching in execlog
docs/devel: move API to end of tcg-plugins.rst
docs/devel: clean-up qemu invocations in tcg-plugins
plugins: Assert mmu_idx in range before use in qemu_plugin_get_hwaddr
plugins: extend execlog to filter matches
...

Signed-off-by: Stefan Hajnoczi <stefanha@redhat.com>

show more ...


# 90bbf9d9 29-Sep-2022 Alex Bennée <alex.bennee@linaro.org>

disas: use result of ->read_memory_func

This gets especially confusing if you start plugging in host addresses
from a trace and you wonder why the output keeps changing. Report when
read_memory_func

disas: use result of ->read_memory_func

This gets especially confusing if you start plugging in host addresses
from a trace and you wonder why the output keeps changing. Report when
read_memory_func fails instead of blindly disassembling the buffer
contents.

Signed-off-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Richard Henderson <richard.henderson@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-Id: <20220929114231.583801-35-alex.bennee@linaro.org>

show more ...


Revision tags: v7.0.0, v6.2.0, v6.1.0
# e79de63a 07-Jan-2021 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210107' into staging

Build fix for ppc64 centos7.
Reduce the use of scratch registers for tcg/i386.
Use _aligned_malloc for Win32.
En

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-tcg-20210107' into staging

Build fix for ppc64 centos7.
Reduce the use of scratch registers for tcg/i386.
Use _aligned_malloc for Win32.
Enable split w^x code gen buffers.

# gpg: Signature made Thu 07 Jan 2021 20:06:38 GMT
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-tcg-20210107: (47 commits)
tcg: Constify TCGLabelQemuLdst.raddr
tcg: Constify tcg_code_gen_epilogue
tcg: Remove TCG_TARGET_SUPPORT_MIRROR
tcg/arm: Support split-wx code generation
tcg/mips: Support split-wx code generation
tcg/mips: Do not assert on relocation overflow
accel/tcg: Add mips support to alloc_code_gen_buffer_splitwx_memfd
tcg/riscv: Support split-wx code generation
tcg/riscv: Remove branch-over-branch fallback
tcg/riscv: Fix branch range checks
tcg/s390: Support split-wx code generation
tcg/s390: Use tcg_tbrel_diff
tcg/sparc: Support split-wx code generation
tcg/sparc: Use tcg_tbrel_diff
tcg/ppc: Support split-wx code generation
tcg/ppc: Use tcg_out_mem_long to reset TCG_REG_TB
tcg/ppc: Use tcg_tbrel_diff
tcg: Introduce tcg_tbrel_diff
tcg/tci: Push const down through bytecode reading
disas: Push const down through host disassembly
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


Revision tags: v5.2.0
# f06176be 30-Oct-2020 Richard Henderson <richard.henderson@linaro.org>

disas: Push const down through host disassembly

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@

disas: Push const down through host disassembly

Reviewed-by: Joelle van Dyne <j@getutm.app>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


# c7a7a877 03-Nov-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201102' into staging

target-arm queue:
* target/arm: Fix Neon emulation bugs on big-endian hosts
* target/arm: fix handling of

Merge remote-tracking branch 'remotes/pmaydell/tags/pull-target-arm-20201102' into staging

target-arm queue:
* target/arm: Fix Neon emulation bugs on big-endian hosts
* target/arm: fix handling of HCR.FB
* target/arm: fix LORID_EL1 access check
* disas/capstone: Fix monitor disassembly of >32 bytes
* hw/arm/smmuv3: Fix potential integer overflow (CID 1432363)
* hw/arm/boot: fix SVE for EL3 direct kernel boot
* hw/display/omap_lcdc: Fix potential NULL pointer dereference
* hw/display/exynos4210_fimd: Fix potential NULL pointer dereference
* target/arm: Get correct MMU index for other-security-state
* configure: Test that gio libs from pkg-config work
* hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts work
* docs: Fix building with Sphinx 3
* tests/qtest/npcm7xx_rng-test: Disable randomness tests

# gpg: Signature made Mon 02 Nov 2020 17:09:00 GMT
# gpg: using RSA key E1A5C593CD419DE28E8315CF3C2525ED14360CDE
# gpg: issuer "peter.maydell@linaro.org"
# gpg: Good signature from "Peter Maydell <peter.maydell@linaro.org>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@gmail.com>" [ultimate]
# gpg: aka "Peter Maydell <pmaydell@chiark.greenend.org.uk>" [ultimate]
# Primary key fingerprint: E1A5 C593 CD41 9DE2 8E83 15CF 3C25 25ED 1436 0CDE

* remotes/pmaydell/tags/pull-target-arm-20201102: (26 commits)
tests/qtest/npcm7xx_rng-test: Disable randomness tests
qemu-option-trace.rst.inc: Don't use option:: markup
scripts/kerneldoc: For Sphinx 3 use c:macro for macros with arguments
hw/intc/arm_gicv3_cpuif: Make GIC maintenance interrupts work
configure: Test that gio libs from pkg-config work
target/arm: Get correct MMU index for other-security-state
hw/display/exynos4210_fimd: Fix potential NULL pointer dereference
hw/display/omap_lcdc: Fix potential NULL pointer dereference
hw/arm/boot: fix SVE for EL3 direct kernel boot
hw/arm/smmuv3: Fix potential integer overflow (CID 1432363)
disas/capstone: Fix monitor disassembly of >32 bytes
target/arm: fix LORID_EL1 access check
target/arm: fix handling of HCR.FB
target/arm: Fix VUDOT/VSDOT (scalar) on big-endian hosts
target/arm: Fix float16 pairwise Neon ops on big-endian hosts
target/arm: Improve do_prewiden_3d
target/arm: Simplify do_long_3d and do_2scalar_long
target/arm: Rename neon_load_reg64 to vfp_load_reg64
target/arm: Add read/write_neon_element64
target/arm: Rename neon_load_reg32 to vfp_load_reg32
...

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


# 437588d8 02-Nov-2020 Peter Maydell <peter.maydell@linaro.org>

disas/capstone: Fix monitor disassembly of >32 bytes

If we're using the capstone disassembler, disassembly of a run of
instructions more than 32 bytes long disassembles the wrong data for
instructio

disas/capstone: Fix monitor disassembly of >32 bytes

If we're using the capstone disassembler, disassembly of a run of
instructions more than 32 bytes long disassembles the wrong data for
instructions beyond the 32 byte mark:

(qemu) xp /16x 0x100
0000000000000100: 0x00000005 0x54410001 0x00000001 0x00001000
0000000000000110: 0x00000000 0x00000004 0x54410002 0x3c000000
0000000000000120: 0x00000000 0x00000004 0x54410009 0x74736574
0000000000000130: 0x00000000 0x00000000 0x00000000 0x00000000
(qemu) xp /16i 0x100
0x00000100: 00000005 andeq r0, r0, r5
0x00000104: 54410001 strbpl r0, [r1], #-1
0x00000108: 00000001 andeq r0, r0, r1
0x0000010c: 00001000 andeq r1, r0, r0
0x00000110: 00000000 andeq r0, r0, r0
0x00000114: 00000004 andeq r0, r0, r4
0x00000118: 54410002 strbpl r0, [r1], #-2
0x0000011c: 3c000000 .byte 0x00, 0x00, 0x00, 0x3c
0x00000120: 54410001 strbpl r0, [r1], #-1
0x00000124: 00000001 andeq r0, r0, r1
0x00000128: 00001000 andeq r1, r0, r0
0x0000012c: 00000000 andeq r0, r0, r0
0x00000130: 00000004 andeq r0, r0, r4
0x00000134: 54410002 strbpl r0, [r1], #-2
0x00000138: 3c000000 .byte 0x00, 0x00, 0x00, 0x3c
0x0000013c: 00000000 andeq r0, r0, r0

Here the disassembly of 0x120..0x13f is using the data that is in
0x104..0x123.

This is caused by passing the wrong value to the read_memory_func().
The intention is that at this point in the loop the 'cap_buf' buffer
already contains 'csize' bytes of data for the instruction at guest
addr 'pc', and we want to read in an extra 'tsize' bytes. Those
extra bytes are therefore at 'pc + csize', not 'pc'. On the first
time through the loop 'csize' happens to be zero, so the initial read
of 32 bytes into cap_buf is correct and as long as the disassembly
never needs to read more data we return the correct information.

Use the correct guest address in the call to read_memory_func().

Cc: qemu-stable@nongnu.org
Fixes: https://bugs.launchpad.net/qemu/+bug/1900779
Signed-off-by: Peter Maydell <peter.maydell@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Message-id: 20201022132445.25039-1-peter.maydell@linaro.org

show more ...


# 671ad7c4 05-Oct-2020 Peter Maydell <peter.maydell@linaro.org>

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-cap-20201003' into staging

Update capstone submodule from v3.0.5 to v5 ("next").
Convert submodule build to meson.
Enable capstone disassem

Merge remote-tracking branch 'remotes/rth-gitlab/tags/pull-cap-20201003' into staging

Update capstone submodule from v3.0.5 to v5 ("next").
Convert submodule build to meson.
Enable capstone disassembly for s390x.
Code cleanups in disas.c

# gpg: Signature made Sat 03 Oct 2020 10:33:44 BST
# gpg: using RSA key 7A481E78868B4DB6A85A05C064DF38E8AF7E215F
# gpg: issuer "richard.henderson@linaro.org"
# gpg: Good signature from "Richard Henderson <richard.henderson@linaro.org>" [full]
# Primary key fingerprint: 7A48 1E78 868B 4DB6 A85A 05C0 64DF 38E8 AF7E 215F

* remotes/rth-gitlab/tags/pull-cap-20201003:
disas/capstone: Add skipdata hook for s390x
disas: Enable capstone disassembly for s390x
disas: Split out capstone code to disas/capstone.c
disas: Configure capstone for aarch64 host without libvixl
disas: Cleanup plugin_disas
disas: Use qemu/bswap.h for bfd endian loads
disas: Clean up CPUDebug initialization
disas: Move host asm annotations to tb_gen_code
capstone: Require version 4.0 from a system library
capstone: Update to upstream "next" branch
capstone: Convert Makefile bits to meson bits

Signed-off-by: Peter Maydell <peter.maydell@linaro.org>

show more ...


# c6d3da96 11-Sep-2020 Richard Henderson <richard.henderson@linaro.org>

disas/capstone: Add skipdata hook for s390x

It is always possible to tell the length of an insn, even if the
actual insn is unknown. Skip the correct number of bytes, so that
we stay in sync with t

disas/capstone: Add skipdata hook for s390x

It is always possible to tell the length of an insn, even if the
actual insn is unknown. Skip the correct number of bytes, so that
we stay in sync with the instruction stream.

Acked-by: Thomas Huth <thuth@redhat.com>
Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Reviewed-by: Philippe Mathieu-Daudé <f4bug@amsat.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...


# f343346b 12-Sep-2020 Richard Henderson <richard.henderson@linaro.org>

disas: Split out capstone code to disas/capstone.c

There is nothing target-specific about this code, so it
can be added to common_ss. This also requires that the
base capstone dependency be added t

disas: Split out capstone code to disas/capstone.c

There is nothing target-specific about this code, so it
can be added to common_ss. This also requires that the
base capstone dependency be added to common_ss, so that
we get the correct include paths added to CFLAGS.

Reviewed-by: Alex Bennée <alex.bennee@linaro.org>
Signed-off-by: Richard Henderson <richard.henderson@linaro.org>

show more ...