History log of /openbmc/openpower-debug-collector/dump/create_pel.hpp (Results 1 – 4 of 4)
Revision Date Author Comments
# eb46252d 17-Jun-2024 Manojkiran Eda <manojkiran.eda@gmail.com>

Fix spelling mistakes using codespell

This commit corrects various spelling mistakes throughout the
repository. The corrections were made automatically using `codespell`[1]
tool.

[1]: https://githu

Fix spelling mistakes using codespell

This commit corrects various spelling mistakes throughout the
repository. The corrections were made automatically using `codespell`[1]
tool.

[1]: https://github.com/codespell-project/codespell

Change-Id: Ib615c5fe1dfb01fc0adedd692524fe145c8c4e82
Signed-off-by: Manojkiran Eda <manojkiran.eda@gmail.com>

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# f229889d 21-Apr-2024 Dhruvaraj Subhashchandran <dhruvaraj@in.ibm.com>

Implement support for POZ FFDC with multiple FFDC packets

This commit implements support for POZ FFDC, where multiple FFDC packets
can be returned after executing an SBE chip-op. This differs from t

Implement support for POZ FFDC with multiple FFDC packets

This commit implements support for POZ FFDC, where multiple FFDC packets
can be returned after executing an SBE chip-op. This differs from the
processor SBE chip-op, which typically returns only a single FFDC packet
upon a chip-op failure.

Key aspects of the implementation:
- Each FFDC packet is associated with a unique SLID id, allowing for the
identification of separate and unrelated FFDC packets within the
collection.
- Each unique SLID is treated as an independent PEL, ensuring that each
FFDC packet is logged separately.
- FFDC data may be present even if the chip-op completes successfully.
In such cases, PELs are logged, but the chip-op is not considered a
failure.

Tests:
Testing the proc FFDC to make sure no regression
Testing POZ FFDC and making sure multiple PELs are logged
Testing FFDC with chip-op success

Change-Id: I8c70bc8df9249c5b9841baef7b5dbe0a6f22e08d
Signed-off-by: Dhruvaraj Subhashchandran <dhruvaraj@in.ibm.com>

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# f9f65b82 13-Oct-2022 Dhruvaraj Subhashchandran <dhruvaraj@in.ibm.com>

Stop instructions before collecting dump

The instructions need to be stopped before attempting to collect
the hostboot dump. This commit calls stop instructions chip-op
on each processor SBE to make

Stop instructions before collecting dump

The instructions need to be stopped before attempting to collect
the hostboot dump. This commit calls stop instructions chip-op
on each processor SBE to make sure the instructions are stopped
before collecting the dump.
If some SBEs are not ready to accept the chip-op or timed out
the hostboot dump will not be collected from those SBEs and an
SBE dump will lbe collected in the case of a timeout.

Tests:
Tested hardware dump and hostboot dump successfully

Signed-off-by: Dhruvaraj Subhashchandran <dhruvaraj@in.ibm.com>
Change-Id: I0b0ff9e6c6d62187a680395931de0a4dfaff579a

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# 6feeebd6 19-Oct-2021 Dhruvaraj Subhashchandran <dhruvaraj@in.ibm.com>

Add PEL creation for SBE chip-op failures

This commit introduces a new function within the SBE dump collection
mechanism to create PELs) when chip operations on SBE fail.

Test:
Make sure the PELs a

Add PEL creation for SBE chip-op failures

This commit introduces a new function within the SBE dump collection
mechanism to create PELs) when chip operations on SBE fail.

Test:
Make sure the PELs are logged during chip-op failure

Signed-off-by: Dhruvaraj Subhashchandran <dhruvaraj@in.ibm.com>
Change-Id: I23f78b702f4a2b9cf01315c3fbb487dc428bd2a0

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