38592ae6 | 23-Aug-2023 |
Vijendar Mukunda <Vijendar.Mukunda@amd.com> |
ASoC: SOF: amd: clear dsp to host interrupt status
DSP_SW_INTR_STAT_OFFSET is a common interrupt register which will be accessed by both ACP firmware and driver. This register contains register bits
ASoC: SOF: amd: clear dsp to host interrupt status
DSP_SW_INTR_STAT_OFFSET is a common interrupt register which will be accessed by both ACP firmware and driver. This register contains register bits corresponds to host to dsp interrupts and vice versa.
when dsp to host interrupt is reported, only clear dsp to host interrupt bit in DSP_SW_INTR_STAT_OFFSET.
Fixes: 2e7c6652f9b8 ("ASoC: SOF: amd: Fix for handling spurious interrupts from DSP")
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-7-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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3d02e1c4 | 23-Aug-2023 |
Vijendar Mukunda <Vijendar.Mukunda@amd.com> |
ASoC: SOF: amd: clear panic mask status when panic occurs
Due to scratch memory persistence, Once the DSP panic is reported, need to clear the panic mask after handling DSP panic. Otherwise, It resu
ASoC: SOF: amd: clear panic mask status when panic occurs
Due to scratch memory persistence, Once the DSP panic is reported, need to clear the panic mask after handling DSP panic. Otherwise, It results in DSP panic on next reboot.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-6-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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0d9e4cf5 | 23-Aug-2023 |
Vijendar Mukunda <Vijendar.Mukunda@amd.com> |
ASoC: SOF: amd: add conditional check for acp_clkmux_sel register
Few AMD platforms require ACP ACLK as clock source. Add conditional check for clock mux selection register for switching between int
ASoC: SOF: amd: add conditional check for acp_clkmux_sel register
Few AMD platforms require ACP ACLK as clock source. Add conditional check for clock mux selection register for switching between internal clock and ACP ACLK.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-5-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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f3b2f8b7 | 23-Aug-2023 |
Vijendar Mukunda <Vijendar.Mukunda@amd.com> |
ASoC: SOF: amd: remove redundant clock mux selection register write
ACP clock mux selection register is already programmed during acp init sequence. Remove the redundant register write.
Signed-off-
ASoC: SOF: amd: remove redundant clock mux selection register write
ACP clock mux selection register is already programmed during acp init sequence. Remove the redundant register write.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-4-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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60eb816e | 23-Aug-2023 |
Vijendar Mukunda <Vijendar.Mukunda@amd.com> |
ASoC: SOF: amd: add module parameter for firmware debug
Add module parameter for firmware debug. If firmware debug flag is enabled, clear the fusion stall bit which is required for enabling firmware
ASoC: SOF: amd: add module parameter for firmware debug
Add module parameter for firmware debug. If firmware debug flag is enabled, clear the fusion stall bit which is required for enabling firmware debugging through JTAG.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-3-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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0a142814 | 23-Aug-2023 |
Vijendar Mukunda <Vijendar.Mukunda@amd.com> |
ASoC: SOF: amd: enable ACP external global interrupt
Previously ACP SOF firmware used to enable the ACP external global interrupt register. This will restrict to report ACP host interrupts only afte
ASoC: SOF: amd: enable ACP external global interrupt
Previously ACP SOF firmware used to enable the ACP external global interrupt register. This will restrict to report ACP host interrupts only after firmware loading is successful. This register needs to be set from host driver to handle other ACP interrupts(SoundWire Interrupts) before loading the ACP firmware.
Add field for external interrupt enable register in acp descriptor structure and enable the external interrupt enable register.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230823073340.2829821-2-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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f7da8800 | 09-Aug-2023 |
Venkata Prasad Potturu <venkataprasad.potturu@amd.com> |
ASoC: SOF: amd: Enable signed firmware image loading for Vangogh platform
Enable signed firmware loading for Vangogh platform using dmi quirks.
Signed-off-by: Venkata Prasad Potturu <venkataprasad.
ASoC: SOF: amd: Enable signed firmware image loading for Vangogh platform
Enable signed firmware loading for Vangogh platform using dmi quirks.
Signed-off-by: Venkata Prasad Potturu <venkataprasad.potturu@amd.com> Link: https://lore.kernel.org/r/20230809123534.287707-3-venkataprasad.potturu@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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6a69b724 | 09-Aug-2023 |
Venkata Prasad Potturu <venkataprasad.potturu@amd.com> |
ASoC: SOF: amd: Add support for signed fw image loading
Add support for signed firmware code bin and data bin loading for amd platforms.
Signed-off-by: Venkata Prasad Potturu <venkataprasad.potturu
ASoC: SOF: amd: Add support for signed fw image loading
Add support for signed firmware code bin and data bin loading for amd platforms.
Signed-off-by: Venkata Prasad Potturu <venkataprasad.potturu@amd.com> Link: https://lore.kernel.org/r/20230809123534.287707-2-venkataprasad.potturu@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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8278aa8e | 13-Jul-2023 |
V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com> |
ASoC: SOF: amd: Add Probe register offset for renoir and rembrandt platform.
Add Probe register offset for renoir and rembrandt platform to get position update.
Signed-off-by: V sujith kumar Reddy
ASoC: SOF: amd: Add Probe register offset for renoir and rembrandt platform.
Add Probe register offset for renoir and rembrandt platform to get position update.
Signed-off-by: V sujith kumar Reddy <Vsujithkumar.Reddy@amd.com> Link: https://lore.kernel.org/r/20230713125709.418851-4-vsujithkumar.reddy@amd.corp-partner.google.com Signed-off-by: Mark Brown <broonie@kernel.org>
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dd6bdd8b | 03-Apr-2023 |
Vijendar Mukunda <Vijendar.Mukunda@amd.com> |
ASoC: SOF: amd: refactor dmic codec platform device creation
Under snd_sof_dev device scope, create platform device for dmic codec.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link:
ASoC: SOF: amd: refactor dmic codec platform device creation
Under snd_sof_dev device scope, create platform device for dmic codec.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/168050621098.26.7486882101201297853@mailman-core.alsa-project.org Signed-off-by: Mark Brown <broonie@kernel.org>
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c7a3662f | 03-Apr-2023 |
Vijendar Mukunda <Vijendar.Mukunda@amd.com> |
ASoC: SOF: amd: refactor error checks in probe call
Refactor error checks code in probe() callback.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/202304
ASoC: SOF: amd: refactor error checks in probe call
Refactor error checks code in probe() callback.
Signed-off-by: Vijendar Mukunda <Vijendar.Mukunda@amd.com> Link: https://lore.kernel.org/r/20230403071651.919027-5-Vijendar.Mukunda@amd.com Signed-off-by: Mark Brown <broonie@kernel.org>
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