395d9b40 | 05-Nov-2024 |
Herve Codina <herve.codina@bootlin.com> |
soc: fsl: cpm1: qmc: Set the ret error code on platform_get_irq() failure
[ Upstream commit cb3daa51db819a172e9524e96e2ed96b4237e51a ]
A kernel test robot detected a missing error code: qmc.c:19
soc: fsl: cpm1: qmc: Set the ret error code on platform_get_irq() failure
[ Upstream commit cb3daa51db819a172e9524e96e2ed96b4237e51a ]
A kernel test robot detected a missing error code: qmc.c:1942 qmc_probe() warn: missing error code 'ret'
Indeed, the error returned by platform_get_irq() is checked and the operation is aborted in case of failure but the ret error code is not set in that case.
Set the ret error code.
Reported-by: kernel test robot <lkp@intel.com> Reported-by: Dan Carpenter <dan.carpenter@linaro.org> Closes: https://lore.kernel.org/r/202411051350.KNy6ZIWA-lkp@intel.com/ Fixes: 3178d58e0b97 ("soc: fsl: cpm1: Add support for QMC") Cc: stable@vger.kernel.org Signed-off-by: Herve Codina <herve.codina@bootlin.com> Link: https://lore.kernel.org/r/20241105145623.401528-1-herve.codina@bootlin.com Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Signed-off-by: Sasha Levin <sashal@kernel.org>
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6885d8e7 | 08-Aug-2024 |
Herve Codina <herve.codina@bootlin.com> |
soc: fsl: cpm1: qmc: Introduce qmc_{init,exit}_xcc() and their CPM1 version
[ Upstream commit de5fdb7d14b34f7fea930f2d72cf0241ec679e72 ]
Current code handles the CPM1 version of QMC and initialize
soc: fsl: cpm1: qmc: Introduce qmc_{init,exit}_xcc() and their CPM1 version
[ Upstream commit de5fdb7d14b34f7fea930f2d72cf0241ec679e72 ]
Current code handles the CPM1 version of QMC and initialize the QMC used SCC. The QUICC Engine (QE) version uses an UCC (Unified Communication Controllers) instead of the SCC (Serial Communication Controllers) used in the CPM1 version. These controllers serve the same purpose and are used in the same way but their inializations are slightly different.
In order to prepare the support for QE version of QMC, introduce qmc_init_xcc() to initialize theses controllers (UCC in QE and SCC in CPM1) and isolate the CPM1 specific SCC initialization in a specific function.
Also introduce qmc_exit_xcc() for consistency to revert operations done in qmc_init_xcc().
Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20240808071132.149251-28-herve.codina@bootlin.com Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Stable-dep-of: cb3daa51db81 ("soc: fsl: cpm1: qmc: Set the ret error code on platform_get_irq() failure") Signed-off-by: Sasha Levin <sashal@kernel.org>
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c73f53c7 | 08-Aug-2024 |
Herve Codina <herve.codina@bootlin.com> |
soc: fsl: cpm1: qmc: Introduce qmc_init_resource() and its CPM1 version
[ Upstream commit 727b3ab490a5f5e74fb3f246c9fdfb339d309950 ]
Current code handles the CPM1 version of QMC. Resources initiali
soc: fsl: cpm1: qmc: Introduce qmc_init_resource() and its CPM1 version
[ Upstream commit 727b3ab490a5f5e74fb3f246c9fdfb339d309950 ]
Current code handles the CPM1 version of QMC. Resources initialisations (i.e. retrieving base addresses and offsets of different parts) will be slightly different in the QUICC Engine (QE) version. Indeed, in QE version, some resources need to be allocated and are no more "staticaly" defined.
In order to prepare the support for QE version, introduce qmc_init_resource() to initialize those resources and isolate the CPM1 specific operations in a specific function.
Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20240808071132.149251-27-herve.codina@bootlin.com Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Stable-dep-of: cb3daa51db81 ("soc: fsl: cpm1: qmc: Set the ret error code on platform_get_irq() failure") Signed-off-by: Sasha Levin <sashal@kernel.org>
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f8656437 | 08-Aug-2024 |
Herve Codina <herve.codina@bootlin.com> |
soc: fsl: cpm1: qmc: Re-order probe() operations
[ Upstream commit a13bf605342ea9df492b8159cadaa41862b53e15 ]
Current code handles CPM1 version of QMC. In the QUICC Engine (QE) version, some operat
soc: fsl: cpm1: qmc: Re-order probe() operations
[ Upstream commit a13bf605342ea9df492b8159cadaa41862b53e15 ]
Current code handles CPM1 version of QMC. In the QUICC Engine (QE) version, some operations done at probe() need to be done in a different order.
In order to prepare the support for the QE version, changed the sequence of operation done at probe(): - Retrieve the tsa_serial earlier, before initializing resources. - Group SCC initialisation and do this initialization when it is really needed in the probe() sequence.
Having the QE compatible sequence in the CPM1 version does not lead to any issue and works correctly without any regressions.
Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20240808071132.149251-26-herve.codina@bootlin.com Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Stable-dep-of: cb3daa51db81 ("soc: fsl: cpm1: qmc: Set the ret error code on platform_get_irq() failure") Signed-off-by: Sasha Levin <sashal@kernel.org>
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7ca6b9e7 | 08-Aug-2024 |
Herve Codina <herve.codina@bootlin.com> |
soc: fsl: cpm1: qmc: Fix blank line and spaces
[ Upstream commit f06ab938bcddcb3c3a0b458b03a827c701919c9e ]
checkpatch.pl raises the following issues CHECK: Please don't use multiple blank lines
soc: fsl: cpm1: qmc: Fix blank line and spaces
[ Upstream commit f06ab938bcddcb3c3a0b458b03a827c701919c9e ]
checkpatch.pl raises the following issues CHECK: Please don't use multiple blank lines CHECK: Alignment should match open parenthesis
Fix them.
Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20240808071132.149251-20-herve.codina@bootlin.com Signed-off-by: Christophe Leroy <christophe.leroy@csgroup.eu> Stable-dep-of: cb3daa51db81 ("soc: fsl: cpm1: qmc: Set the ret error code on platform_get_irq() failure") Signed-off-by: Sasha Levin <sashal@kernel.org>
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075c01f6 | 05-Dec-2023 |
Herve Codina <herve.codina@bootlin.com> |
soc: fsl: cpm1: qmc: Fix rx channel reset
commit dfe66d012af2ddfa566cf9c860b8472b412fb7e4 upstream.
The qmc_chan_reset_rx() set the is_rx_stopped flag. This leads to an inconsistent state in the fo
soc: fsl: cpm1: qmc: Fix rx channel reset
commit dfe66d012af2ddfa566cf9c860b8472b412fb7e4 upstream.
The qmc_chan_reset_rx() set the is_rx_stopped flag. This leads to an inconsistent state in the following sequence. qmc_chan_stop() qmc_chan_reset() Indeed, after the qmc_chan_reset() call, the channel must still be stopped. Only a qmc_chan_start() call can move the channel from stopped state to started state.
Fix the issue removing the is_rx_stopped flag setting from qmc_chan_reset()
Fixes: 3178d58e0b97 ("soc: fsl: cpm1: Add support for QMC") Cc: stable@vger.kernel.org Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-4-herve.codina@bootlin.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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07d45e91 | 05-Dec-2023 |
Herve Codina <herve.codina@bootlin.com> |
soc: fsl: cpm1: qmc: Fix __iomem addresses declaration
commit a5ec3a21220da06bdda2e686012ca64fdb6c513d upstream.
Running sparse (make C=1) on qmc.c raises a lot of warning such as: ... warning:
soc: fsl: cpm1: qmc: Fix __iomem addresses declaration
commit a5ec3a21220da06bdda2e686012ca64fdb6c513d upstream.
Running sparse (make C=1) on qmc.c raises a lot of warning such as: ... warning: incorrect type in assignment (different address spaces) expected struct cpm_buf_desc [usertype] *[noderef] __iomem bd got struct cpm_buf_desc [noderef] [usertype] __iomem *txbd_free ...
Indeed, some variable were declared 'type *__iomem var' instead of 'type __iomem *var'.
Use the correct declaration to remove these warnings.
Fixes: 3178d58e0b97 ("soc: fsl: cpm1: Add support for QMC") Cc: stable@vger.kernel.org Signed-off-by: Herve Codina <herve.codina@bootlin.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20231205152116.122512-3-herve.codina@bootlin.com Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
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3178d58e | 17-Feb-2023 |
Herve Codina <herve.codina@bootlin.com> |
soc: fsl: cpm1: Add support for QMC
The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one serial controller using the same TDM physical interface routed from the TSA.
It is
soc: fsl: cpm1: Add support for QMC
The QMC (QUICC Multichannel Controller) emulates up to 64 channels within one serial controller using the same TDM physical interface routed from the TSA.
It is available in some PowerQUICC SoC such as the MPC885 or MPC866.
It is also available on some Quicc Engine SoCs. This current version support CPM1 SoCs only and some enhancement are needed to support Quicc Engine SoCs.
Signed-off-by: Herve Codina <herve.codina@bootlin.com> Acked-by: Li Yang <leoyang.li@nxp.com> Reviewed-by: Christophe Leroy <christophe.leroy@csgroup.eu> Link: https://lore.kernel.org/r/20230217145645.1768659-7-herve.codina@bootlin.com Signed-off-by: Mark Brown <broonie@kernel.org>
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