0fb53e64 | 23-Jun-2023 |
Kelvin Cao <kelvin.cao@microchip.com> |
PCI: switchtec: Add support for PCIe Gen5 devices
Advertise support of Gen5 devices in the driver's device ID table and add the same IDs for the switchtec quirks. Also update driver code to accommod
PCI: switchtec: Add support for PCIe Gen5 devices
Advertise support of Gen5 devices in the driver's device ID table and add the same IDs for the switchtec quirks. Also update driver code to accommodate them.
Link: https://lore.kernel.org/r/20230624000003.2315364-3-kelvin.cao@microchip.com Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Logan Gunthorpe <logang@deltatee.com>
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ddc10938 | 16-Dec-2022 |
Bjorn Helgaas <bhelgaas@google.com> |
PCI: switchtec: Return -EFAULT for copy_to_user() errors
switchtec_dev_read() didn't handle copy_to_user() errors correctly: it assigned "rc = -EFAULT", but actually returned either "size", -ENXIO,
PCI: switchtec: Return -EFAULT for copy_to_user() errors
switchtec_dev_read() didn't handle copy_to_user() errors correctly: it assigned "rc = -EFAULT", but actually returned either "size", -ENXIO, or -EBADMSG instead.
Update the failure cases to unlock mrpc_mutex and return -EFAULT directly.
Link: https://lore.kernel.org/r/20221216162126.207863-3-helgaas@kernel.org Fixes: 080b47def5e5 ("MicroSemi Switchtec management interface driver") Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Logan Gunthorpe <logang@deltatee.com>
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b76521f6 | 18-Nov-2021 |
Kelvin Cao <kelvin.cao@microchip.com> |
PCI/switchtec: Declare local state_names[] as static
The local state_names[] array is constant and need not be allocated and populated each time we enter stuser_set_state(). Declare it as static.
PCI/switchtec: Declare local state_names[] as static
The local state_names[] array is constant and need not be allocated and populated each time we enter stuser_set_state(). Declare it as static.
See the link below for the discussion.
https://lore.kernel.org/r/20211014141859.11444-1-kelvin.cao@microchip.com/
[bhelgaas: simplify commit log] Suggested-by: Krzysztof Wilczyński <kw@linux.com> Link: https://lore.kernel.org/r/20211119003803.2333-3-kelvin.cao@microchip.com Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com> Reviewed-by: Logan Gunthorpe <logang@deltatee.com>
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9f37ab04 | 14-Oct-2021 |
Logan Gunthorpe <logang@deltatee.com> |
PCI/switchtec: Add check of event support
Not all events are supported by every gen/variant of the Switchtec firmware. To solve this, since Gen4, a new bit in each event header is introduced to indi
PCI/switchtec: Add check of event support
Not all events are supported by every gen/variant of the Switchtec firmware. To solve this, since Gen4, a new bit in each event header is introduced to indicate if an event is supported by the firmware.
Link: https://lore.kernel.org/r/20211014141859.11444-6-kelvin.cao@microchip.com Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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67116444 | 14-Oct-2021 |
Kelvin Cao <kelvin.cao@microchip.com> |
PCI/switchtec: Replace ENOTSUPP with EOPNOTSUPP
ENOTSUPP is not a SUSV4 error code, and the following checkpatch.pl warning will be given for new patches which still use ENOTSUPP.
WARNING: ENOT
PCI/switchtec: Replace ENOTSUPP with EOPNOTSUPP
ENOTSUPP is not a SUSV4 error code, and the following checkpatch.pl warning will be given for new patches which still use ENOTSUPP.
WARNING: ENOTSUPP is not a SUSV4 error code, prefer EOPNOTSUPP
See the link below for the discussion.
https://lore.kernel.org/netdev/20200511165319.2251678-1-kuba@kernel.org/
Replace ENOTSUPP with EOPNOTSUPP to align with future patches which will be using EOPNOTSUPP.
Link: https://lore.kernel.org/r/20211014141859.11444-5-kelvin.cao@microchip.com Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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1420ac21 | 14-Oct-2021 |
Kelvin Cao <kelvin.cao@microchip.com> |
PCI/switchtec: Update the way of getting management VEP instance ID
Gen4 firmware adds DMA VEP and NVMe VEP support in VEP (virtual EP) instance ID register in addtion to management EP, update the w
PCI/switchtec: Update the way of getting management VEP instance ID
Gen4 firmware adds DMA VEP and NVMe VEP support in VEP (virtual EP) instance ID register in addtion to management EP, update the way of getting management VEP instance ID.
Link: https://lore.kernel.org/r/20211014141859.11444-4-kelvin.cao@microchip.com Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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551ec658 | 14-Oct-2021 |
Kelvin Cao <kelvin.cao@microchip.com> |
PCI/switchtec: Fix a MRPC error status handling issue
If an error is encountered when executing a MRPC command, the firmware will set the status register to SWITCHTEC_MRPC_STATUS_ERROR and return th
PCI/switchtec: Fix a MRPC error status handling issue
If an error is encountered when executing a MRPC command, the firmware will set the status register to SWITCHTEC_MRPC_STATUS_ERROR and return the error code in the return value register.
Add handling of SWITCHTEC_MRPC_STATUS_ERROR on status register when completing a MRPC command.
Link: https://lore.kernel.org/r/20211014141859.11444-3-kelvin.cao@microchip.com Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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42dae893 | 28-Jul-2020 |
Logan Gunthorpe <logang@deltatee.com> |
PCI: switchtec: Add missing __iomem tag to fix sparse warnings
Fix a missing __iomem tag in the init_pfn() function. This fixes a sparse warning of the form:
$ make C=2 drivers/pci/switch/ driv
PCI: switchtec: Add missing __iomem tag to fix sparse warnings
Fix a missing __iomem tag in the init_pfn() function. This fixes a sparse warning of the form:
$ make C=2 drivers/pci/switch/ drivers/pci/switch/switchtec.c:... incorrect type assignment(different address spaces)
Fixes: 080b47def5e5 ("MicroSemi Switchtec management interface driver") Link: https://lore.kernel.org/r/20200728192434.18993-2-logang@deltatee.com Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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deaa0a8a | 21-Mar-2020 |
Sebastian Andrzej Siewior <bigeasy@linutronix.de> |
pci/switchtec: Replace completion wait queue usage for poll
The poll callback is using the completion wait queue and sticks it into poll_wait() to wake up pollers after a command has completed.
Thi
pci/switchtec: Replace completion wait queue usage for poll
The poll callback is using the completion wait queue and sticks it into poll_wait() to wake up pollers after a command has completed.
This works to some extent, but cannot provide EPOLLEXCLUSIVE support because the waker side uses complete_all() which unconditionally wakes up all waiters. complete_all() is required because completions internally use exclusive wait and complete() only wakes up one waiter by default.
This mixes conceptually different mechanisms and relies on internal implementation details of completions, which in turn puts contraints on changing the internal implementation of completions.
Replace it with a regular wait queue and store the state in struct switchtec_user.
Signed-off-by: Sebastian Andrzej Siewior <bigeasy@linutronix.de> Signed-off-by: Thomas Gleixner <tglx@linutronix.de> Signed-off-by: Peter Zijlstra (Intel) <peterz@infradead.org> Reviewed-by: Logan Gunthorpe <logang@deltatee.com> Acked-by: Bjorn Helgaas <bhelgaas@google.com> Acked-by: Peter Zijlstra (Intel) <peterz@infradead.org> Link: https://lkml.kernel.org/r/20200321113240.936097534@linutronix.de
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7a30ebb9 | 14-Jan-2020 |
Kelvin Cao <kelvin.cao@microchip.com> |
PCI/switchtec: Add Gen4 device IDs
Now that Gen4 is properly supported, advertise support in the module's device ID table and add the same IDs to the list of switchtec quirks.
[logang@deltatee.com:
PCI/switchtec: Add Gen4 device IDs
Now that Gen4 is properly supported, advertise support in the module's device ID table and add the same IDs to the list of switchtec quirks.
[logang@deltatee.com: add commit message and quirk IDs] Link: https://lore.kernel.org/r/20200115035648.2578-8-logang@deltatee.com Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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ce7c8860 | 06-Jan-2020 |
Kelvin Cao <kelvin.cao@microchip.com> |
PCI/switchtec: Add Gen4 MRPC GAS access permission check
Gen4 hardware provides new MRPC commands to read and write directly from any address in the PCI BAR (which Microsemi refers to as GAS). Since
PCI/switchtec: Add Gen4 MRPC GAS access permission check
Gen4 hardware provides new MRPC commands to read and write directly from any address in the PCI BAR (which Microsemi refers to as GAS). Since accessing BARs can be dangerous and break the driver, we don't want unprivileged users to have this ability.
Therefore, require CAP_SYS_ADMIN for the local and remote GAS access MRPC commands. Privileged processes will already have access to the BAR through the sysfs resource file so this doesn't give userspace any capabilities it didn't already have.
[logang@deltatee.com: rework commit message] Link: https://lore.kernel.org/r/20200106190337.2428-11-logang@deltatee.com Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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4efa1d2e | 14-Jan-2020 |
Kelvin Cao <kelvin.cao@microchip.com> |
PCI/switchtec: Add Gen4 flash information interface support
Add the new flash_info registers struct and the implementation of ioctl_flash_part_info() for the new Gen4 hardware.
[logang@deltatee.com
PCI/switchtec: Add Gen4 flash information interface support
Add the new flash_info registers struct and the implementation of ioctl_flash_part_info() for the new Gen4 hardware.
[logang@deltatee.com: rewrote commit message] Link: https://lore.kernel.org/r/20200115035648.2578-7-logang@deltatee.com Signed-off-by: Kelvin Cao <kelvin.cao@microchip.com> Signed-off-by: Logan Gunthorpe <logang@deltatee.com> Signed-off-by: Bjorn Helgaas <bhelgaas@google.com>
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