drm/nouveau/fault/tu102: switch to explicit intr handlers- reads vectors from HW, rather than being hardcoded- removes hacks to support routing via old interfacesSigned-off-by: Ben Skeggs <bskeg
drm/nouveau/fault/tu102: switch to explicit intr handlers- reads vectors from HW, rather than being hardcoded- removes hacks to support routing via old interfacesSigned-off-by: Ben Skeggs <bskeggs@redhat.com>Reviewed-by: Lyude Paul <lyude@redhat.com>
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drm/nouveau/nvkm: rip out old notifySigned-off-by: Ben Skeggs <bskeggs@redhat.com>Reviewed-by: Lyude Paul <lyude@redhat.com>
drm/nouveau/fault: expose replayable fault buffer event classSigned-off-by: Ben Skeggs <bskeggs@redhat.com>Reviewed-by: Lyude Paul <lyude@redhat.com>
drm/nouveau/fault: switch non-replayable faults to nvkm_event_ntfyv2: fix flush_work() being called uninitialised during initSigned-off-by: Ben Skeggs <bskeggs@redhat.com>Reviewed-by: Lyude Paul
drm/nouveau/fault: switch non-replayable faults to nvkm_event_ntfyv2: fix flush_work() being called uninitialised during initSigned-off-by: Ben Skeggs <bskeggs@redhat.com>Reviewed-by: Lyude Paul <lyude@redhat.com>
drm/nouveau/nvkm: add a replacement for nvkm_notifyThis replaces the twisty, confusing, relationship between nvkm_event andnvkm_notify with something much simpler, and less racey. It also places
drm/nouveau/nvkm: add a replacement for nvkm_notifyThis replaces the twisty, confusing, relationship between nvkm_event andnvkm_notify with something much simpler, and less racey. It also placesevents in the object tree hierarchy, which will allow a heap of the codetracking events across allocation/teardown/suspend to be removed.This commit just adds the new interfaces, and passes the owning subdev tothe event constructor to enable debug-tracing in the new code.v2:- use ?: (lyude)Signed-off-by: Ben Skeggs <bskeggs@redhat.com>Reviewed-by: Lyude Paul <lyude@redhat.com>
drm/nouveau/mc: use split type+inst in interrupt masking APISigned-off-by: Ben Skeggs <bskeggs@redhat.com>Reviewed-by: Lyude Paul <lyude@redhat.com>
drm/nouveau/fault: switch to instanced constructorSigned-off-by: Ben Skeggs <bskeggs@redhat.com>Reviewed-by: Lyude Paul <lyude@redhat.com>
drm/nouveau/mc/tu102: Fix MMU fault interrupts on TuringTuring reports MMU fault interrupts via new top level interruptregisters. The old PMC MMU interrupt vector is not used by the HW. Thismeans
drm/nouveau/mc/tu102: Fix MMU fault interrupts on TuringTuring reports MMU fault interrupts via new top level interruptregisters. The old PMC MMU interrupt vector is not used by the HW. Thismeans we can remap the new top-level MMU interrupt to the exisiting PMCMMU bit which simplifies the implementation until all interrupts aremoved over to using the new top level registers.Signed-off-by: Alistair Popple <apopple@nvidia.com>Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault/gv100-: fix memory leak on module unloadSigned-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault/tu102: define nvkm_fault_func.pinSigned-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault: Add support for GP10BThere is no BAR2 on GP10B and there is no need to map through BAR2because all memory is shared between the GPU and the CPU. Add a customimplementation of t
drm/nouveau/fault: Add support for GP10BThere is no BAR2 on GP10B and there is no need to map through BAR2because all memory is shared between the GPU and the CPU. Add a customimplementation of the fault sub-device that uses nvkm_memory_addr()instead of nvkm_memory_bar2() to return the address of a pinned faultbuffer.Signed-off-by: Thierry Reding <treding@nvidia.com>Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau: fix bogus GPL-2 license headerThe bulk SPDX addition made all these files into GPL-2.0 licensed files.However the remainder of the project is MIT-licensed, these fileswere simply mis
drm/nouveau: fix bogus GPL-2 license headerThe bulk SPDX addition made all these files into GPL-2.0 licensed files.However the remainder of the project is MIT-licensed, these fileswere simply missing the boiler plate and got caught up in the global update.Fixes: 96ac6d4351004 (treewide: Add SPDX license identifier - Kbuild)Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
treewide: Add SPDX license identifier - KbuildAdd SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any formThese files fall under the project license,
treewide: Add SPDX license identifier - KbuildAdd SPDX license identifiers to all Make/Kconfig files which: - Have no license information of any formThese files fall under the project license, GPL v2 only. The resulting SPDXlicense identifier is: GPL-2.0Reported-by: Masahiro Yamada <yamada.masahiro@socionext.com>Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>Reviewed-by: Kate Stewart <kstewart@linuxfoundation.org>Signed-off-by: Greg Kroah-Hartman <gregkh@linuxfoundation.org>
drm/nouveau/fault/gv100-: expose VoltaFaultBufferAThis nvclass exposes the replayable fault buffer, which will be usedby SVM to manage GPU page faults.Signed-off-by: Ben Skeggs <bskeggs@redhat.c
drm/nouveau/fault/gv100-: expose VoltaFaultBufferAThis nvclass exposes the replayable fault buffer, which will be usedby SVM to manage GPU page faults.Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault/gp100: expose MaxwellFaultBufferAThis nvclass exposes the replayable fault buffer, which will be usedby SVM to manage GPU page faults.Signed-off-by: Ben Skeggs <bskeggs@redhat.
drm/nouveau/fault/gp100: expose MaxwellFaultBufferAThis nvclass exposes the replayable fault buffer, which will be usedby SVM to manage GPU page faults.Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault/tu102: rename implementation from tu104Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault/tu104: initial supportNew registers.Currently uncertain how exactly to mask fault buffer interrupts. This willlikely be corrected at around the same time as the new MC interru
drm/nouveau/fault/tu104: initial supportNew registers.Currently uncertain how exactly to mask fault buffer interrupts. This willlikely be corrected at around the same time as the new MC interrupt stuffhas been properly figured out and implemented.For the moment, it shouldn't matter too much.Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault: add explicit control over fault buffer interruptsThe GPU will continually fire interrupts while a fault buffer GET != PUT,and to stop the spurious interrupts while the handler d
drm/nouveau/fault: add explicit control over fault buffer interruptsThe GPU will continually fire interrupts while a fault buffer GET != PUT,and to stop the spurious interrupts while the handler does its thing, wewere disabling the fault buffer temporarily.This is not actually a great idea to begin with, and made worse by Voltaresetting GET/PUT when it's reactivated. So, let's not do that.Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault: store get/put pri address in nvkm_fault_bufferWill allow more shared fault buffer handling code between Pascal/Volta.Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault: remove manual mapping of fault buffers into BAR2Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault/gv100: fix fault buffer initialisationNot sure how this happened, it worked last time I tested it!Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault/gv100: initial supportSigned-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault/gp100: implement replayable fault buffer initialisationSigned-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/fault: add infrastructure to support fault buffersGPU-specific support will be added separately.Signed-off-by: Ben Skeggs <bskeggs@redhat.com>
drm/nouveau/core: define FAULT subdevThis will be responsible for the handling of MMU fault buffers on GPUsthat support them.Signed-off-by: Ben Skeggs <bskeggs@redhat.com>