Merge tag 'v6.6.14' into dev-6.6

This is the 6.6.14 stable release

clk: qcom: gpucc-sm8150: Update the gpu_cc_pll1 config

[ Upstream commit 6ebd9a4f8b8d2b35cf965a04849c4ba763722f13 ]

Update the test_ctl_hi_val and test_ctl_hi1_val of gpu_cc_pll1
as per latest HW r

clk: qcom: gpucc-sm8150: Update the gpu_cc_pll1 config

[ Upstream commit 6ebd9a4f8b8d2b35cf965a04849c4ba763722f13 ]

Update the test_ctl_hi_val and test_ctl_hi1_val of gpu_cc_pll1
as per latest HW recommendation.

Fixes: 0cef71f2ccc8 ("clk: qcom: Add graphics clock controller driver for SM8150")
Signed-off-by: Satya Priya Kakitapalli <quic_skakitap@quicinc.com>
Reviewed-by: Konrad Dybcio <konrad.dybcio@linaro.org>
Link: https://lore.kernel.org/r/20231122042814.4158076-1-quic_skakitap@quicinc.com
Signed-off-by: Bjorn Andersson <andersson@kernel.org>
Signed-off-by: Sasha Levin <sashal@kernel.org>

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Merge branch 'next' into for-linus

Prepare input updates for 5.17 merge window.

Merge branch 'reset/of-get-optional-exclusive' of git://git.pengutronix.de/pza/linux into timers/drivers/next

"Add optional variant of of_reset_control_get_exclusive(). If the
requested reset is not

Merge branch 'reset/of-get-optional-exclusive' of git://git.pengutronix.de/pza/linux into timers/drivers/next

"Add optional variant of of_reset_control_get_exclusive(). If the
requested reset is not specified in the device tree, this function
returns NULL instead of an error."

This dependency is needed for the Generic Timer Module (a.k.a OSTM)
support for RZ/G2L.

Signed-off-by: Daniel Lezcano <daniel.lezcano@linaro.org>

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Merge tag 'v5.15' into next

Sync up with the mainline to get the latest APIs and DT bindings.

Merge branch 'for-5.16-vsprintf-pgp' into for-linus

Merge branch 'pruss-fix' into fixes

Merge in a fix for pruss reset issue caused by enabling pruss for am335x.

Merge tag 'v5.15-rc2' into spi-5.15

Linux 5.15-rc2

Merge drm/drm-next into drm-intel-next

Catch-up on 5.15-rc1 and sync with drm-intel-gt-next
to prepare the PXP topic branch.

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Merge drm/drm-next into drm-intel-gt-next

Close the divergence which has caused patches not to apply and
have a solid baseline for the PXP patches that Rodrigo will send
a topic branch PR for.

Sign

Merge drm/drm-next into drm-intel-gt-next

Close the divergence which has caused patches not to apply and
have a solid baseline for the PXP patches that Rodrigo will send
a topic branch PR for.

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

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Merge drm/drm-next into drm-misc-next

Kickstart new drm-misc-next cycle.

Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Merge branch 'linus' into smp/urgent

Ensure that all usage sites of get/put_online_cpus() except for the
struggler in drivers/thermal are gone. So the last user and the deprecated
inlines can be rem

Merge branch 'linus' into smp/urgent

Ensure that all usage sites of get/put_online_cpus() except for the
struggler in drivers/thermal are gone. So the last user and the deprecated
inlines can be removed.

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Merge branch 'next' into for-linus

Prepare input updates for 5.15 merge window.

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Nothing changed in the clk framework core this time around. We did get
so

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Nothing changed in the clk framework core this time around. We did get
some updates to the basic clk types to use determine_rate for the
divider type and add a power of two fractional divider flag though.

Otherwise, this is a collection of clk driver updates. More than half
the diffstat is in the Qualcomm clk driver where we add a bunch of
data to describe clks on various SoCs and fix bugs. The other big new
thing in here is the Mediatek MT8192 clk driver. That's been under
review for a while and it's nice to see that it's finally upstream.

Beyond that it's the usual set of minor fixes and tweaks to clk
drivers. There are some non-clk driver bits in here which have all
been acked by the respective maintainers.

New Drivers:
- Support video, gpu, display clks on qcom sc7280 SoCs
- GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
- Multimedia clks (MMCC) on qcom MSM8994/MSM8992
- RPMh clks on qcom SM6350 SoCs
- Support for Mediatek MT8192 SoCs
- Add display (DU and DSI) clocks on Renesas R-Car V3U
- Add I2C, DMAC, USB, sound (SSIF-2), GPIO, CANFD, and ADC clocks and
resets on Renesas RZ/G2L

Updates:
- Support the SD/OE pin on IDT VersaClock 5 and 6 clock generators
- Add power of two flag to fractional divider clk type
- Migrate some clk drivers to clk_divider_ops.determine_rate
- Migrate to clk_parent_data in gcc-sdm660
- Fix CLKOUT clocks on i.MX8MM and i.MX8MN by using imx_clk_hw_mux2
- Switch from .round_rate to .determine_rate in clk-divider-gate
- Fix clock tree update for TF-A controlled clocks for all i.MX8M
- Add missing M7 core clock for i.MX8MN
- YAML conversion of rk3399 clock controller binding
- Removal of GRF dependency for the rk3328/rk3036 pll types
- Drop CLK_IS_CRITICAL flag from Tegra fuse clk
- Make CLK_R9A06G032 Kconfig symbol invisible
- Convert various DT bindings to YAML"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (128 commits)
dt-bindings: clock: samsung: fix header path in example
clk: tegra: fix old-style declaration
clk: qcom: Add SM6350 GCC driver
MAINTAINERS: clock: include S3C and S5P in Samsung SoC clock entry
dt-bindings: clock: samsung: convert S5Pv210 AudSS to dtschema
dt-bindings: clock: samsung: convert Exynos AudSS to dtschema
dt-bindings: clock: samsung: convert Exynos4 to dtschema
dt-bindings: clock: samsung: convert Exynos3250 to dtschema
dt-bindings: clock: samsung: convert Exynos542x to dtschema
dt-bindings: clock: samsung: add bindings for Exynos external clock
dt-bindings: clock: samsung: convert Exynos5250 to dtschema
clk: vc5: Add properties for configuring SD/OE behavior
clk: vc5: Use dev_err_probe
dt-bindings: clk: vc5: Add properties for configuring the SD/OE pin
dt-bindings: clock: brcm,iproc-clocks: fix armpll properties
clk: zynqmp: Fix kernel-doc format
clk: at91: clk-generated: Limit the requested rate to our range
clk: ralink: avoid to set 'CLK_IS_CRITICAL' flag for gates
clk: zynqmp: Fix a memory leak
clk: zynqmp: Check the return type
...

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Merge branches 'clk-qcom', 'clk-socfpga', 'clk-mediatek', 'clk-lmk' and 'clk-x86' into clk-next

- Support video, gpu, display clks on qcom sc7280 SoCs
- GCC clks on qcom MSM8953, SM4250/6115, and

Merge branches 'clk-qcom', 'clk-socfpga', 'clk-mediatek', 'clk-lmk' and 'clk-x86' into clk-next

- Support video, gpu, display clks on qcom sc7280 SoCs
- GCC clks on qcom MSM8953, SM4250/6115, and SM6350 SoCs
- Multimedia clks (MMCC) on qcom MSM8994/MSM8992
- Migrate to clk_parent_data in gcc-sdm660
- RPMh clks on qcom SM6350 SoCs
- Support for Mediatek MT8192 SoCs

* clk-qcom: (38 commits)
clk: qcom: Add SM6350 GCC driver
dt-bindings: clock: Add SM6350 GCC clock bindings
clk: qcom: rpmh: Add support for RPMH clocks on SM6350
dt-bindings: clock: Add RPMHCC bindings for SM6350
clk: qcom: adjust selects for SM_VIDEOCC_8150 and SM_VIDEOCC_8250
clk: qcom: Add Global Clock controller (GCC) driver for SM6115
dt-bindings: clk: qcom: gcc-sm6115: Document SM6115 GCC
clk: qcom: mmcc-msm8994: Add MSM8992 support
clk: qcom: Add msm8994 MMCC driver
dt-bindings: clock: Add support for MSM8992/4 MMCC
clk: qcom: Add Global Clock Controller driver for MSM8953
dt-bindings: clock: add Qualcomm MSM8953 GCC driver bindings
clk: qcom: gcc-sdm660: Replace usage of parent_names
clk: qcom: gcc-sdm660: Move parent tables after PLLs
clk: qcom: use devm_pm_runtime_enable and devm_pm_clk_create
PM: runtime: add devm_pm_clk_create helper
PM: runtime: add devm_pm_runtime_enable helper
clk: qcom: a53-pll: Add MSM8939 a53pll support
dt-bindings: clock: Update qcom,a53pll bindings for MSM8939 support
clk: qcom: a53pll/mux: Use unique clock name
...

* clk-socfpga:
clk: socfpga: agilex: add the bypass register for s2f_usr0 clock
clk: socfpga: agilex: fix up s2f_user0_clk representation
clk: socfpga: agilex: fix the parents of the psi_ref_clk

* clk-mediatek: (22 commits)
clk: mediatek: make COMMON_CLK_MT8167* depend on COMMON_CLK_MT8167
clk: mediatek: Add MT8192 vencsys clock support
clk: mediatek: Add MT8192 vdecsys clock support
clk: mediatek: Add MT8192 scp adsp clock support
clk: mediatek: Add MT8192 msdc clock support
clk: mediatek: Add MT8192 mmsys clock support
clk: mediatek: Add MT8192 mfgcfg clock support
clk: mediatek: Add MT8192 mdpsys clock support
clk: mediatek: Add MT8192 ipesys clock support
clk: mediatek: Add MT8192 imp i2c wrapper clock support
clk: mediatek: Add MT8192 imgsys clock support
clk: mediatek: Add MT8192 camsys clock support
clk: mediatek: Add MT8192 audio clock support
clk: mediatek: Add MT8192 basic clocks support
clk: mediatek: Add mtk_clk_simple_probe() to simplify clock providers
clk: mediatek: Add configurable enable control to mtk_pll_data
clk: mediatek: Fix asymmetrical PLL enable and disable control
clk: mediatek: Get regmap without syscon compatible check
clk: mediatek: Add dt-bindings of MT8192 clocks
dt-bindings: ARM: Mediatek: Add audsys document binding for MT8192
...

* clk-lmk:
clk: lmk04832: drop redundant fallthrough statements

* clk-x86:
clk: x86: Rename clk-lpt to more specific clk-lpss-atom

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clk: qcom: gpucc-sm8150: Add SC8180x support

The GPU clock controller found in SC8180x is a variant of the same block
found in SM8150, but with one additional clock frequency for the
gmu_clk_src clo

clk: qcom: gpucc-sm8150: Add SC8180x support

The GPU clock controller found in SC8180x is a variant of the same block
found in SM8150, but with one additional clock frequency for the
gmu_clk_src clock.

Signed-off-by: Bjorn Andersson <bjorn.andersson@linaro.org>
Link: https://lore.kernel.org/r/20210721225329.3035779-1-bjorn.andersson@linaro.org
Acked-by: Rob Herring <robh@kernel.org>
Signed-off-by: Stephen Boyd <sboyd@kernel.org>

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Merge tag 'v5.13' into next

Sync up with the mainline to get the latest parport API.

Merge tag 'v5.13-rc3' into asoc-5.13

Linux 5.13-rc3

Merge drm/drm-next into drm-intel-gt-next

Pulling in -rc2 fixes and TTM changes that next upcoming patches depend
on.

Signed-off-by: Joonas Lahtinen <joonas.lahtinen@linux.intel.com>

Merge tag 'v5.13-rc2' into spi-5.13

Linux 5.13-rc2

Merge branch 'fixes-rc1' into fixes

Merge drm/drm-next into drm-intel-next

Time to get back in sync...

Signed-off-by: Rodrigo Vivi <rodrigo.vivi@intel.com>

Merge drm/drm-next into drm-misc-next

Backmerging to get v5.12 fixes. Requested for vmwgfx.

Signed-off-by: Thomas Zimmermann <tzimmermann@suse.de>

Merge drm/drm-fixes into drm-misc-fixes

Start this new release drm-misc-fixes branch

Signed-off-by: Maxime Ripard <maxime@cerno.tech>

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Here's a collection of largely clk driver updates. The usual suspects
are

Merge tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux

Pull clk updates from Stephen Boyd:
"Here's a collection of largely clk driver updates. The usual suspects
are here: i.MX, Qualcomm, Renesas, Allwinner, Samsung, and Rockchip,
but it feels pretty light on commits.

There's only one real commit to the framework core and that's to
consolidate code. Otherwise the diffstat is dominated by many Qualcomm
clk driver patches that modernize the driver for the proper way of
speciying clk parents. That's shifting data around, which could subtly
break things so I'll be on the lookout for fixes.

New Drivers:
- Proper clk driver for Mediatek MT7621 SoCs
- Support for the clock controller on the new Rockchip rk3568

Updates:
- Simplify Zynq Kconfig dependencies
- Use clk_hw pointers in socfpga driver
- Cleanup parent data in qcom clk drivers
- Some cleanups for rk3399 modularization
- Fix reparenting of i.MX UART clocks by initializing only the ones
associated to stdout
- Correct the PCIE clocks for i.MX8MP and i.MX8MQ
- Make i.MX LPCG and SCU clocks return on registering failure
- Kernel doc fixes
- Add DAB hardware accelerator clocks on Renesas R-Car E3 and M3-N
- Add timer (TMU) clocks on Renesas R-Car H3 ES1.0
- Add Timer (TMU & CMT) and thermal sensor (TSC) clocks on
Renesas R-Car V3U
- Sigma-delta modulation on Allwinner V3s audio PLL"

* tag 'clk-for-linus' of git://git.kernel.org/pub/scm/linux/kernel/git/clk/linux: (82 commits)
MAINTAINERS: add MT7621 CLOCK maintainer
staging: mt7621-dts: use valid vendor 'mediatek' instead of invalid 'mtk'
staging: mt7621-dts: make use of new 'mt7621-clk'
clk: ralink: add clock driver for mt7621 SoC
clk: uniphier: Fix potential infinite loop
clk: qcom: rpmh: add support for SDX55 rpmh IPA clock
clk: qcom: gcc-sdm845: get rid of the test clock
clk: qcom: convert SDM845 Global Clock Controller to parent_data
dt-bindings: clock: separate SDM845 GCC clock bindings
clk: qcom: apss-ipq-pll: Add missing MODULE_DEVICE_TABLE
clk: qcom: a53-pll: Add missing MODULE_DEVICE_TABLE
clk: qcom: a7-pll: Add missing MODULE_DEVICE_TABLE
dt: bindings: add mt7621-sysc device tree binding documentation
dt-bindings: clock: add dt binding header for mt7621 clocks
clk: samsung: Remove redundant dev_err calls
clk: zynqmp: pll: add set_pll_mode to check condition in zynqmp_pll_enable
clk: zynqmp: move zynqmp_pll_set_mode out of round_rate callback
clk: zynqmp: Drop dependency on ARCH_ZYNQMP
clk: zynqmp: Enable the driver if ZYNQMP_FIRMWARE is selected
clk: qcom: gcc-sm8350: use ARRAY_SIZE instead of specifying num_parents
...

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