ARM: dts: aspeed: minerva: add second source RTC

Add second source RTC on i2c bus 9.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20241212133226.342937-5-yan

ARM: dts: aspeed: minerva: add second source RTC

Add second source RTC on i2c bus 9.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20241212133226.342937-5-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: add bmc ready led setting

Add GPIO BMC_READY on LED and give it active value and transitory flag.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://patc

ARM: dts: aspeed: minerva: add bmc ready led setting

Add GPIO BMC_READY on LED and give it active value and transitory flag.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20241212133226.342937-4-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: add i/o expanders on each FCB

Add four I/O expanders on each i2c of fan control board (FCB), assign the
GPIO line name to each GPIO in use, and specify the interrupt GPIO

ARM: dts: aspeed: minerva: add i/o expanders on each FCB

Add four I/O expanders on each i2c of fan control board (FCB), assign the
GPIO line name to each GPIO in use, and specify the interrupt GPIO number
for each FCB's i/o expander.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20241212133226.342937-3-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: add i/o expanders on bus 0

Add three I/O expanders on i2c bus 0, assign the GPIO line name to each
GPIO in use, and specify the interrupt GPIO that has been used on it and

ARM: dts: aspeed: minerva: add i/o expanders on bus 0

Add three I/O expanders on i2c bus 0, assign the GPIO line name to each
GPIO in use, and specify the interrupt GPIO that has been used on it and
give the interrupt gpio number.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://patch.msgid.link/20241212133226.342937-2-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: add fru device for other blades

The Minerva platform has 16 compute blades and 6 network blades, each with
an EEPROM that can be operated by the CMM. This commit adds supp

ARM: dts: aspeed: minerva: add fru device for other blades

The Minerva platform has 16 compute blades and 6 network blades, each with
an EEPROM that can be operated by the CMM. This commit adds support for
each FRU.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Message-ID: <20240924140215.2484170-4-yangchen.openbmc@gmail.com>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: change the i2c mux number for FCBs

Change the i2c mux channel to match the correct fan board location.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Message-ID: <

ARM: dts: aspeed: minerva: change the i2c mux number for FCBs

Change the i2c mux channel to match the correct fan board location.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Message-ID: <20240924140215.2484170-3-yangchen.openbmc@gmail.com>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: Revise the SGPIO line name

Modify the SGPIO line names sent from the CMM CPLD in the DVT version and
map the blade and FCB numbers to match the silkscreen labels on the ra

ARM: dts: aspeed: minerva: Revise the SGPIO line name

Modify the SGPIO line names sent from the CMM CPLD in the DVT version and
map the blade and FCB numbers to match the silkscreen labels on the rack as
follows:

1. Change the compute blade numbering from 0-15 to 1-16.
2. Change the network blade numbering from 0-5 to 1-6.
3. Update the FCB numbering from TOP0/1, MID0/1, and BOT0/1 to FCB1-6.
4. Revise the SGPIO line name for DVT changed.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Message-ID: <20240924140215.2484170-2-yangchen.openbmc@gmail.com>
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: add host0-ready pin

Add host0-ready pin for phosphor-state-manager.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240711130501.2

ARM: dts: aspeed: minerva: add host0-ready pin

Add host0-ready pin for phosphor-state-manager.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240711130501.2900301-2-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: Add spi-gpio

Add spi-gpio for TPM device.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-18-yangchen.openbmc@gmai

ARM: dts: aspeed: minerva: Add spi-gpio

Add spi-gpio for TPM device.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-18-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: add ltc4287 device

Enable LTC4287 device on i2c-0.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240626130332.929534-17-yangchen

ARM: dts: aspeed: minerva: add ltc4287 device

Enable LTC4287 device on i2c-0.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240626130332.929534-17-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: remove unused power device

Remove unused power device.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240626130332.929534-16-yang

ARM: dts: aspeed: minerva: remove unused power device

Remove unused power device.

Signed-off-by: Yang Chen <yangchen.openbmc@gmail.com>
Link: https://lore.kernel.org/r/20240626130332.929534-16-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: Switch the i2c bus number

Switch the i2c bus number to map the i2c tag according to the hardware
design.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://l

ARM: dts: aspeed: minerva: Switch the i2c bus number

Switch the i2c bus number to map the i2c tag according to the hardware
design.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-15-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: revise sgpio line name

Revise the SGPIO naming to mapping the SGPIO from the CPLD.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240

ARM: dts: aspeed: minerva: revise sgpio line name

Revise the SGPIO naming to mapping the SGPIO from the CPLD.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-14-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: add power monitor xdp710

Add HSC xdp710 on i2c bus0.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-13-yangchen.o

ARM: dts: aspeed: minerva: add power monitor xdp710

Add HSC xdp710 on i2c bus0.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-13-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: add tmp75 sensor

Add tmp75 sensor on the i2c bus connect to each fan board.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/202406261303

ARM: dts: aspeed: minerva: add tmp75 sensor

Add tmp75 sensor on the i2c bus connect to each fan board.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-12-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: enable ehci0 for USB

Enable ehci0 for USB.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-11-yangchen.openbmc@gma

ARM: dts: aspeed: minerva: enable ehci0 for USB

Enable ehci0 for USB.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-11-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: add linename of two pins

Add linename of two pins for power good/control.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332

ARM: dts: aspeed: minerva: add linename of two pins

Add linename of two pins for power good/control.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-10-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: Add adc sensors for fan board

Add ina238 support to read the sensors in front of fans.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/2

ARM: dts: aspeed: minerva: Add adc sensors for fan board

Add ina238 support to read the sensors in front of fans.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-9-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: Define the LEDs node name

Define the LEDs node name.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-8-yangchen.op

ARM: dts: aspeed: minerva: Define the LEDs node name

Define the LEDs node name.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-8-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: remove unused bus and device

Remove unused bus and device.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-7-yangc

ARM: dts: aspeed: minerva: remove unused bus and device

Remove unused bus and device.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-7-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: enable mdio3

Change usage of I2C bus 11 to mdio3.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-6-yangchen.openb

ARM: dts: aspeed: minerva: enable mdio3

Change usage of I2C bus 11 to mdio3.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-6-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: change RTC reference

Change the RTC reference from on-chip to externel on i2c bus 9 and address
is 0x51.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://l

ARM: dts: aspeed: minerva: change RTC reference

Change the RTC reference from on-chip to externel on i2c bus 9 and address
is 0x51.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-5-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: add eeprom on i2c bus

Add eeprom on the i2c-9 address 0x50 and i2c-15 address 0x56.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/2024

ARM: dts: aspeed: minerva: add eeprom on i2c bus

Add eeprom on the i2c-9 address 0x50 and i2c-15 address 0x56.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-4-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: change aliases for uart

Change and add aliases name for uart interface.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.9

ARM: dts: aspeed: minerva: change aliases for uart

Change and add aliases name for uart interface.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-3-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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ARM: dts: aspeed: minerva: change the address of tmp75

Revise the address of tmp75 on I2C bus 1 from 0x48 to 0x4f due to design
change.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https

ARM: dts: aspeed: minerva: change the address of tmp75

Revise the address of tmp75 on I2C bus 1 from 0x48 to 0x4f due to design
change.

Signed-off-by: Yang Chen <yang.chen@quantatw.com>
Link: https://lore.kernel.org/r/20240626130332.929534-2-yangchen.openbmc@gmail.com
Signed-off-by: Andrew Jeffery <andrew@codeconstruct.com.au>

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