mmc.c (4c9d2aaa7ea720ff8c304dd8621afa3ed085486e) mmc.c (05038576e0112a1547f1833bc17b70c34ce006bd)
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */

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169
170 if (mode >= MMC_MODES_END)
171 return "Unknown mode";
172 else
173 return names[mode];
174}
175#endif
176
1/*
2 * Copyright 2008, Freescale Semiconductor, Inc
3 * Andy Fleming
4 *
5 * Based vaguely on the Linux code
6 *
7 * SPDX-License-Identifier: GPL-2.0+
8 */

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169
170 if (mode >= MMC_MODES_END)
171 return "Unknown mode";
172 else
173 return names[mode];
174}
175#endif
176
177static uint mmc_mode2freq(struct mmc *mmc, enum bus_mode mode)
178{
179 static const int freqs[] = {
180 [SD_LEGACY] = 25000000,
181 [MMC_HS] = 26000000,
182 [SD_HS] = 50000000,
183 [UHS_SDR12] = 25000000,
184 [UHS_SDR25] = 50000000,
185 [UHS_SDR50] = 100000000,
186 [UHS_SDR104] = 208000000,
187 [UHS_DDR50] = 50000000,
188 [MMC_HS_52] = 52000000,
189 [MMC_DDR_52] = 52000000,
190 [MMC_HS_200] = 200000000,
191 };
192
193 if (mode == MMC_LEGACY)
194 return mmc->legacy_speed;
195 else if (mode >= MMC_MODES_END)
196 return 0;
197 else
198 return freqs[mode];
199}
200
177static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode)
178{
179 mmc->selected_mode = mode;
201static int mmc_select_mode(struct mmc *mmc, enum bus_mode mode)
202{
203 mmc->selected_mode = mode;
204 mmc->tran_speed = mmc_mode2freq(mmc, mode);
180 debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
181 mmc->tran_speed / 1000000);
182 return 0;
183}
184
185#if !CONFIG_IS_ENABLED(DM_MMC)
186int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
187{

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1190
1191 mmc_set_bus_width(mmc, 4);
1192 }
1193
1194 err = sd_read_ssr(mmc);
1195 if (err)
1196 return err;
1197
205 debug("selecting mode %s (freq : %d MHz)\n", mmc_mode_name(mode),
206 mmc->tran_speed / 1000000);
207 return 0;
208}
209
210#if !CONFIG_IS_ENABLED(DM_MMC)
211int mmc_send_cmd(struct mmc *mmc, struct mmc_cmd *cmd, struct mmc_data *data)
212{

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1215
1216 mmc_set_bus_width(mmc, 4);
1217 }
1218
1219 err = sd_read_ssr(mmc);
1220 if (err)
1221 return err;
1222
1198 if (mmc->card_caps & MMC_MODE_HS) {
1223 if (mmc->card_caps & MMC_MODE_HS)
1199 mmc_select_mode(mmc, SD_HS);
1224 mmc_select_mode(mmc, SD_HS);
1200 mmc->tran_speed = 50000000;
1201 } else {
1225 else
1202 mmc_select_mode(mmc, SD_LEGACY);
1226 mmc_select_mode(mmc, SD_LEGACY);
1203 mmc->tran_speed = 25000000;
1204 }
1205
1206 return 0;
1207}
1208
1209/*
1210 * read the compare the part of ext csd that is constant.
1211 * This can be used to check that the transfer is working
1212 * as expected.

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1318 if (err)
1319 return err;
1320
1321 if (mmc->card_caps & MMC_MODE_HS_52MHz) {
1322 if (mmc->ddr_mode)
1323 mmc_select_mode(mmc, MMC_DDR_52);
1324 else
1325 mmc_select_mode(mmc, MMC_HS_52);
1227
1228 return 0;
1229}
1230
1231/*
1232 * read the compare the part of ext csd that is constant.
1233 * This can be used to check that the transfer is working
1234 * as expected.

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1340 if (err)
1341 return err;
1342
1343 if (mmc->card_caps & MMC_MODE_HS_52MHz) {
1344 if (mmc->ddr_mode)
1345 mmc_select_mode(mmc, MMC_DDR_52);
1346 else
1347 mmc_select_mode(mmc, MMC_HS_52);
1326 mmc->tran_speed = 52000000;
1327 } else if (mmc->card_caps & MMC_MODE_HS) {
1348 } else if (mmc->card_caps & MMC_MODE_HS)
1328 mmc_select_mode(mmc, MMC_HS);
1349 mmc_select_mode(mmc, MMC_HS);
1329 mmc->tran_speed = 26000000;
1330 }
1331
1332 return err;
1333}
1334
1335static int mmc_startup_v4(struct mmc *mmc)
1336{
1337 int err, i;
1338 u64 capacity;

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1594 }
1595 }
1596
1597 /* divide frequency by 10, since the mults are 10x bigger */
1598 freq = fbase[(cmd.response[0] & 0x7)];
1599 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1600
1601 mmc->legacy_speed = freq * mult;
1350
1351 return err;
1352}
1353
1354static int mmc_startup_v4(struct mmc *mmc)
1355{
1356 int err, i;
1357 u64 capacity;

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1613 }
1614 }
1615
1616 /* divide frequency by 10, since the mults are 10x bigger */
1617 freq = fbase[(cmd.response[0] & 0x7)];
1618 mult = multipliers[((cmd.response[0] >> 3) & 0xf)];
1619
1620 mmc->legacy_speed = freq * mult;
1602 mmc->tran_speed = mmc->legacy_speed;
1603 mmc_select_mode(mmc, MMC_LEGACY);
1604
1605 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1606 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1607
1608 if (IS_SD(mmc))
1609 mmc->write_bl_len = mmc->read_bl_len;
1610 else

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1669 if (IS_SD(mmc))
1670 err = sd_select_bus_freq_width(mmc);
1671 else
1672 err = mmc_select_bus_freq_width(mmc);
1673
1674 if (err)
1675 return err;
1676
1621 mmc_select_mode(mmc, MMC_LEGACY);
1622
1623 mmc->dsr_imp = ((cmd.response[1] >> 12) & 0x1);
1624 mmc->read_bl_len = 1 << ((cmd.response[1] >> 16) & 0xf);
1625
1626 if (IS_SD(mmc))
1627 mmc->write_bl_len = mmc->read_bl_len;
1628 else

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1687 if (IS_SD(mmc))
1688 err = sd_select_bus_freq_width(mmc);
1689 else
1690 err = mmc_select_bus_freq_width(mmc);
1691
1692 if (err)
1693 return err;
1694
1677 mmc_set_clock(mmc, mmc->tran_speed);
1678
1679 /* Fix the block length for DDR mode */
1680 if (mmc->ddr_mode) {
1681 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1682 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1683 }
1684
1685 /* fill in device description */

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1696 /* Fix the block length for DDR mode */
1697 if (mmc->ddr_mode) {
1698 mmc->read_bl_len = MMC_MAX_BLOCK_LEN;
1699 mmc->write_bl_len = MMC_MAX_BLOCK_LEN;
1700 }
1701
1702 /* fill in device description */

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