ls1012aqds.c (36cc0de0b919c0e185739142742e0a76a7c5c30a) ls1012aqds.c (4961eafc25d0bfa7ac5f88ec78a7f7501c202fbb)
1/*
2 * Copyright 2016 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <i2c.h>
9#include <fdt_support.h>
10#include <asm/io.h>
11#include <asm/arch/clock.h>
12#include <asm/arch/fsl_serdes.h>
13#ifdef CONFIG_FSL_LS_PPA
14#include <asm/arch/ppa.h>
15#endif
16#include <asm/arch/fdt.h>
1/*
2 * Copyright 2016 Freescale Semiconductor, Inc.
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7#include <common.h>
8#include <i2c.h>
9#include <fdt_support.h>
10#include <asm/io.h>
11#include <asm/arch/clock.h>
12#include <asm/arch/fsl_serdes.h>
13#ifdef CONFIG_FSL_LS_PPA
14#include <asm/arch/ppa.h>
15#endif
16#include <asm/arch/fdt.h>
17#include <asm/arch/mmu.h>
17#include <asm/arch/soc.h>
18#include <ahci.h>
19#include <hwconfig.h>
20#include <mmc.h>
21#include <scsi.h>
22#include <fm_eth.h>
23#include <fsl_esdhc.h>
24#include <fsl_mmdc.h>

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71 0x0000003f, /* mdasp */
72 0x0000022a, /* mpodtctrl */
73 0xa1390003, /* mpzqhwctrl */
74 };
75
76 mmdc_init(&mparam);
77
78 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
18#include <asm/arch/soc.h>
19#include <ahci.h>
20#include <hwconfig.h>
21#include <mmc.h>
22#include <scsi.h>
23#include <fm_eth.h>
24#include <fsl_esdhc.h>
25#include <fsl_mmdc.h>

--- 46 unchanged lines hidden (view full) ---

72 0x0000003f, /* mdasp */
73 0x0000022a, /* mpodtctrl */
74 0xa1390003, /* mpzqhwctrl */
75 };
76
77 mmdc_init(&mparam);
78
79 gd->ram_size = CONFIG_SYS_SDRAM_SIZE;
80#if !defined(CONFIG_SPL) || defined(CONFIG_SPL_BUILD)
81 /* This will break-before-make MMU for DDR */
82 update_early_mmu_table();
83#endif
79
80 return 0;
81}
82
83int board_early_init_f(void)
84{
85 fsl_lsch2_early_init_f();
86

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85 return 0;
86}
87
88int board_early_init_f(void)
89{
90 fsl_lsch2_early_init_f();
91

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