galileo.dts (c5c5c201fe37a02e9edf99b0a2ba9353d9d55ddf) galileo.dts (f2b85ab5e6a91e29c1d64304be371753d75ed172)
1/*
2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7/dts-v1/;
8

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74 u-boot,dm-pre-reloc;
75 reg = <0x0000a500 0x0 0x0 0x0 0x0
76 0x0200a510 0x0 0x0 0x0 0x0>;
77 reg-shift = <2>;
78 clock-frequency = <44236800>;
79 current-speed = <115200>;
80 };
81
1/*
2 * Copyright (C) 2015, Bin Meng <bmeng.cn@gmail.com>
3 *
4 * SPDX-License-Identifier: GPL-2.0+
5 */
6
7/dts-v1/;
8

--- 65 unchanged lines hidden (view full) ---

74 u-boot,dm-pre-reloc;
75 reg = <0x0000a500 0x0 0x0 0x0 0x0
76 0x0200a510 0x0 0x0 0x0 0x0>;
77 reg-shift = <2>;
78 clock-frequency = <44236800>;
79 current-speed = <115200>;
80 };
81
82 irq-router@1f,0 {
82 pch@1f,0 {
83 reg = <0x0000f800 0 0 0 0>;
83 reg = <0x0000f800 0 0 0 0>;
84 compatible = "intel,irq-router";
85 intel,pirq-config = "pci";
86 intel,pirq-link = <0x60 8>;
87 intel,pirq-mask = <0xdef8>;
88 intel,pirq-routing = <
89 PCI_BDF(0, 20, 0) INTA PIRQE
90 PCI_BDF(0, 20, 1) INTB PIRQF
91 PCI_BDF(0, 20, 2) INTC PIRQG
92 PCI_BDF(0, 20, 3) INTD PIRQH
93 PCI_BDF(0, 20, 4) INTA PIRQE
94 PCI_BDF(0, 20, 5) INTB PIRQF
95 PCI_BDF(0, 20, 6) INTC PIRQG
96 PCI_BDF(0, 20, 7) INTD PIRQH
97 PCI_BDF(0, 21, 0) INTA PIRQE
98 PCI_BDF(0, 21, 1) INTB PIRQF
99 PCI_BDF(0, 21, 2) INTC PIRQG
100 PCI_BDF(0, 23, 0) INTA PIRQA
101 PCI_BDF(0, 23, 1) INTB PIRQB
84 compatible = "intel,pch7";
102
85
103 /* PCIe root ports downstream interrupts */
104 PCI_BDF(1, 0, 0) INTA PIRQA
105 PCI_BDF(1, 0, 0) INTB PIRQB
106 PCI_BDF(1, 0, 0) INTC PIRQC
107 PCI_BDF(1, 0, 0) INTD PIRQD
108 PCI_BDF(2, 0, 0) INTA PIRQB
109 PCI_BDF(2, 0, 0) INTB PIRQC
110 PCI_BDF(2, 0, 0) INTC PIRQD
111 PCI_BDF(2, 0, 0) INTD PIRQA
112 >;
86 irq-router {
87 compatible = "intel,irq-router";
88 intel,pirq-config = "pci";
89 intel,pirq-link = <0x60 8>;
90 intel,pirq-mask = <0xdef8>;
91 intel,pirq-routing = <
92 PCI_BDF(0, 20, 0) INTA PIRQE
93 PCI_BDF(0, 20, 1) INTB PIRQF
94 PCI_BDF(0, 20, 2) INTC PIRQG
95 PCI_BDF(0, 20, 3) INTD PIRQH
96 PCI_BDF(0, 20, 4) INTA PIRQE
97 PCI_BDF(0, 20, 5) INTB PIRQF
98 PCI_BDF(0, 20, 6) INTC PIRQG
99 PCI_BDF(0, 20, 7) INTD PIRQH
100 PCI_BDF(0, 21, 0) INTA PIRQE
101 PCI_BDF(0, 21, 1) INTB PIRQF
102 PCI_BDF(0, 21, 2) INTC PIRQG
103 PCI_BDF(0, 23, 0) INTA PIRQA
104 PCI_BDF(0, 23, 1) INTB PIRQB
105
106 /* PCIe root ports downstream interrupts */
107 PCI_BDF(1, 0, 0) INTA PIRQA
108 PCI_BDF(1, 0, 0) INTB PIRQB
109 PCI_BDF(1, 0, 0) INTC PIRQC
110 PCI_BDF(1, 0, 0) INTD PIRQD
111 PCI_BDF(2, 0, 0) INTA PIRQB
112 PCI_BDF(2, 0, 0) INTB PIRQC
113 PCI_BDF(2, 0, 0) INTC PIRQD
114 PCI_BDF(2, 0, 0) INTD PIRQA
115 >;
116 };
117
118 spi {
119 #address-cells = <1>;
120 #size-cells = <0>;
121 compatible = "intel,ich-spi";
122 spi-flash@0 {
123 #size-cells = <1>;
124 #address-cells = <1>;
125 reg = <0>;
126 compatible = "winbond,w25q64",
127 "spi-flash";
128 memory-map = <0xff800000 0x00800000>;
129 rw-mrc-cache {
130 label = "rw-mrc-cache";
131 reg = <0x00010000 0x00010000>;
132 };
133 };
134 };
113 };
114 };
115
116 gpioa {
117 compatible = "intel,ich6-gpio";
118 u-boot,dm-pre-reloc;
119 reg = <0 0x20>;
120 bank-name = "A";
121 };
122
123 gpiob {
124 compatible = "intel,ich6-gpio";
125 u-boot,dm-pre-reloc;
126 reg = <0x20 0x20>;
127 bank-name = "B";
128 };
129
135 };
136 };
137
138 gpioa {
139 compatible = "intel,ich6-gpio";
140 u-boot,dm-pre-reloc;
141 reg = <0 0x20>;
142 bank-name = "A";
143 };
144
145 gpiob {
146 compatible = "intel,ich6-gpio";
147 u-boot,dm-pre-reloc;
148 reg = <0x20 0x20>;
149 bank-name = "B";
150 };
151
130 spi {
131 #address-cells = <1>;
132 #size-cells = <0>;
133 compatible = "intel,ich-spi";
134 spi-flash@0 {
135 #size-cells = <1>;
136 #address-cells = <1>;
137 reg = <0>;
138 compatible = "winbond,w25q64", "spi-flash";
139 memory-map = <0xff800000 0x00800000>;
140 rw-mrc-cache {
141 label = "rw-mrc-cache";
142 reg = <0x00010000 0x00010000>;
143 };
144 };
145 };
146
147};
152};