cpu.c (5df089564be6e6a6b1bc79207f74b5b7ed4e1277) cpu.c (08267487c99e8150382420936ab72c1e0ad74ce3)
1/*
2 * QEMU ARM CPU
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2

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50
51 return (cpu->power_state != PSCI_OFF)
52 && cs->interrupt_request &
53 (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD
54 | CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ
55 | CPU_INTERRUPT_EXITTB);
56}
57
1/*
2 * QEMU ARM CPU
3 *
4 * Copyright (c) 2012 SUSE LINUX Products GmbH
5 *
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * as published by the Free Software Foundation; either version 2

--- 41 unchanged lines hidden (view full) ---

50
51 return (cpu->power_state != PSCI_OFF)
52 && cs->interrupt_request &
53 (CPU_INTERRUPT_FIQ | CPU_INTERRUPT_HARD
54 | CPU_INTERRUPT_VFIQ | CPU_INTERRUPT_VIRQ
55 | CPU_INTERRUPT_EXITTB);
56}
57
58void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHook *hook,
58void arm_register_el_change_hook(ARMCPU *cpu, ARMELChangeHookFn *hook,
59 void *opaque)
60{
59 void *opaque)
60{
61 /* We currently only support registering a single hook function */
62 assert(!cpu->el_change_hook);
63 cpu->el_change_hook = hook;
64 cpu->el_change_hook_opaque = opaque;
61 ARMELChangeHook *entry = g_new0(ARMELChangeHook, 1);
62
63 entry->hook = hook;
64 entry->opaque = opaque;
65
66 QLIST_INSERT_HEAD(&cpu->el_change_hooks, entry, node);
65}
66
67static void cp_reg_reset(gpointer key, gpointer value, gpointer opaque)
68{
69 /* Reset a single ARMCPRegInfo register */
70 ARMCPRegInfo *ri = value;
71 ARMCPU *cpu = opaque;
72

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547{
548 CPUState *cs = CPU(obj);
549 ARMCPU *cpu = ARM_CPU(obj);
550
551 cs->env_ptr = &cpu->env;
552 cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal,
553 g_free, g_free);
554
67}
68
69static void cp_reg_reset(gpointer key, gpointer value, gpointer opaque)
70{
71 /* Reset a single ARMCPRegInfo register */
72 ARMCPRegInfo *ri = value;
73 ARMCPU *cpu = opaque;
74

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549{
550 CPUState *cs = CPU(obj);
551 ARMCPU *cpu = ARM_CPU(obj);
552
553 cs->env_ptr = &cpu->env;
554 cpu->cp_regs = g_hash_table_new_full(g_int_hash, g_int_equal,
555 g_free, g_free);
556
557 QLIST_INIT(&cpu->el_change_hooks);
558
555#ifndef CONFIG_USER_ONLY
556 /* Our inbound IRQ and FIQ lines */
557 if (kvm_enabled()) {
558 /* VIRQ and VFIQ are unused with KVM but we add them to maintain
559 * the same interface as non-KVM CPUs.
560 */
561 qdev_init_gpio_in(DEVICE(cpu), arm_cpu_kvm_set_irq, 4);
562 } else {

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708
709 qdev_property_add_static(DEVICE(obj), &arm_cpu_cfgend_property,
710 &error_abort);
711}
712
713static void arm_cpu_finalizefn(Object *obj)
714{
715 ARMCPU *cpu = ARM_CPU(obj);
559#ifndef CONFIG_USER_ONLY
560 /* Our inbound IRQ and FIQ lines */
561 if (kvm_enabled()) {
562 /* VIRQ and VFIQ are unused with KVM but we add them to maintain
563 * the same interface as non-KVM CPUs.
564 */
565 qdev_init_gpio_in(DEVICE(cpu), arm_cpu_kvm_set_irq, 4);
566 } else {

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712
713 qdev_property_add_static(DEVICE(obj), &arm_cpu_cfgend_property,
714 &error_abort);
715}
716
717static void arm_cpu_finalizefn(Object *obj)
718{
719 ARMCPU *cpu = ARM_CPU(obj);
720 ARMELChangeHook *hook, *next;
721
716 g_hash_table_destroy(cpu->cp_regs);
722 g_hash_table_destroy(cpu->cp_regs);
723
724 QLIST_FOREACH_SAFE(hook, &cpu->el_change_hooks, node, next) {
725 QLIST_REMOVE(hook, node);
726 g_free(hook);
727 }
717}
718
719static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
720{
721 CPUState *cs = CPU(dev);
722 ARMCPU *cpu = ARM_CPU(dev);
723 ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev);
724 CPUARMState *env = &cpu->env;

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729
730static void arm_cpu_realizefn(DeviceState *dev, Error **errp)
731{
732 CPUState *cs = CPU(dev);
733 ARMCPU *cpu = ARM_CPU(dev);
734 ARMCPUClass *acc = ARM_CPU_GET_CLASS(dev);
735 CPUARMState *env = &cpu->env;

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