aspeed_timer.c (d1f8764099022bc1173f2413331b26d4ff609a0c) aspeed_timer.c (cb8d4c8f54b8271f642f02382eec29d468bb1c77)
1/*
2 * ASPEED AST2400 Timer
3 *
4 * Andrew Jeffery <andrew@aj.id.au>
5 *
6 * Copyright (C) 2016 IBM Corp.
7 *
8 * This code is licensed under the GPL version 2 or later. See

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182 default:
183 qemu_log_mask(LOG_UNIMP, "%s: Programming error: unexpected reg: %d\n",
184 __func__, reg);
185 break;
186 }
187}
188
189/* Control register operations are broken out into helpers that can be
1/*
2 * ASPEED AST2400 Timer
3 *
4 * Andrew Jeffery <andrew@aj.id.au>
5 *
6 * Copyright (C) 2016 IBM Corp.
7 *
8 * This code is licensed under the GPL version 2 or later. See

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182 default:
183 qemu_log_mask(LOG_UNIMP, "%s: Programming error: unexpected reg: %d\n",
184 __func__, reg);
185 break;
186 }
187}
188
189/* Control register operations are broken out into helpers that can be
190 * explictly called on aspeed_timer_reset(), but also from
190 * explicitly called on aspeed_timer_reset(), but also from
191 * aspeed_timer_ctrl_op().
192 */
193
194static void aspeed_timer_ctrl_enable(AspeedTimer *t, bool enable)
195{
196 trace_aspeed_timer_ctrl_enable(t->id, enable);
197 if (enable) {
198 ptimer_run(t->timer, 0);

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375
376static void aspeed_timer_reset(DeviceState *dev)
377{
378 int i;
379 AspeedTimerCtrlState *s = ASPEED_TIMER(dev);
380
381 for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
382 AspeedTimer *t = &s->timers[i];
191 * aspeed_timer_ctrl_op().
192 */
193
194static void aspeed_timer_ctrl_enable(AspeedTimer *t, bool enable)
195{
196 trace_aspeed_timer_ctrl_enable(t->id, enable);
197 if (enable) {
198 ptimer_run(t->timer, 0);

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375
376static void aspeed_timer_reset(DeviceState *dev)
377{
378 int i;
379 AspeedTimerCtrlState *s = ASPEED_TIMER(dev);
380
381 for (i = 0; i < ASPEED_TIMER_NR_TIMERS; i++) {
382 AspeedTimer *t = &s->timers[i];
383 /* Explictly call helpers to avoid any conditional behaviour through
383 /* Explicitly call helpers to avoid any conditional behaviour through
384 * aspeed_timer_set_ctrl().
385 */
386 aspeed_timer_ctrl_enable(t, false);
387 aspeed_timer_ctrl_external_clock(t, TIMER_CLOCK_USE_APB);
388 aspeed_timer_ctrl_overflow_interrupt(t, false);
389 aspeed_timer_ctrl_pulse_enable(t, false);
390 t->level = 0;
391 t->reload = 0;

--- 58 unchanged lines hidden --- 		384 * aspeed_timer_set_ctrl().
385 */
386 aspeed_timer_ctrl_enable(t, false);
387 aspeed_timer_ctrl_external_clock(t, TIMER_CLOCK_USE_APB);
388 aspeed_timer_ctrl_overflow_interrupt(t, false);
389 aspeed_timer_ctrl_pulse_enable(t, false);
390 t->level = 0;
391 t->reload = 0;

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