| virt.c (e8c858944ea61923ca563bb5905bf04624d05f16) | virt.c (647a70a10f257bdeba33ff5f1bcb2b26518a9f4c) |
|---|---|
| 1/* 2 * QEMU RISC-V VirtIO Board 3 * 4 * Copyright (c) 2017 SiFive, Inc. 5 * 6 * RISC-V machine with 16550a UART and VirtIO MMIO 7 * 8 * This program is free software; you can redistribute it and/or modify it --- 366 unchanged lines hidden (view full) --- 375 sifive_clint_create(memmap[VIRT_CLINT].base, 376 memmap[VIRT_CLINT].size, smp_cpus, 377 SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE); 378 sifive_test_create(memmap[VIRT_TEST].base); 379 380 for (i = 0; i < VIRTIO_COUNT; i++) { 381 sysbus_create_simple("virtio-mmio", 382 memmap[VIRT_VIRTIO].base + i * memmap[VIRT_VIRTIO].size, | 1/* 2 * QEMU RISC-V VirtIO Board 3 * 4 * Copyright (c) 2017 SiFive, Inc. 5 * 6 * RISC-V machine with 16550a UART and VirtIO MMIO 7 * 8 * This program is free software; you can redistribute it and/or modify it --- 366 unchanged lines hidden (view full) --- 375 sifive_clint_create(memmap[VIRT_CLINT].base, 376 memmap[VIRT_CLINT].size, smp_cpus, 377 SIFIVE_SIP_BASE, SIFIVE_TIMECMP_BASE, SIFIVE_TIME_BASE); 378 sifive_test_create(memmap[VIRT_TEST].base); 379 380 for (i = 0; i < VIRTIO_COUNT; i++) { 381 sysbus_create_simple("virtio-mmio", 382 memmap[VIRT_VIRTIO].base + i * memmap[VIRT_VIRTIO].size, |
| 383 SIFIVE_PLIC(s->plic)->irqs[VIRTIO_IRQ + i]); | 383 qdev_get_gpio_in(DEVICE(s->plic), VIRTIO_IRQ + i)); |
| 384 } 385 386 serial_mm_init(system_memory, memmap[VIRT_UART0].base, | 384 } 385 386 serial_mm_init(system_memory, memmap[VIRT_UART0].base, |
| 387 0, SIFIVE_PLIC(s->plic)->irqs[UART0_IRQ], 399193, | 387 0, qdev_get_gpio_in(DEVICE(s->plic), UART0_IRQ), 399193, |
| 388 serial_hd(0), DEVICE_LITTLE_ENDIAN); 389} 390 391static void riscv_virt_board_machine_init(MachineClass *mc) 392{ 393 mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)"; 394 mc->init = riscv_virt_board_init; 395 mc->max_cpus = 8; /* hardcoded limit in BBL */ 396} 397 398DEFINE_MACHINE("virt", riscv_virt_board_machine_init) | 388 serial_hd(0), DEVICE_LITTLE_ENDIAN); 389} 390 391static void riscv_virt_board_machine_init(MachineClass *mc) 392{ 393 mc->desc = "RISC-V VirtIO Board (Privileged ISA v1.10)"; 394 mc->init = riscv_virt_board_init; 395 mc->max_cpus = 8; /* hardcoded limit in BBL */ 396} 397 398DEFINE_MACHINE("virt", riscv_virt_board_machine_init) |