virt.c (2ac031d171ccd18c973014d9978b4a63f0ad5fb0) virt.c (e883e9927ae667a2473c4a4ec666df53af1b34d9)
1/*
2 * QEMU RISC-V VirtIO Board
3 *
4 * Copyright (c) 2017 SiFive, Inc.
5 *
6 * RISC-V machine with 16550a UART and VirtIO MMIO
7 *
8 * This program is free software; you can redistribute it and/or modify it

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224
225 for (cpu = s->soc.num_harts - 1; cpu >= 0; cpu--) {
226 int cpu_phandle = phandle++;
227 int intc_phandle;
228 nodename = g_strdup_printf("/cpus/cpu@%d", cpu);
229 char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu);
230 char *isa = riscv_isa_string(&s->soc.harts[cpu]);
231 qemu_fdt_add_subnode(fdt, nodename);
1/*
2 * QEMU RISC-V VirtIO Board
3 *
4 * Copyright (c) 2017 SiFive, Inc.
5 *
6 * RISC-V machine with 16550a UART and VirtIO MMIO
7 *
8 * This program is free software; you can redistribute it and/or modify it

--- 215 unchanged lines hidden (view full) ---

224
225 for (cpu = s->soc.num_harts - 1; cpu >= 0; cpu--) {
226 int cpu_phandle = phandle++;
227 int intc_phandle;
228 nodename = g_strdup_printf("/cpus/cpu@%d", cpu);
229 char *intc = g_strdup_printf("/cpus/cpu@%d/interrupt-controller", cpu);
230 char *isa = riscv_isa_string(&s->soc.harts[cpu]);
231 qemu_fdt_add_subnode(fdt, nodename);
232#if defined(TARGET_RISCV32)
233 qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv32");
234#else
232 qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48");
235 qemu_fdt_setprop_string(fdt, nodename, "mmu-type", "riscv,sv48");
236#endif
233 qemu_fdt_setprop_string(fdt, nodename, "riscv,isa", isa);
234 qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv");
235 qemu_fdt_setprop_string(fdt, nodename, "status", "okay");
236 qemu_fdt_setprop_cell(fdt, nodename, "reg", cpu);
237 qemu_fdt_setprop_string(fdt, nodename, "device_type", "cpu");
238 qemu_fdt_setprop_cell(fdt, nodename, "phandle", cpu_phandle);
239 intc_phandle = phandle++;
240 qemu_fdt_add_subnode(fdt, intc);

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237 qemu_fdt_setprop_string(fdt, nodename, "riscv,isa", isa);
238 qemu_fdt_setprop_string(fdt, nodename, "compatible", "riscv");
239 qemu_fdt_setprop_string(fdt, nodename, "status", "okay");
240 qemu_fdt_setprop_cell(fdt, nodename, "reg", cpu);
241 qemu_fdt_setprop_string(fdt, nodename, "device_type", "cpu");
242 qemu_fdt_setprop_cell(fdt, nodename, "phandle", cpu_phandle);
243 intc_phandle = phandle++;
244 qemu_fdt_add_subnode(fdt, intc);

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