pcie.c (d96a0ac71c7a2332a00da1a496eae6bcb9948502) pcie.c (727b48661f757678f7f42f557ddac072c5a49721)
1/*
2 * pcie.c
3 *
4 * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by

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736
737 /* Make capability read-only by default */
738 memset(dev->wmask + offset, 0, size);
739 memset(dev->w1cmask + offset, 0, size);
740 /* Check capability by default */
741 memset(dev->cmask + offset, 0xFF, size);
742}
743
1/*
2 * pcie.c
3 *
4 * Copyright (c) 2010 Isaku Yamahata <yamahata at valinux co jp>
5 * VA Linux Systems Japan K.K.
6 *
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by

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736
737 /* Make capability read-only by default */
738 memset(dev->wmask + offset, 0, size);
739 memset(dev->w1cmask + offset, 0, size);
740 /* Check capability by default */
741 memset(dev->cmask + offset, 0xFF, size);
742}
743
744/*
745 * Sync the PCIe Link Status negotiated speed and width of a bridge with the
746 * downstream device. If downstream device is not present, re-write with the
747 * Link Capability fields. Limit width and speed to bridge capabilities for
748 * compatibility. Use config_read to access the downstream device since it
749 * could be an assigned device with volatile link information.
750 */
751void pcie_sync_bridge_lnk(PCIDevice *bridge_dev)
752{
753 PCIBridge *br = PCI_BRIDGE(bridge_dev);
754 PCIBus *bus = pci_bridge_get_sec_bus(br);
755 PCIDevice *target = bus->devices[0];
756 uint8_t *exp_cap = bridge_dev->config + bridge_dev->exp.exp_cap;
757 uint16_t lnksta, lnkcap = pci_get_word(exp_cap + PCI_EXP_LNKCAP);
758
759 if (!target || !target->exp.exp_cap) {
760 lnksta = lnkcap;
761 } else {
762 lnksta = target->config_read(target,
763 target->exp.exp_cap + PCI_EXP_LNKSTA,
764 sizeof(lnksta));
765
766 if ((lnksta & PCI_EXP_LNKSTA_NLW) > (lnkcap & PCI_EXP_LNKCAP_MLW)) {
767 lnksta &= ~PCI_EXP_LNKSTA_NLW;
768 lnksta |= lnkcap & PCI_EXP_LNKCAP_MLW;
769 }
770
771 if ((lnksta & PCI_EXP_LNKSTA_CLS) > (lnkcap & PCI_EXP_LNKCAP_SLS)) {
772 lnksta &= ~PCI_EXP_LNKSTA_CLS;
773 lnksta |= lnkcap & PCI_EXP_LNKCAP_SLS;
774 }
775 }
776
777 pci_word_test_and_clear_mask(exp_cap + PCI_EXP_LNKSTA,
778 PCI_EXP_LNKSTA_CLS | PCI_EXP_LNKSTA_NLW);
779 pci_word_test_and_set_mask(exp_cap + PCI_EXP_LNKSTA, lnksta &
780 (PCI_EXP_LNKSTA_CLS | PCI_EXP_LNKSTA_NLW));
781}
782
744/**************************************************************************
745 * pci express extended capability helper functions
746 */
747
748/* ARI */
749void pcie_ari_init(PCIDevice *dev, uint16_t offset, uint16_t nextfn)
750{
751 pcie_add_capability(dev, PCI_EXT_CAP_ID_ARI, PCI_ARI_VER,

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784 * pci express extended capability helper functions
785 */
786
787/* ARI */
788void pcie_ari_init(PCIDevice *dev, uint16_t offset, uint16_t nextfn)
789{
790 pcie_add_capability(dev, PCI_EXT_CAP_ID_ARI, PCI_ARI_VER,

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