fsl-imx6.c (9fc7fc4d3909817555ce0af6bcb69dff1606140d) fsl-imx6.c (db873cc5d1a4aaa67eea87768d504b2f89d88738)
1/*
2 * Copyright (c) 2015 Jean-Christophe Dubois <jcd@tribudubois.net>
3 *
4 * i.MX6 SOC emulation.
5 *
6 * Based on hw/arm/fsl-imx31.c
7 *
8 * This program is free software; you can redistribute it and/or modify it

--- 33 unchanged lines hidden (view full) ---

42 int i;
43
44 for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) {
45 snprintf(name, NAME_SIZE, "cpu%d", i);
46 object_initialize_child(obj, name, &s->cpu[i],
47 ARM_CPU_TYPE_NAME("cortex-a9"));
48 }
49
1/*
2 * Copyright (c) 2015 Jean-Christophe Dubois <jcd@tribudubois.net>
3 *
4 * i.MX6 SOC emulation.
5 *
6 * Based on hw/arm/fsl-imx31.c
7 *
8 * This program is free software; you can redistribute it and/or modify it

--- 33 unchanged lines hidden (view full) ---

42 int i;
43
44 for (i = 0; i < MIN(ms->smp.cpus, FSL_IMX6_NUM_CPUS); i++) {
45 snprintf(name, NAME_SIZE, "cpu%d", i);
46 object_initialize_child(obj, name, &s->cpu[i],
47 ARM_CPU_TYPE_NAME("cortex-a9"));
48 }
49
50 sysbus_init_child_obj(obj, "a9mpcore", &s->a9mpcore, sizeof(s->a9mpcore),
51 TYPE_A9MPCORE_PRIV);
50 object_initialize_child(obj, "a9mpcore", &s->a9mpcore, TYPE_A9MPCORE_PRIV);
52
51
53 sysbus_init_child_obj(obj, "ccm", &s->ccm, sizeof(s->ccm), TYPE_IMX6_CCM);
52 object_initialize_child(obj, "ccm", &s->ccm, TYPE_IMX6_CCM);
54
53
55 sysbus_init_child_obj(obj, "src", &s->src, sizeof(s->src), TYPE_IMX6_SRC);
54 object_initialize_child(obj, "src", &s->src, TYPE_IMX6_SRC);
56
57 for (i = 0; i < FSL_IMX6_NUM_UARTS; i++) {
58 snprintf(name, NAME_SIZE, "uart%d", i + 1);
55
56 for (i = 0; i < FSL_IMX6_NUM_UARTS; i++) {
57 snprintf(name, NAME_SIZE, "uart%d", i + 1);
59 sysbus_init_child_obj(obj, name, &s->uart[i], sizeof(s->uart[i]),
60 TYPE_IMX_SERIAL);
58 object_initialize_child(obj, name, &s->uart[i], TYPE_IMX_SERIAL);
61 }
62
59 }
60
63 sysbus_init_child_obj(obj, "gpt", &s->gpt, sizeof(s->gpt), TYPE_IMX6_GPT);
61 object_initialize_child(obj, "gpt", &s->gpt, TYPE_IMX6_GPT);
64
65 for (i = 0; i < FSL_IMX6_NUM_EPITS; i++) {
66 snprintf(name, NAME_SIZE, "epit%d", i + 1);
62
63 for (i = 0; i < FSL_IMX6_NUM_EPITS; i++) {
64 snprintf(name, NAME_SIZE, "epit%d", i + 1);
67 sysbus_init_child_obj(obj, name, &s->epit[i], sizeof(s->epit[i]),
68 TYPE_IMX_EPIT);
65 object_initialize_child(obj, name, &s->epit[i], TYPE_IMX_EPIT);
69 }
70
71 for (i = 0; i < FSL_IMX6_NUM_I2CS; i++) {
72 snprintf(name, NAME_SIZE, "i2c%d", i + 1);
66 }
67
68 for (i = 0; i < FSL_IMX6_NUM_I2CS; i++) {
69 snprintf(name, NAME_SIZE, "i2c%d", i + 1);
73 sysbus_init_child_obj(obj, name, &s->i2c[i], sizeof(s->i2c[i]),
74 TYPE_IMX_I2C);
70 object_initialize_child(obj, name, &s->i2c[i], TYPE_IMX_I2C);
75 }
76
77 for (i = 0; i < FSL_IMX6_NUM_GPIOS; i++) {
78 snprintf(name, NAME_SIZE, "gpio%d", i + 1);
71 }
72
73 for (i = 0; i < FSL_IMX6_NUM_GPIOS; i++) {
74 snprintf(name, NAME_SIZE, "gpio%d", i + 1);
79 sysbus_init_child_obj(obj, name, &s->gpio[i], sizeof(s->gpio[i]),
80 TYPE_IMX_GPIO);
75 object_initialize_child(obj, name, &s->gpio[i], TYPE_IMX_GPIO);
81 }
82
83 for (i = 0; i < FSL_IMX6_NUM_ESDHCS; i++) {
84 snprintf(name, NAME_SIZE, "sdhc%d", i + 1);
76 }
77
78 for (i = 0; i < FSL_IMX6_NUM_ESDHCS; i++) {
79 snprintf(name, NAME_SIZE, "sdhc%d", i + 1);
85 sysbus_init_child_obj(obj, name, &s->esdhc[i], sizeof(s->esdhc[i]),
86 TYPE_IMX_USDHC);
80 object_initialize_child(obj, name, &s->esdhc[i], TYPE_IMX_USDHC);
87 }
88
89 for (i = 0; i < FSL_IMX6_NUM_USB_PHYS; i++) {
90 snprintf(name, NAME_SIZE, "usbphy%d", i);
81 }
82
83 for (i = 0; i < FSL_IMX6_NUM_USB_PHYS; i++) {
84 snprintf(name, NAME_SIZE, "usbphy%d", i);
91 sysbus_init_child_obj(obj, name, &s->usbphy[i], sizeof(s->usbphy[i]),
92 TYPE_IMX_USBPHY);
85 object_initialize_child(obj, name, &s->usbphy[i], TYPE_IMX_USBPHY);
93 }
94 for (i = 0; i < FSL_IMX6_NUM_USBS; i++) {
95 snprintf(name, NAME_SIZE, "usb%d", i);
86 }
87 for (i = 0; i < FSL_IMX6_NUM_USBS; i++) {
88 snprintf(name, NAME_SIZE, "usb%d", i);
96 sysbus_init_child_obj(obj, name, &s->usb[i], sizeof(s->usb[i]),
97 TYPE_CHIPIDEA);
89 object_initialize_child(obj, name, &s->usb[i], TYPE_CHIPIDEA);
98 }
99
100 for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) {
101 snprintf(name, NAME_SIZE, "spi%d", i + 1);
90 }
91
92 for (i = 0; i < FSL_IMX6_NUM_ECSPIS; i++) {
93 snprintf(name, NAME_SIZE, "spi%d", i + 1);
102 sysbus_init_child_obj(obj, name, &s->spi[i], sizeof(s->spi[i]),
103 TYPE_IMX_SPI);
94 object_initialize_child(obj, name, &s->spi[i], TYPE_IMX_SPI);
104 }
105 for (i = 0; i < FSL_IMX6_NUM_WDTS; i++) {
106 snprintf(name, NAME_SIZE, "wdt%d", i);
95 }
96 for (i = 0; i < FSL_IMX6_NUM_WDTS; i++) {
97 snprintf(name, NAME_SIZE, "wdt%d", i);
107 sysbus_init_child_obj(obj, name, &s->wdt[i], sizeof(s->wdt[i]),
108 TYPE_IMX2_WDT);
98 object_initialize_child(obj, name, &s->wdt[i], TYPE_IMX2_WDT);
109 }
110
111
99 }
100
101
112 sysbus_init_child_obj(obj, "eth", &s->eth, sizeof(s->eth), TYPE_IMX_ENET);
102 object_initialize_child(obj, "eth", &s->eth, TYPE_IMX_ENET);
113}
114
115static void fsl_imx6_realize(DeviceState *dev, Error **errp)
116{
117 MachineState *ms = MACHINE(qdev_get_machine());
118 FslIMX6State *s = FSL_IMX6(dev);
119 uint16_t i;
120 Error *err = NULL;

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149
150 object_property_set_int(OBJECT(&s->a9mpcore), smp_cpus, "num-cpu",
151 &error_abort);
152
153 object_property_set_int(OBJECT(&s->a9mpcore),
154 FSL_IMX6_MAX_IRQ + GIC_INTERNAL, "num-irq",
155 &error_abort);
156
103}
104
105static void fsl_imx6_realize(DeviceState *dev, Error **errp)
106{
107 MachineState *ms = MACHINE(qdev_get_machine());
108 FslIMX6State *s = FSL_IMX6(dev);
109 uint16_t i;
110 Error *err = NULL;

--- 28 unchanged lines hidden (view full) ---

139
140 object_property_set_int(OBJECT(&s->a9mpcore), smp_cpus, "num-cpu",
141 &error_abort);
142
143 object_property_set_int(OBJECT(&s->a9mpcore),
144 FSL_IMX6_MAX_IRQ + GIC_INTERNAL, "num-irq",
145 &error_abort);
146
157 object_property_set_bool(OBJECT(&s->a9mpcore), true, "realized", &err);
147 sysbus_realize(SYS_BUS_DEVICE(&s->a9mpcore), &err);
158 if (err) {
159 error_propagate(errp, err);
160 return;
161 }
162 sysbus_mmio_map(SYS_BUS_DEVICE(&s->a9mpcore), 0, FSL_IMX6_A9MPCORE_ADDR);
163
164 for (i = 0; i < smp_cpus; i++) {
165 sysbus_connect_irq(SYS_BUS_DEVICE(&s->a9mpcore), i,
166 qdev_get_gpio_in(DEVICE(&s->cpu[i]), ARM_CPU_IRQ));
167 sysbus_connect_irq(SYS_BUS_DEVICE(&s->a9mpcore), i + smp_cpus,
168 qdev_get_gpio_in(DEVICE(&s->cpu[i]), ARM_CPU_FIQ));
169 }
170
148 if (err) {
149 error_propagate(errp, err);
150 return;
151 }
152 sysbus_mmio_map(SYS_BUS_DEVICE(&s->a9mpcore), 0, FSL_IMX6_A9MPCORE_ADDR);
153
154 for (i = 0; i < smp_cpus; i++) {
155 sysbus_connect_irq(SYS_BUS_DEVICE(&s->a9mpcore), i,
156 qdev_get_gpio_in(DEVICE(&s->cpu[i]), ARM_CPU_IRQ));
157 sysbus_connect_irq(SYS_BUS_DEVICE(&s->a9mpcore), i + smp_cpus,
158 qdev_get_gpio_in(DEVICE(&s->cpu[i]), ARM_CPU_FIQ));
159 }
160
171 object_property_set_bool(OBJECT(&s->ccm), true, "realized", &err);
161 sysbus_realize(SYS_BUS_DEVICE(&s->ccm), &err);
172 if (err) {
173 error_propagate(errp, err);
174 return;
175 }
176 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0, FSL_IMX6_CCM_ADDR);
177
162 if (err) {
163 error_propagate(errp, err);
164 return;
165 }
166 sysbus_mmio_map(SYS_BUS_DEVICE(&s->ccm), 0, FSL_IMX6_CCM_ADDR);
167
178 object_property_set_bool(OBJECT(&s->src), true, "realized", &err);
168 sysbus_realize(SYS_BUS_DEVICE(&s->src), &err);
179 if (err) {
180 error_propagate(errp, err);
181 return;
182 }
183 sysbus_mmio_map(SYS_BUS_DEVICE(&s->src), 0, FSL_IMX6_SRC_ADDR);
184
185 /* Initialize all UARTs */
186 for (i = 0; i < FSL_IMX6_NUM_UARTS; i++) {

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192 { FSL_IMX6_UART2_ADDR, FSL_IMX6_UART2_IRQ },
193 { FSL_IMX6_UART3_ADDR, FSL_IMX6_UART3_IRQ },
194 { FSL_IMX6_UART4_ADDR, FSL_IMX6_UART4_IRQ },
195 { FSL_IMX6_UART5_ADDR, FSL_IMX6_UART5_IRQ },
196 };
197
198 qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i));
199
169 if (err) {
170 error_propagate(errp, err);
171 return;
172 }
173 sysbus_mmio_map(SYS_BUS_DEVICE(&s->src), 0, FSL_IMX6_SRC_ADDR);
174
175 /* Initialize all UARTs */
176 for (i = 0; i < FSL_IMX6_NUM_UARTS; i++) {

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182 { FSL_IMX6_UART2_ADDR, FSL_IMX6_UART2_IRQ },
183 { FSL_IMX6_UART3_ADDR, FSL_IMX6_UART3_IRQ },
184 { FSL_IMX6_UART4_ADDR, FSL_IMX6_UART4_IRQ },
185 { FSL_IMX6_UART5_ADDR, FSL_IMX6_UART5_IRQ },
186 };
187
188 qdev_prop_set_chr(DEVICE(&s->uart[i]), "chardev", serial_hd(i));
189
200 object_property_set_bool(OBJECT(&s->uart[i]), true, "realized", &err);
190 sysbus_realize(SYS_BUS_DEVICE(&s->uart[i]), &err);
201 if (err) {
202 error_propagate(errp, err);
203 return;
204 }
205
206 sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, serial_table[i].addr);
207 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
208 qdev_get_gpio_in(DEVICE(&s->a9mpcore),
209 serial_table[i].irq));
210 }
211
212 s->gpt.ccm = IMX_CCM(&s->ccm);
213
191 if (err) {
192 error_propagate(errp, err);
193 return;
194 }
195
196 sysbus_mmio_map(SYS_BUS_DEVICE(&s->uart[i]), 0, serial_table[i].addr);
197 sysbus_connect_irq(SYS_BUS_DEVICE(&s->uart[i]), 0,
198 qdev_get_gpio_in(DEVICE(&s->a9mpcore),
199 serial_table[i].irq));
200 }
201
202 s->gpt.ccm = IMX_CCM(&s->ccm);
203
214 object_property_set_bool(OBJECT(&s->gpt), true, "realized", &err);
204 sysbus_realize(SYS_BUS_DEVICE(&s->gpt), &err);
215 if (err) {
216 error_propagate(errp, err);
217 return;
218 }
219
220 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt), 0, FSL_IMX6_GPT_ADDR);
221 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt), 0,
222 qdev_get_gpio_in(DEVICE(&s->a9mpcore),

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229 unsigned int irq;
230 } epit_table[FSL_IMX6_NUM_EPITS] = {
231 { FSL_IMX6_EPIT1_ADDR, FSL_IMX6_EPIT1_IRQ },
232 { FSL_IMX6_EPIT2_ADDR, FSL_IMX6_EPIT2_IRQ },
233 };
234
235 s->epit[i].ccm = IMX_CCM(&s->ccm);
236
205 if (err) {
206 error_propagate(errp, err);
207 return;
208 }
209
210 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpt), 0, FSL_IMX6_GPT_ADDR);
211 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpt), 0,
212 qdev_get_gpio_in(DEVICE(&s->a9mpcore),

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219 unsigned int irq;
220 } epit_table[FSL_IMX6_NUM_EPITS] = {
221 { FSL_IMX6_EPIT1_ADDR, FSL_IMX6_EPIT1_IRQ },
222 { FSL_IMX6_EPIT2_ADDR, FSL_IMX6_EPIT2_IRQ },
223 };
224
225 s->epit[i].ccm = IMX_CCM(&s->ccm);
226
237 object_property_set_bool(OBJECT(&s->epit[i]), true, "realized", &err);
227 sysbus_realize(SYS_BUS_DEVICE(&s->epit[i]), &err);
238 if (err) {
239 error_propagate(errp, err);
240 return;
241 }
242
243 sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0, epit_table[i].addr);
244 sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0,
245 qdev_get_gpio_in(DEVICE(&s->a9mpcore),

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252 hwaddr addr;
253 unsigned int irq;
254 } i2c_table[FSL_IMX6_NUM_I2CS] = {
255 { FSL_IMX6_I2C1_ADDR, FSL_IMX6_I2C1_IRQ },
256 { FSL_IMX6_I2C2_ADDR, FSL_IMX6_I2C2_IRQ },
257 { FSL_IMX6_I2C3_ADDR, FSL_IMX6_I2C3_IRQ }
258 };
259
228 if (err) {
229 error_propagate(errp, err);
230 return;
231 }
232
233 sysbus_mmio_map(SYS_BUS_DEVICE(&s->epit[i]), 0, epit_table[i].addr);
234 sysbus_connect_irq(SYS_BUS_DEVICE(&s->epit[i]), 0,
235 qdev_get_gpio_in(DEVICE(&s->a9mpcore),

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242 hwaddr addr;
243 unsigned int irq;
244 } i2c_table[FSL_IMX6_NUM_I2CS] = {
245 { FSL_IMX6_I2C1_ADDR, FSL_IMX6_I2C1_IRQ },
246 { FSL_IMX6_I2C2_ADDR, FSL_IMX6_I2C2_IRQ },
247 { FSL_IMX6_I2C3_ADDR, FSL_IMX6_I2C3_IRQ }
248 };
249
260 object_property_set_bool(OBJECT(&s->i2c[i]), true, "realized", &err);
250 sysbus_realize(SYS_BUS_DEVICE(&s->i2c[i]), &err);
261 if (err) {
262 error_propagate(errp, err);
263 return;
264 }
265
266 sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, i2c_table[i].addr);
267 sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
268 qdev_get_gpio_in(DEVICE(&s->a9mpcore),

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312 FSL_IMX6_GPIO7_HIGH_IRQ
313 },
314 };
315
316 object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-edge-sel",
317 &error_abort);
318 object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-upper-pin-irq",
319 &error_abort);
251 if (err) {
252 error_propagate(errp, err);
253 return;
254 }
255
256 sysbus_mmio_map(SYS_BUS_DEVICE(&s->i2c[i]), 0, i2c_table[i].addr);
257 sysbus_connect_irq(SYS_BUS_DEVICE(&s->i2c[i]), 0,
258 qdev_get_gpio_in(DEVICE(&s->a9mpcore),

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302 FSL_IMX6_GPIO7_HIGH_IRQ
303 },
304 };
305
306 object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-edge-sel",
307 &error_abort);
308 object_property_set_bool(OBJECT(&s->gpio[i]), true, "has-upper-pin-irq",
309 &error_abort);
320 object_property_set_bool(OBJECT(&s->gpio[i]), true, "realized", &err);
310 sysbus_realize(SYS_BUS_DEVICE(&s->gpio[i]), &err);
321 if (err) {
322 error_propagate(errp, err);
323 return;
324 }
325
326 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);
327 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
328 qdev_get_gpio_in(DEVICE(&s->a9mpcore),

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344 { FSL_IMX6_uSDHC4_ADDR, FSL_IMX6_uSDHC4_IRQ },
345 };
346
347 /* UHS-I SDIO3.0 SDR104 1.8V ADMA */
348 object_property_set_uint(OBJECT(&s->esdhc[i]), 3, "sd-spec-version",
349 &err);
350 object_property_set_uint(OBJECT(&s->esdhc[i]), IMX6_ESDHC_CAPABILITIES,
351 "capareg", &err);
311 if (err) {
312 error_propagate(errp, err);
313 return;
314 }
315
316 sysbus_mmio_map(SYS_BUS_DEVICE(&s->gpio[i]), 0, gpio_table[i].addr);
317 sysbus_connect_irq(SYS_BUS_DEVICE(&s->gpio[i]), 0,
318 qdev_get_gpio_in(DEVICE(&s->a9mpcore),

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334 { FSL_IMX6_uSDHC4_ADDR, FSL_IMX6_uSDHC4_IRQ },
335 };
336
337 /* UHS-I SDIO3.0 SDR104 1.8V ADMA */
338 object_property_set_uint(OBJECT(&s->esdhc[i]), 3, "sd-spec-version",
339 &err);
340 object_property_set_uint(OBJECT(&s->esdhc[i]), IMX6_ESDHC_CAPABILITIES,
341 "capareg", &err);
352 object_property_set_bool(OBJECT(&s->esdhc[i]), true, "realized", &err);
342 sysbus_realize(SYS_BUS_DEVICE(&s->esdhc[i]), &err);
353 if (err) {
354 error_propagate(errp, err);
355 return;
356 }
357 sysbus_mmio_map(SYS_BUS_DEVICE(&s->esdhc[i]), 0, esdhc_table[i].addr);
358 sysbus_connect_irq(SYS_BUS_DEVICE(&s->esdhc[i]), 0,
359 qdev_get_gpio_in(DEVICE(&s->a9mpcore),
360 esdhc_table[i].irq));
361 }
362
363 /* USB */
364 for (i = 0; i < FSL_IMX6_NUM_USB_PHYS; i++) {
343 if (err) {
344 error_propagate(errp, err);
345 return;
346 }
347 sysbus_mmio_map(SYS_BUS_DEVICE(&s->esdhc[i]), 0, esdhc_table[i].addr);
348 sysbus_connect_irq(SYS_BUS_DEVICE(&s->esdhc[i]), 0,
349 qdev_get_gpio_in(DEVICE(&s->a9mpcore),
350 esdhc_table[i].irq));
351 }
352
353 /* USB */
354 for (i = 0; i < FSL_IMX6_NUM_USB_PHYS; i++) {
365 object_property_set_bool(OBJECT(&s->usbphy[i]), true, "realized",
366 &error_abort);
355 sysbus_realize(SYS_BUS_DEVICE(&s->usbphy[i]), &error_abort);
367 sysbus_mmio_map(SYS_BUS_DEVICE(&s->usbphy[i]), 0,
368 FSL_IMX6_USBPHY1_ADDR + i * 0x1000);
369 }
370 for (i = 0; i < FSL_IMX6_NUM_USBS; i++) {
371 static const int FSL_IMX6_USBn_IRQ[] = {
372 FSL_IMX6_USB_OTG_IRQ,
373 FSL_IMX6_USB_HOST1_IRQ,
374 FSL_IMX6_USB_HOST2_IRQ,
375 FSL_IMX6_USB_HOST3_IRQ,
376 };
377
356 sysbus_mmio_map(SYS_BUS_DEVICE(&s->usbphy[i]), 0,
357 FSL_IMX6_USBPHY1_ADDR + i * 0x1000);
358 }
359 for (i = 0; i < FSL_IMX6_NUM_USBS; i++) {
360 static const int FSL_IMX6_USBn_IRQ[] = {
361 FSL_IMX6_USB_OTG_IRQ,
362 FSL_IMX6_USB_HOST1_IRQ,
363 FSL_IMX6_USB_HOST2_IRQ,
364 FSL_IMX6_USB_HOST3_IRQ,
365 };
366
378 object_property_set_bool(OBJECT(&s->usb[i]), true, "realized",
379 &error_abort);
367 sysbus_realize(SYS_BUS_DEVICE(&s->usb[i]), &error_abort);
380 sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0,
381 FSL_IMX6_USBOH3_USB_ADDR + i * 0x200);
382 sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
383 qdev_get_gpio_in(DEVICE(&s->a9mpcore),
384 FSL_IMX6_USBn_IRQ[i]));
385 }
386
387 /* Initialize all ECSPI */

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393 { FSL_IMX6_eCSPI1_ADDR, FSL_IMX6_ECSPI1_IRQ },
394 { FSL_IMX6_eCSPI2_ADDR, FSL_IMX6_ECSPI2_IRQ },
395 { FSL_IMX6_eCSPI3_ADDR, FSL_IMX6_ECSPI3_IRQ },
396 { FSL_IMX6_eCSPI4_ADDR, FSL_IMX6_ECSPI4_IRQ },
397 { FSL_IMX6_eCSPI5_ADDR, FSL_IMX6_ECSPI5_IRQ },
398 };
399
400 /* Initialize the SPI */
368 sysbus_mmio_map(SYS_BUS_DEVICE(&s->usb[i]), 0,
369 FSL_IMX6_USBOH3_USB_ADDR + i * 0x200);
370 sysbus_connect_irq(SYS_BUS_DEVICE(&s->usb[i]), 0,
371 qdev_get_gpio_in(DEVICE(&s->a9mpcore),
372 FSL_IMX6_USBn_IRQ[i]));
373 }
374
375 /* Initialize all ECSPI */

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381 { FSL_IMX6_eCSPI1_ADDR, FSL_IMX6_ECSPI1_IRQ },
382 { FSL_IMX6_eCSPI2_ADDR, FSL_IMX6_ECSPI2_IRQ },
383 { FSL_IMX6_eCSPI3_ADDR, FSL_IMX6_ECSPI3_IRQ },
384 { FSL_IMX6_eCSPI4_ADDR, FSL_IMX6_ECSPI4_IRQ },
385 { FSL_IMX6_eCSPI5_ADDR, FSL_IMX6_ECSPI5_IRQ },
386 };
387
388 /* Initialize the SPI */
401 object_property_set_bool(OBJECT(&s->spi[i]), true, "realized", &err);
389 sysbus_realize(SYS_BUS_DEVICE(&s->spi[i]), &err);
402 if (err) {
403 error_propagate(errp, err);
404 return;
405 }
406
407 sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_table[i].addr);
408 sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,
409 qdev_get_gpio_in(DEVICE(&s->a9mpcore),
410 spi_table[i].irq));
411 }
412
413 qdev_set_nic_properties(DEVICE(&s->eth), &nd_table[0]);
390 if (err) {
391 error_propagate(errp, err);
392 return;
393 }
394
395 sysbus_mmio_map(SYS_BUS_DEVICE(&s->spi[i]), 0, spi_table[i].addr);
396 sysbus_connect_irq(SYS_BUS_DEVICE(&s->spi[i]), 0,
397 qdev_get_gpio_in(DEVICE(&s->a9mpcore),
398 spi_table[i].irq));
399 }
400
401 qdev_set_nic_properties(DEVICE(&s->eth), &nd_table[0]);
414 object_property_set_bool(OBJECT(&s->eth), true, "realized", &err);
402 sysbus_realize(SYS_BUS_DEVICE(&s->eth), &err);
415 if (err) {
416 error_propagate(errp, err);
417 return;
418 }
419 sysbus_mmio_map(SYS_BUS_DEVICE(&s->eth), 0, FSL_IMX6_ENET_ADDR);
420 sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth), 0,
421 qdev_get_gpio_in(DEVICE(&s->a9mpcore),
422 FSL_IMX6_ENET_MAC_IRQ));

--- 11 unchanged lines hidden (view full) ---

434 };
435 static const int FSL_IMX6_WDOGn_IRQ[FSL_IMX6_NUM_WDTS] = {
436 FSL_IMX6_WDOG1_IRQ,
437 FSL_IMX6_WDOG2_IRQ,
438 };
439
440 object_property_set_bool(OBJECT(&s->wdt[i]), true, "pretimeout-support",
441 &error_abort);
403 if (err) {
404 error_propagate(errp, err);
405 return;
406 }
407 sysbus_mmio_map(SYS_BUS_DEVICE(&s->eth), 0, FSL_IMX6_ENET_ADDR);
408 sysbus_connect_irq(SYS_BUS_DEVICE(&s->eth), 0,
409 qdev_get_gpio_in(DEVICE(&s->a9mpcore),
410 FSL_IMX6_ENET_MAC_IRQ));

--- 11 unchanged lines hidden (view full) ---

422 };
423 static const int FSL_IMX6_WDOGn_IRQ[FSL_IMX6_NUM_WDTS] = {
424 FSL_IMX6_WDOG1_IRQ,
425 FSL_IMX6_WDOG2_IRQ,
426 };
427
428 object_property_set_bool(OBJECT(&s->wdt[i]), true, "pretimeout-support",
429 &error_abort);
442 object_property_set_bool(OBJECT(&s->wdt[i]), true, "realized",
443 &error_abort);
430 sysbus_realize(SYS_BUS_DEVICE(&s->wdt[i]), &error_abort);
444
445 sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX6_WDOGn_ADDR[i]);
446 sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[i]), 0,
447 qdev_get_gpio_in(DEVICE(&s->a9mpcore),
448 FSL_IMX6_WDOGn_IRQ[i]));
449 }
450
451 /* ROM memory */

--- 60 unchanged lines hidden --- 		431
432 sysbus_mmio_map(SYS_BUS_DEVICE(&s->wdt[i]), 0, FSL_IMX6_WDOGn_ADDR[i]);
433 sysbus_connect_irq(SYS_BUS_DEVICE(&s->wdt[i]), 0,
434 qdev_get_gpio_in(DEVICE(&s->a9mpcore),
435 FSL_IMX6_WDOGn_IRQ[i]));
436 }
437
438 /* ROM memory */

--- 60 unchanged lines hidden ---