piix4.c (c461f3e3820f2a033e7eed08689060328b31dcbf) piix4.c (7f558ea58bb60257b111abac0424dc601ff54875)
1/*
2 * ACPI implementation
3 *
4 * Copyright (c) 2006 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License version 2.1 as published by the Free Software Foundation.

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37#include "hw/acpi/cpu.h"
38#include "hw/hotplug.h"
39#include "hw/mem/pc-dimm.h"
40#include "hw/mem/nvdimm.h"
41#include "hw/acpi/memory_hotplug.h"
42#include "hw/acpi/acpi_dev_interface.h"
43#include "migration/vmstate.h"
44#include "hw/core/cpu.h"
1/*
2 * ACPI implementation
3 *
4 * Copyright (c) 2006 Fabrice Bellard
5 *
6 * This library is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU Lesser General Public
8 * License version 2.1 as published by the Free Software Foundation.

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37#include "hw/acpi/cpu.h"
38#include "hw/hotplug.h"
39#include "hw/mem/pc-dimm.h"
40#include "hw/mem/nvdimm.h"
41#include "hw/acpi/memory_hotplug.h"
42#include "hw/acpi/acpi_dev_interface.h"
43#include "migration/vmstate.h"
44#include "hw/core/cpu.h"
45#include "trace.h"
46#include "qom/object.h"
47
48#define GPE_BASE 0xafe0
49#define GPE_LEN 4
50
51#define ACPI_PCIHP_ADDR_PIIX4 0xae00
52
53struct pci_status {

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512 qdev_init_gpio_out_named(DEVICE(obj), &s->smi_irq, "smi-irq", 1);
513}
514
515static uint64_t gpe_readb(void *opaque, hwaddr addr, unsigned width)
516{
517 PIIX4PMState *s = opaque;
518 uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr);
519
45#include "qom/object.h"
46
47#define GPE_BASE 0xafe0
48#define GPE_LEN 4
49
50#define ACPI_PCIHP_ADDR_PIIX4 0xae00
51
52struct pci_status {

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511 qdev_init_gpio_out_named(DEVICE(obj), &s->smi_irq, "smi-irq", 1);
512}
513
514static uint64_t gpe_readb(void *opaque, hwaddr addr, unsigned width)
515{
516 PIIX4PMState *s = opaque;
517 uint32_t val = acpi_gpe_ioport_readb(&s->ar, addr);
518
520 trace_piix4_gpe_readb(addr, width, val);
521 return val;
522}
523
524static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
525 unsigned width)
526{
527 PIIX4PMState *s = opaque;
528
519 return val;
520}
521
522static void gpe_writeb(void *opaque, hwaddr addr, uint64_t val,
523 unsigned width)
524{
525 PIIX4PMState *s = opaque;
526
529 trace_piix4_gpe_writeb(addr, width, val);
530 acpi_gpe_ioport_writeb(&s->ar, addr, val);
531 acpi_update_sci(&s->ar, s->irq);
532}
533
534static const MemoryRegionOps piix4_gpe_ops = {
535 .read = gpe_readb,
536 .write = gpe_writeb,
537 .valid.min_access_size = 1,

--- 140 unchanged lines hidden --- 		527 acpi_gpe_ioport_writeb(&s->ar, addr, val);
528 acpi_update_sci(&s->ar, s->irq);
529}
530
531static const MemoryRegionOps piix4_gpe_ops = {
532 .read = gpe_readb,
533 .write = gpe_writeb,
534 .valid.min_access_size = 1,

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