turbostat.c (678a3bd1b3de6d2ebf604e7d708bc8150bb667e9) turbostat.c (812db3f77b9a3f6ed59baf7a0d5c3fd8ec8ef86a)
1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
5 * Copyright (c) 2013 Intel Corporation.
6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it

--- 38 unchanged lines hidden (view full) ---

47char *proc_stat = "/proc/stat";
48FILE *outf;
49int *fd_percpu;
50struct timespec interval_ts = {5, 0};
51unsigned int debug;
52unsigned int rapl_joules;
53unsigned int summary_only;
54unsigned int dump_only;
1/*
2 * turbostat -- show CPU frequency and C-state residency
3 * on modern Intel turbo-capable processors.
4 *
5 * Copyright (c) 2013 Intel Corporation.
6 * Len Brown <len.brown@intel.com>
7 *
8 * This program is free software; you can redistribute it and/or modify it

--- 38 unchanged lines hidden (view full) ---

47char *proc_stat = "/proc/stat";
48FILE *outf;
49int *fd_percpu;
50struct timespec interval_ts = {5, 0};
51unsigned int debug;
52unsigned int rapl_joules;
53unsigned int summary_only;
54unsigned int dump_only;
55unsigned int do_nhm_cstates;
56unsigned int do_snb_cstates;
57unsigned int do_knl_cstates;
58unsigned int do_pc2;
59unsigned int do_pc3;
60unsigned int do_pc6;
61unsigned int do_pc7;
62unsigned int do_c8_c9_c10;
63unsigned int do_skl_residency;
64unsigned int do_slm_cstates;
65unsigned int use_c1_residency_msr;
66unsigned int has_aperf;
67unsigned int has_epb;
68unsigned int do_irtl_snb;
69unsigned int do_irtl_hsw;
70unsigned int units = 1000000; /* MHz etc */
71unsigned int genuine_intel;
72unsigned int has_invariant_tsc;
73unsigned int do_nhm_platform_info;
74unsigned int aperf_mperf_multiplier = 1;
55unsigned int do_snb_cstates;
56unsigned int do_knl_cstates;
57unsigned int do_pc2;
58unsigned int do_pc3;
59unsigned int do_pc6;
60unsigned int do_pc7;
61unsigned int do_c8_c9_c10;
62unsigned int do_skl_residency;
63unsigned int do_slm_cstates;
64unsigned int use_c1_residency_msr;
65unsigned int has_aperf;
66unsigned int has_epb;
67unsigned int do_irtl_snb;
68unsigned int do_irtl_hsw;
69unsigned int units = 1000000; /* MHz etc */
70unsigned int genuine_intel;
71unsigned int has_invariant_tsc;
72unsigned int do_nhm_platform_info;
73unsigned int aperf_mperf_multiplier = 1;
75int do_irq = 1;
76int do_smi;
77double bclk;
78double base_hz;
79unsigned int has_base_hz;
80double tsc_tweak = 1.0;
74double bclk;
75double base_hz;
76unsigned int has_base_hz;
77double tsc_tweak = 1.0;
81unsigned int show_pkg;
82unsigned int show_core;
83unsigned int show_cpu;
84unsigned int show_pkg_only;
85unsigned int show_core_only;
86char *output_buffer, *outp;
87unsigned int do_rapl;
88unsigned int do_dts;
89unsigned int do_ptm;
78unsigned int show_pkg_only;
79unsigned int show_core_only;
80char *output_buffer, *outp;
81unsigned int do_rapl;
82unsigned int do_dts;
83unsigned int do_ptm;
90unsigned int do_gfx_rc6_ms;
91unsigned long long gfx_cur_rc6_ms;
84unsigned long long gfx_cur_rc6_ms;
92unsigned int do_gfx_mhz;
93unsigned int gfx_cur_mhz;
94unsigned int tcc_activation_temp;
95unsigned int tcc_activation_temp_override;
96double rapl_power_units, rapl_time_units;
97double rapl_dram_energy_units, rapl_energy_units;
98double rapl_joule_counter_range;
99unsigned int do_core_perf_limit_reasons;
100unsigned int do_gfx_perf_limit_reasons;

--- 120 unchanged lines hidden (view full) ---

221
222struct msr_counter {
223 unsigned int msr_num;
224 char name[NAME_BYTES];
225 unsigned int width;
226 enum counter_type type;
227 enum counter_format format;
228 struct msr_counter *next;
85unsigned int gfx_cur_mhz;
86unsigned int tcc_activation_temp;
87unsigned int tcc_activation_temp_override;
88double rapl_power_units, rapl_time_units;
89double rapl_dram_energy_units, rapl_energy_units;
90double rapl_joule_counter_range;
91unsigned int do_core_perf_limit_reasons;
92unsigned int do_gfx_perf_limit_reasons;

--- 120 unchanged lines hidden (view full) ---

213
214struct msr_counter {
215 unsigned int msr_num;
216 char name[NAME_BYTES];
217 unsigned int width;
218 enum counter_type type;
219 enum counter_format format;
220 struct msr_counter *next;
221 unsigned int flags;
222#define FLAGS_HIDE (1 << 0)
223#define FLAGS_SHOW (1 << 1)
229};
230
231struct sys_counters {
232 unsigned int added_thread_counters;
233 unsigned int added_core_counters;
234 unsigned int added_package_counters;
235 struct msr_counter *tp;
236 struct msr_counter *cp;

--- 99 unchanged lines hidden (view full) ---

336
337 if (retval != sizeof *msr)
338 err(-1, "msr %d offset 0x%llx read failed", cpu, (unsigned long long)offset);
339
340 return 0;
341}
342
343/*
224};
225
226struct sys_counters {
227 unsigned int added_thread_counters;
228 unsigned int added_core_counters;
229 unsigned int added_package_counters;
230 struct msr_counter *tp;
231 struct msr_counter *cp;

--- 99 unchanged lines hidden (view full) ---

331
332 if (retval != sizeof *msr)
333 err(-1, "msr %d offset 0x%llx read failed", cpu, (unsigned long long)offset);
334
335 return 0;
336}
337
338/*
344 * Example Format w/ field column widths:
345 *
346 * Package Core CPU Avg_MHz Bzy_MHz TSC_MHz IRQ SMI Busy% CPU_%c1 CPU_%c3 CPU_%c6 CPU_%c7 ThreadC CoreTmp CoreCnt PkgTmp GFXMHz Pkg%pc2 Pkg%pc3 Pkg%pc6 Pkg%pc7 PkgWatt CorWatt GFXWatt PkgCnt
347 * 12345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678123456781234567812345678
339 * Each string in this array is compared in --show and --hide cmdline.
340 * Thus, strings that are proper sub-sets must follow their more specific peers.
348 */
341 */
342struct msr_counter bic[] = {
343 { 0x0, "Package" },
344 { 0x0, "Avg_MHz" },
345 { 0x0, "Bzy_MHz" },
346 { 0x0, "TSC_MHz" },
347 { 0x0, "IRQ" },
348 { 0x0, "SMI", 32, 0, FORMAT_DELTA, NULL},
349 { 0x0, "Busy%" },
350 { 0x0, "CPU%c1" },
351 { 0x0, "CPU%c3" },
352 { 0x0, "CPU%c6" },
353 { 0x0, "CPU%c7" },
354 { 0x0, "ThreadC" },
355 { 0x0, "CoreTmp" },
356 { 0x0, "CoreCnt" },
357 { 0x0, "PkgTmp" },
358 { 0x0, "GFX%rc6" },
359 { 0x0, "GFXMHz" },
360 { 0x0, "Pkg%pc2" },
361 { 0x0, "Pkg%pc3" },
362 { 0x0, "Pkg%pc6" },
363 { 0x0, "Pkg%pc7" },
364 { 0x0, "PkgWatt" },
365 { 0x0, "CorWatt" },
366 { 0x0, "GFXWatt" },
367 { 0x0, "PkgCnt" },
368 { 0x0, "RAMWatt" },
369 { 0x0, "PKG_%" },
370 { 0x0, "RAM_%" },
371 { 0x0, "Pkg_J" },
372 { 0x0, "Cor_J" },
373 { 0x0, "GFX_J" },
374 { 0x0, "RAM_J" },
375 { 0x0, "Core" },
376 { 0x0, "CPU" },
377};
349
378
379#define MAX_BIC (sizeof(bic) / sizeof(struct msr_counter))
380#define BIC_Package (1ULL << 0)
381#define BIC_Avg_MHz (1ULL << 1)
382#define BIC_Bzy_MHz (1ULL << 2)
383#define BIC_TSC_MHz (1ULL << 3)
384#define BIC_IRQ (1ULL << 4)
385#define BIC_SMI (1ULL << 5)
386#define BIC_Busy (1ULL << 6)
387#define BIC_CPU_c1 (1ULL << 7)
388#define BIC_CPU_c3 (1ULL << 8)
389#define BIC_CPU_c6 (1ULL << 9)
390#define BIC_CPU_c7 (1ULL << 10)
391#define BIC_ThreadC (1ULL << 11)
392#define BIC_CoreTmp (1ULL << 12)
393#define BIC_CoreCnt (1ULL << 13)
394#define BIC_PkgTmp (1ULL << 14)
395#define BIC_GFX_rc6 (1ULL << 15)
396#define BIC_GFXMHz (1ULL << 16)
397#define BIC_Pkgpc2 (1ULL << 17)
398#define BIC_Pkgpc3 (1ULL << 18)
399#define BIC_Pkgpc6 (1ULL << 19)
400#define BIC_Pkgpc7 (1ULL << 20)
401#define BIC_PkgWatt (1ULL << 21)
402#define BIC_CorWatt (1ULL << 22)
403#define BIC_GFXWatt (1ULL << 23)
404#define BIC_PkgCnt (1ULL << 24)
405#define BIC_RAMWatt (1ULL << 27)
406#define BIC_PKG__ (1ULL << 28)
407#define BIC_RAM__ (1ULL << 29)
408#define BIC_Pkg_J (1ULL << 30)
409#define BIC_Cor_J (1ULL << 31)
410#define BIC_GFX_J (1ULL << 30)
411#define BIC_RAM_J (1ULL << 31)
412#define BIC_Core (1ULL << 32)
413#define BIC_CPU (1ULL << 33)
414
415unsigned long long bic_enabled = 0xFFFFFFFFFFFFFFFFULL;
416unsigned long long bic_present;
417
418#define DO_BIC(COUNTER_NAME) (bic_enabled & bic_present & COUNTER_NAME)
419#define BIC_PRESENT(COUNTER_BIT) (bic_present |= COUNTER_BIT)
420
421/*
422 * bic_lookup
423 * for all the strings in comma separate name_list,
424 * set the approprate bit in return value.
425 */
426unsigned long long bic_lookup(char *name_list)
427{
428 int i;
429 unsigned long long retval = 0;
430
431 while (name_list) {
432 char *comma;
433
434 comma = strchr(name_list, ',');
435
436 if (comma)
437 *comma = '\0';
438
439 for (i = 0; i < MAX_BIC; ++i) {
440 if (!strcmp(name_list, bic[i].name)) {
441 retval |= (1ULL << i);
442 break;
443 }
444 }
445 if (i == MAX_BIC) {
446 fprintf(stderr, "Invalid counter name: %s\n", name_list);
447 exit(-1);
448 }
449
450 name_list = comma;
451 if (name_list)
452 name_list++;
453
454 }
455 return retval;
456}
457
350void print_header(void)
351{
352 struct msr_counter *mp;
353
458void print_header(void)
459{
460 struct msr_counter *mp;
461
354 if (show_pkg)
462 if (DO_BIC(BIC_Package))
355 outp += sprintf(outp, "\tPackage");
463 outp += sprintf(outp, "\tPackage");
356 if (show_core)
464 if (DO_BIC(BIC_Core))
357 outp += sprintf(outp, "\tCore");
465 outp += sprintf(outp, "\tCore");
358 if (show_cpu)
466 if (DO_BIC(BIC_CPU))
359 outp += sprintf(outp, "\tCPU");
467 outp += sprintf(outp, "\tCPU");
360 if (has_aperf)
468 if (DO_BIC(BIC_Avg_MHz))
361 outp += sprintf(outp, "\tAvg_MHz");
469 outp += sprintf(outp, "\tAvg_MHz");
362 if (has_aperf)
470 if (DO_BIC(BIC_Busy))
363 outp += sprintf(outp, "\tBusy%%");
471 outp += sprintf(outp, "\tBusy%%");
364 if (has_aperf)
472 if (DO_BIC(BIC_Bzy_MHz))
365 outp += sprintf(outp, "\tBzy_MHz");
473 outp += sprintf(outp, "\tBzy_MHz");
366 outp += sprintf(outp, "\tTSC_MHz");
474 if (DO_BIC(BIC_TSC_MHz))
475 outp += sprintf(outp, "\tTSC_MHz");
367
368 if (!debug)
369 goto done;
370
476
477 if (!debug)
478 goto done;
479
371 if (do_irq)
480 if (DO_BIC(BIC_IRQ))
372 outp += sprintf(outp, "\tIRQ");
481 outp += sprintf(outp, "\tIRQ");
373 if (do_smi)
482 if (DO_BIC(BIC_SMI))
374 outp += sprintf(outp, "\tSMI");
375
483 outp += sprintf(outp, "\tSMI");
484
376 if (do_nhm_cstates)
485 if (DO_BIC(BIC_CPU_c1))
377 outp += sprintf(outp, "\tCPU%%c1");
378
379 for (mp = sys.tp; mp; mp = mp->next) {
380 if (mp->format == FORMAT_RAW) {
381 if (mp->width == 64)
382 outp += sprintf(outp, "\t%18.18s", mp->name);
383 else
384 outp += sprintf(outp, "\t%10.10s", mp->name);
385 } else {
386 outp += sprintf(outp, "\t%-7.7s", mp->name);
387 }
388 }
389
486 outp += sprintf(outp, "\tCPU%%c1");
487
488 for (mp = sys.tp; mp; mp = mp->next) {
489 if (mp->format == FORMAT_RAW) {
490 if (mp->width == 64)
491 outp += sprintf(outp, "\t%18.18s", mp->name);
492 else
493 outp += sprintf(outp, "\t%10.10s", mp->name);
494 } else {
495 outp += sprintf(outp, "\t%-7.7s", mp->name);
496 }
497 }
498
390 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
499 if (DO_BIC(BIC_CPU_c3) && !do_slm_cstates && !do_knl_cstates)
391 outp += sprintf(outp, "\tCPU%%c3");
500 outp += sprintf(outp, "\tCPU%%c3");
392 if (do_nhm_cstates)
501 if (DO_BIC(BIC_CPU_c6))
393 outp += sprintf(outp, "\tCPU%%c6");
502 outp += sprintf(outp, "\tCPU%%c6");
394 if (do_snb_cstates)
503 if (DO_BIC(BIC_CPU_c7))
395 outp += sprintf(outp, "\tCPU%%c7");
396
397
504 outp += sprintf(outp, "\tCPU%%c7");
505
506
398 if (do_dts)
507 if (DO_BIC(BIC_CoreTmp))
399 outp += sprintf(outp, "\tCoreTmp");
400
401 for (mp = sys.cp; mp; mp = mp->next) {
402 if (mp->format == FORMAT_RAW) {
403 if (mp->width == 64)
404 outp += sprintf(outp, "\t%18.18s", mp->name);
405 else
406 outp += sprintf(outp, "\t%10.10s", mp->name);
407 } else {
408 outp += sprintf(outp, "\t%-7.7s", mp->name);
409 }
410 }
411
508 outp += sprintf(outp, "\tCoreTmp");
509
510 for (mp = sys.cp; mp; mp = mp->next) {
511 if (mp->format == FORMAT_RAW) {
512 if (mp->width == 64)
513 outp += sprintf(outp, "\t%18.18s", mp->name);
514 else
515 outp += sprintf(outp, "\t%10.10s", mp->name);
516 } else {
517 outp += sprintf(outp, "\t%-7.7s", mp->name);
518 }
519 }
520
412 if (do_ptm)
521 if (DO_BIC(BIC_PkgTmp))
413 outp += sprintf(outp, "\tPkgTmp");
414
522 outp += sprintf(outp, "\tPkgTmp");
523
415 if (do_gfx_rc6_ms)
524 if (DO_BIC(BIC_GFX_rc6))
416 outp += sprintf(outp, "\tGFX%%rc6");
417
525 outp += sprintf(outp, "\tGFX%%rc6");
526
418 if (do_gfx_mhz)
527 if (DO_BIC(BIC_GFXMHz))
419 outp += sprintf(outp, "\tGFXMHz");
420
421 if (do_skl_residency) {
422 outp += sprintf(outp, "\tTotl%%C0");
423 outp += sprintf(outp, "\tAny%%C0");
424 outp += sprintf(outp, "\tGFX%%C0");
425 outp += sprintf(outp, "\tCPUGFX%%");
426 }

--- 8 unchanged lines hidden (view full) ---

435 outp += sprintf(outp, "\tPkg%%pc7");
436 if (do_c8_c9_c10) {
437 outp += sprintf(outp, "\tPkg%%pc8");
438 outp += sprintf(outp, "\tPkg%%pc9");
439 outp += sprintf(outp, "\tPk%%pc10");
440 }
441
442 if (do_rapl && !rapl_joules) {
528 outp += sprintf(outp, "\tGFXMHz");
529
530 if (do_skl_residency) {
531 outp += sprintf(outp, "\tTotl%%C0");
532 outp += sprintf(outp, "\tAny%%C0");
533 outp += sprintf(outp, "\tGFX%%C0");
534 outp += sprintf(outp, "\tCPUGFX%%");
535 }

--- 8 unchanged lines hidden (view full) ---

544 outp += sprintf(outp, "\tPkg%%pc7");
545 if (do_c8_c9_c10) {
546 outp += sprintf(outp, "\tPkg%%pc8");
547 outp += sprintf(outp, "\tPkg%%pc9");
548 outp += sprintf(outp, "\tPk%%pc10");
549 }
550
551 if (do_rapl && !rapl_joules) {
443 if (do_rapl & RAPL_PKG)
552 if (DO_BIC(BIC_PkgWatt))
444 outp += sprintf(outp, "\tPkgWatt");
553 outp += sprintf(outp, "\tPkgWatt");
445 if (do_rapl & RAPL_CORES_ENERGY_STATUS)
554 if (DO_BIC(BIC_CorWatt))
446 outp += sprintf(outp, "\tCorWatt");
555 outp += sprintf(outp, "\tCorWatt");
447 if (do_rapl & RAPL_GFX)
556 if (DO_BIC(BIC_GFXWatt))
448 outp += sprintf(outp, "\tGFXWatt");
557 outp += sprintf(outp, "\tGFXWatt");
449 if (do_rapl & RAPL_DRAM)
558 if (DO_BIC(BIC_RAMWatt))
450 outp += sprintf(outp, "\tRAMWatt");
559 outp += sprintf(outp, "\tRAMWatt");
451 if (do_rapl & RAPL_PKG_PERF_STATUS)
560 if (DO_BIC(BIC_PKG__))
452 outp += sprintf(outp, "\tPKG_%%");
561 outp += sprintf(outp, "\tPKG_%%");
453 if (do_rapl & RAPL_DRAM_PERF_STATUS)
562 if (DO_BIC(BIC_RAM__))
454 outp += sprintf(outp, "\tRAM_%%");
455 } else if (do_rapl && rapl_joules) {
563 outp += sprintf(outp, "\tRAM_%%");
564 } else if (do_rapl && rapl_joules) {
456 if (do_rapl & RAPL_PKG)
565 if (DO_BIC(BIC_Pkg_J))
457 outp += sprintf(outp, "\tPkg_J");
566 outp += sprintf(outp, "\tPkg_J");
458 if (do_rapl & RAPL_CORES_ENERGY_STATUS)
567 if (DO_BIC(BIC_Cor_J))
459 outp += sprintf(outp, "\tCor_J");
568 outp += sprintf(outp, "\tCor_J");
460 if (do_rapl & RAPL_GFX)
569 if (DO_BIC(BIC_GFX_J))
461 outp += sprintf(outp, "\tGFX_J");
570 outp += sprintf(outp, "\tGFX_J");
462 if (do_rapl & RAPL_DRAM)
571 if (DO_BIC(BIC_RAM_J))
463 outp += sprintf(outp, "\tRAM_J");
572 outp += sprintf(outp, "\tRAM_J");
464 if (do_rapl & RAPL_PKG_PERF_STATUS)
573 if (DO_BIC(BIC_PKG__))
465 outp += sprintf(outp, "\tPKG_%%");
574 outp += sprintf(outp, "\tPKG_%%");
466 if (do_rapl & RAPL_DRAM_PERF_STATUS)
575 if (DO_BIC(BIC_RAM__))
467 outp += sprintf(outp, "\tRAM_%%");
468 }
469 for (mp = sys.pp; mp; mp = mp->next) {
470 if (mp->format == FORMAT_RAW) {
471 if (mp->width == 64)
472 outp += sprintf(outp, "\t%18.18s", mp->name);
473 else
474 outp += sprintf(outp, "\t%10.10s", mp->name);

--- 17 unchanged lines hidden (view full) ---

492 if (t) {
493 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
494 t->cpu_id, t->flags);
495 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
496 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
497 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
498 outp += sprintf(outp, "c1: %016llX\n", t->c1);
499
576 outp += sprintf(outp, "\tRAM_%%");
577 }
578 for (mp = sys.pp; mp; mp = mp->next) {
579 if (mp->format == FORMAT_RAW) {
580 if (mp->width == 64)
581 outp += sprintf(outp, "\t%18.18s", mp->name);
582 else
583 outp += sprintf(outp, "\t%10.10s", mp->name);

--- 17 unchanged lines hidden (view full) ---

601 if (t) {
602 outp += sprintf(outp, "CPU: %d flags 0x%x\n",
603 t->cpu_id, t->flags);
604 outp += sprintf(outp, "TSC: %016llX\n", t->tsc);
605 outp += sprintf(outp, "aperf: %016llX\n", t->aperf);
606 outp += sprintf(outp, "mperf: %016llX\n", t->mperf);
607 outp += sprintf(outp, "c1: %016llX\n", t->c1);
608
500 if (do_irq)
609 if (DO_BIC(BIC_IRQ))
501 outp += sprintf(outp, "IRQ: %08X\n", t->irq_count);
610 outp += sprintf(outp, "IRQ: %08X\n", t->irq_count);
502 if (do_smi)
611 if (DO_BIC(BIC_SMI))
503 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
504
505 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
506 outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
507 i, mp->msr_num, t->counter[i]);
508 }
509 }
510

--- 67 unchanged lines hidden (view full) ---

578 /* if showing only 1st thread in pkg and this isn't one, bail out */
579 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
580 return 0;
581
582 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
583
584 /* topo columns, print blanks on 1st (average) line */
585 if (t == &average.threads) {
612 outp += sprintf(outp, "SMI: %08X\n", t->smi_count);
613
614 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
615 outp += sprintf(outp, "tADDED [%d] msr0x%x: %08llX\n",
616 i, mp->msr_num, t->counter[i]);
617 }
618 }
619

--- 67 unchanged lines hidden (view full) ---

687 /* if showing only 1st thread in pkg and this isn't one, bail out */
688 if (show_pkg_only && !(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
689 return 0;
690
691 interval_float = tv_delta.tv_sec + tv_delta.tv_usec/1000000.0;
692
693 /* topo columns, print blanks on 1st (average) line */
694 if (t == &average.threads) {
586 if (show_pkg)
695 if (DO_BIC(BIC_Package))
587 outp += sprintf(outp, "\t-");
696 outp += sprintf(outp, "\t-");
588 if (show_core)
697 if (DO_BIC(BIC_Core))
589 outp += sprintf(outp, "\t-");
698 outp += sprintf(outp, "\t-");
590 if (show_cpu)
699 if (DO_BIC(BIC_CPU))
591 outp += sprintf(outp, "\t-");
592 } else {
700 outp += sprintf(outp, "\t-");
701 } else {
593 if (show_pkg) {
702 if (DO_BIC(BIC_Package)) {
594 if (p)
595 outp += sprintf(outp, "\t%d", p->package_id);
596 else
597 outp += sprintf(outp, "\t-");
598 }
703 if (p)
704 outp += sprintf(outp, "\t%d", p->package_id);
705 else
706 outp += sprintf(outp, "\t-");
707 }
599 if (show_core) {
708 if (DO_BIC(BIC_Core)) {
600 if (c)
601 outp += sprintf(outp, "\t%d", c->core_id);
602 else
603 outp += sprintf(outp, "\t-");
604 }
709 if (c)
710 outp += sprintf(outp, "\t%d", c->core_id);
711 else
712 outp += sprintf(outp, "\t-");
713 }
605 if (show_cpu)
714 if (DO_BIC(BIC_CPU))
606 outp += sprintf(outp, "\t%d", t->cpu_id);
607 }
608
715 outp += sprintf(outp, "\t%d", t->cpu_id);
716 }
717
609 /* Avg_MHz */
610 if (has_aperf)
718 if (DO_BIC(BIC_Avg_MHz))
611 outp += sprintf(outp, "\t%.0f",
612 1.0 / units * t->aperf / interval_float);
613
719 outp += sprintf(outp, "\t%.0f",
720 1.0 / units * t->aperf / interval_float);
721
614 /* Busy% */
615 if (has_aperf)
722 if (DO_BIC(BIC_Busy))
616 outp += sprintf(outp, "\t%.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
617
723 outp += sprintf(outp, "\t%.2f", 100.0 * t->mperf/t->tsc/tsc_tweak);
724
618 /* Bzy_MHz */
619 if (has_aperf) {
725 if (DO_BIC(BIC_Bzy_MHz)) {
620 if (has_base_hz)
621 outp += sprintf(outp, "\t%.0f", base_hz / units * t->aperf / t->mperf);
622 else
623 outp += sprintf(outp, "\t%.0f",
624 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
625 }
626
726 if (has_base_hz)
727 outp += sprintf(outp, "\t%.0f", base_hz / units * t->aperf / t->mperf);
728 else
729 outp += sprintf(outp, "\t%.0f",
730 1.0 * t->tsc / units * t->aperf / t->mperf / interval_float);
731 }
732
627 /* TSC_MHz */
628 outp += sprintf(outp, "\t%.0f", 1.0 * t->tsc/units/interval_float);
733 if (DO_BIC(BIC_TSC_MHz))
734 outp += sprintf(outp, "\t%.0f", 1.0 * t->tsc/units/interval_float);
629
630 if (!debug)
631 goto done;
632
633 /* IRQ */
735
736 if (!debug)
737 goto done;
738
739 /* IRQ */
634 if (do_irq)
740 if (DO_BIC(BIC_IRQ))
635 outp += sprintf(outp, "\t%d", t->irq_count);
636
637 /* SMI */
741 outp += sprintf(outp, "\t%d", t->irq_count);
742
743 /* SMI */
638 if (do_smi)
744 if (DO_BIC(BIC_SMI))
639 outp += sprintf(outp, "\t%d", t->smi_count);
640
641 /* C1 */
745 outp += sprintf(outp, "\t%d", t->smi_count);
746
747 /* C1 */
642 if (do_nhm_cstates)
748 if (DO_BIC(BIC_CPU_c1))
643 outp += sprintf(outp, "\t%.2f", 100.0 * t->c1/t->tsc);
644
645 /* Added counters */
646 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
647 if (mp->format == FORMAT_RAW) {
648 if (mp->width == 32)
649 outp += sprintf(outp, "\t0x%08lx", (unsigned long) t->counter[i]);
650 else

--- 4 unchanged lines hidden (view full) ---

655 outp += sprintf(outp, "\t%.2f", 100.0 * t->counter[i]/t->tsc);
656 }
657 }
658
659 /* print per-core data only for 1st thread in core */
660 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
661 goto done;
662
749 outp += sprintf(outp, "\t%.2f", 100.0 * t->c1/t->tsc);
750
751 /* Added counters */
752 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
753 if (mp->format == FORMAT_RAW) {
754 if (mp->width == 32)
755 outp += sprintf(outp, "\t0x%08lx", (unsigned long) t->counter[i]);
756 else

--- 4 unchanged lines hidden (view full) ---

761 outp += sprintf(outp, "\t%.2f", 100.0 * t->counter[i]/t->tsc);
762 }
763 }
764
765 /* print per-core data only for 1st thread in core */
766 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
767 goto done;
768
663 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates)
769 if (DO_BIC(BIC_CPU_c3) && !do_slm_cstates && !do_knl_cstates)
664 outp += sprintf(outp, "\t%.2f", 100.0 * c->c3/t->tsc);
770 outp += sprintf(outp, "\t%.2f", 100.0 * c->c3/t->tsc);
665 if (do_nhm_cstates)
771 if (DO_BIC(BIC_CPU_c6))
666 outp += sprintf(outp, "\t%.2f", 100.0 * c->c6/t->tsc);
772 outp += sprintf(outp, "\t%.2f", 100.0 * c->c6/t->tsc);
667 if (do_snb_cstates)
773 if (DO_BIC(BIC_CPU_c7))
668 outp += sprintf(outp, "\t%.2f", 100.0 * c->c7/t->tsc);
669
774 outp += sprintf(outp, "\t%.2f", 100.0 * c->c7/t->tsc);
775
670
671 if (do_dts)
776 if (DO_BIC(BIC_CoreTmp))
672 outp += sprintf(outp, "\t%d", c->core_temp_c);
673
674 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
675 if (mp->format == FORMAT_RAW) {
676 if (mp->width == 32)
677 outp += sprintf(outp, "\t0x%08lx", (unsigned long) c->counter[i]);
678 else
679 outp += sprintf(outp, "\t0x%016llx", c->counter[i]);

--- 4 unchanged lines hidden (view full) ---

684 }
685 }
686
687 /* print per-package data only for 1st core in package */
688 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
689 goto done;
690
691 /* PkgTmp */
777 outp += sprintf(outp, "\t%d", c->core_temp_c);
778
779 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
780 if (mp->format == FORMAT_RAW) {
781 if (mp->width == 32)
782 outp += sprintf(outp, "\t0x%08lx", (unsigned long) c->counter[i]);
783 else
784 outp += sprintf(outp, "\t0x%016llx", c->counter[i]);

--- 4 unchanged lines hidden (view full) ---

789 }
790 }
791
792 /* print per-package data only for 1st core in package */
793 if (!(t->flags & CPU_IS_FIRST_CORE_IN_PACKAGE))
794 goto done;
795
796 /* PkgTmp */
692 if (do_ptm)
797 if (DO_BIC(BIC_PkgTmp))
693 outp += sprintf(outp, "\t%d", p->pkg_temp_c);
694
695 /* GFXrc6 */
798 outp += sprintf(outp, "\t%d", p->pkg_temp_c);
799
800 /* GFXrc6 */
696 if (do_gfx_rc6_ms) {
801 if (DO_BIC(BIC_GFX_rc6)) {
697 if (p->gfx_rc6_ms == -1) { /* detect GFX counter reset */
698 outp += sprintf(outp, "\t**.**");
699 } else {
700 outp += sprintf(outp, "\t%.2f",
701 p->gfx_rc6_ms / 10.0 / interval_float);
702 }
703 }
704
705 /* GFXMHz */
802 if (p->gfx_rc6_ms == -1) { /* detect GFX counter reset */
803 outp += sprintf(outp, "\t**.**");
804 } else {
805 outp += sprintf(outp, "\t%.2f",
806 p->gfx_rc6_ms / 10.0 / interval_float);
807 }
808 }
809
810 /* GFXMHz */
706 if (do_gfx_mhz)
811 if (DO_BIC(BIC_GFXMHz))
707 outp += sprintf(outp, "\t%d", p->gfx_mhz);
708
709 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
710 if (do_skl_residency) {
711 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
712 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
713 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
714 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);

--- 17 unchanged lines hidden (view full) ---

732 * If measurement interval exceeds minimum RAPL Joule Counter range,
733 * indicate that results are suspect by printing "**" in fraction place.
734 */
735 if (interval_float < rapl_joule_counter_range)
736 fmt8 = "\t%.2f";
737 else
738 fmt8 = "%6.0f**";
739
812 outp += sprintf(outp, "\t%d", p->gfx_mhz);
813
814 /* Totl%C0, Any%C0 GFX%C0 CPUGFX% */
815 if (do_skl_residency) {
816 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_wtd_core_c0/t->tsc);
817 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_any_core_c0/t->tsc);
818 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_any_gfxe_c0/t->tsc);
819 outp += sprintf(outp, "\t%.2f", 100.0 * p->pkg_both_core_gfxe_c0/t->tsc);

--- 17 unchanged lines hidden (view full) ---

837 * If measurement interval exceeds minimum RAPL Joule Counter range,
838 * indicate that results are suspect by printing "**" in fraction place.
839 */
840 if (interval_float < rapl_joule_counter_range)
841 fmt8 = "\t%.2f";
842 else
843 fmt8 = "%6.0f**";
844
740 if (do_rapl && !rapl_joules) {
741 if (do_rapl & RAPL_PKG)
742 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
743 if (do_rapl & RAPL_CORES_ENERGY_STATUS)
744 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
745 if (do_rapl & RAPL_GFX)
746 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
747 if (do_rapl & RAPL_DRAM)
748 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
749 if (do_rapl & RAPL_PKG_PERF_STATUS)
750 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
751 if (do_rapl & RAPL_DRAM_PERF_STATUS)
752 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
753 } else if (do_rapl && rapl_joules) {
754 if (do_rapl & RAPL_PKG)
755 outp += sprintf(outp, fmt8,
756 p->energy_pkg * rapl_energy_units);
757 if (do_rapl & RAPL_CORES)
758 outp += sprintf(outp, fmt8,
759 p->energy_cores * rapl_energy_units);
760 if (do_rapl & RAPL_GFX)
761 outp += sprintf(outp, fmt8,
762 p->energy_gfx * rapl_energy_units);
763 if (do_rapl & RAPL_DRAM)
764 outp += sprintf(outp, fmt8,
765 p->energy_dram * rapl_dram_energy_units);
766 if (do_rapl & RAPL_PKG_PERF_STATUS)
767 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
768 if (do_rapl & RAPL_DRAM_PERF_STATUS)
769 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
770 }
845 if (DO_BIC(BIC_PkgWatt))
846 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units / interval_float);
847 if (DO_BIC(BIC_CorWatt))
848 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units / interval_float);
849 if (DO_BIC(BIC_GFXWatt))
850 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units / interval_float);
851 if (DO_BIC(BIC_RAMWatt))
852 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units / interval_float);
853 if (DO_BIC(BIC_Pkg_J))
854 outp += sprintf(outp, fmt8, p->energy_pkg * rapl_energy_units);
855 if (DO_BIC(BIC_Cor_J))
856 outp += sprintf(outp, fmt8, p->energy_cores * rapl_energy_units);
857 if (DO_BIC(BIC_GFX_J))
858 outp += sprintf(outp, fmt8, p->energy_gfx * rapl_energy_units);
859 if (DO_BIC(BIC_RAM_J))
860 outp += sprintf(outp, fmt8, p->energy_dram * rapl_dram_energy_units);
861 if (DO_BIC(BIC_PKG__))
862 outp += sprintf(outp, fmt8, 100.0 * p->rapl_pkg_perf_status * rapl_time_units / interval_float);
863 if (DO_BIC(BIC_RAM__))
864 outp += sprintf(outp, fmt8, 100.0 * p->rapl_dram_perf_status * rapl_time_units / interval_float);
865
771 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
772 if (mp->format == FORMAT_RAW) {
773 if (mp->width == 32)
774 outp += sprintf(outp, "\t0x%08lx", (unsigned long) p->counter[i]);
775 else
776 outp += sprintf(outp, "\t0x%016llx", p->counter[i]);
777 } else if (mp->format == FORMAT_DELTA) {
778 outp += sprintf(outp, "\t%lld", p->counter[i]);

--- 137 unchanged lines hidden (view full) ---

916 /* check for TSC < 1 Mcycles over interval */
917 if (old->tsc < (1000 * 1000))
918 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
919 "You can disable all c-states by booting with \"idle=poll\"\n"
920 "or just the deep ones with \"processor.max_cstate=1\"");
921
922 old->c1 = new->c1 - old->c1;
923
866 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
867 if (mp->format == FORMAT_RAW) {
868 if (mp->width == 32)
869 outp += sprintf(outp, "\t0x%08lx", (unsigned long) p->counter[i]);
870 else
871 outp += sprintf(outp, "\t0x%016llx", p->counter[i]);
872 } else if (mp->format == FORMAT_DELTA) {
873 outp += sprintf(outp, "\t%lld", p->counter[i]);

--- 137 unchanged lines hidden (view full) ---

1011 /* check for TSC < 1 Mcycles over interval */
1012 if (old->tsc < (1000 * 1000))
1013 errx(-3, "Insanely slow TSC rate, TSC stops in idle?\n"
1014 "You can disable all c-states by booting with \"idle=poll\"\n"
1015 "or just the deep ones with \"processor.max_cstate=1\"");
1016
1017 old->c1 = new->c1 - old->c1;
1018
924 if (has_aperf) {
1019 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
925 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
926 old->aperf = new->aperf - old->aperf;
927 old->mperf = new->mperf - old->mperf;
928 } else {
929 return -1;
930 }
931 }
932

--- 19 unchanged lines hidden (view full) ---

952 }
953
954 if (old->mperf == 0) {
955 if (debug > 1)
956 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
957 old->mperf = 1; /* divide by 0 protection */
958 }
959
1020 if ((new->aperf > old->aperf) && (new->mperf > old->mperf)) {
1021 old->aperf = new->aperf - old->aperf;
1022 old->mperf = new->mperf - old->mperf;
1023 } else {
1024 return -1;
1025 }
1026 }
1027

--- 19 unchanged lines hidden (view full) ---

1047 }
1048
1049 if (old->mperf == 0) {
1050 if (debug > 1)
1051 fprintf(outf, "cpu%d MPERF 0!\n", old->cpu_id);
1052 old->mperf = 1; /* divide by 0 protection */
1053 }
1054
960 if (do_irq)
1055 if (DO_BIC(BIC_IRQ))
961 old->irq_count = new->irq_count - old->irq_count;
962
1056 old->irq_count = new->irq_count - old->irq_count;
1057
963 if (do_smi)
1058 if (DO_BIC(BIC_SMI))
964 old->smi_count = new->smi_count - old->smi_count;
965
966 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
967 if (mp->format == FORMAT_RAW)
968 old->counter[i] = new->counter[i];
969 else
970 old->counter[i] = new->counter[i] - old->counter[i];
971 }

--- 240 unchanged lines hidden (view full) ---

1212 if (cpu_migrate(cpu)) {
1213 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
1214 return -1;
1215 }
1216
1217retry:
1218 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1219
1059 old->smi_count = new->smi_count - old->smi_count;
1060
1061 for (i = 0, mp = sys.tp; mp; i++, mp = mp->next) {
1062 if (mp->format == FORMAT_RAW)
1063 old->counter[i] = new->counter[i];
1064 else
1065 old->counter[i] = new->counter[i] - old->counter[i];
1066 }

--- 240 unchanged lines hidden (view full) ---

1307 if (cpu_migrate(cpu)) {
1308 fprintf(outf, "Could not migrate to CPU %d\n", cpu);
1309 return -1;
1310 }
1311
1312retry:
1313 t->tsc = rdtsc(); /* we are running on local CPU of interest */
1314
1220 if (has_aperf) {
1315 if (DO_BIC(BIC_Avg_MHz) || DO_BIC(BIC_Busy) || DO_BIC(BIC_Bzy_MHz)) {
1221 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1222
1223 /*
1224 * The TSC, APERF and MPERF must be read together for
1225 * APERF/MPERF and MPERF/TSC to give accurate results.
1226 *
1227 * Unfortunately, APERF and MPERF are read by
1228 * individual system call, so delays may occur

--- 39 unchanged lines hidden (view full) ---

1268 cpu, aperf_time, mperf_time);
1269 }
1270 aperf_mperf_retry_count = 0;
1271
1272 t->aperf = t->aperf * aperf_mperf_multiplier;
1273 t->mperf = t->mperf * aperf_mperf_multiplier;
1274 }
1275
1316 unsigned long long tsc_before, tsc_between, tsc_after, aperf_time, mperf_time;
1317
1318 /*
1319 * The TSC, APERF and MPERF must be read together for
1320 * APERF/MPERF and MPERF/TSC to give accurate results.
1321 *
1322 * Unfortunately, APERF and MPERF are read by
1323 * individual system call, so delays may occur

--- 39 unchanged lines hidden (view full) ---

1363 cpu, aperf_time, mperf_time);
1364 }
1365 aperf_mperf_retry_count = 0;
1366
1367 t->aperf = t->aperf * aperf_mperf_multiplier;
1368 t->mperf = t->mperf * aperf_mperf_multiplier;
1369 }
1370
1276 if (do_irq)
1371 if (DO_BIC(BIC_IRQ))
1277 t->irq_count = irqs_per_cpu[cpu];
1372 t->irq_count = irqs_per_cpu[cpu];
1278 if (do_smi) {
1373 if (DO_BIC(BIC_SMI)) {
1279 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1280 return -5;
1281 t->smi_count = msr & 0xFFFFFFFF;
1282 }
1283
1284 if (use_c1_residency_msr) {
1285 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1286 return -6;

--- 4 unchanged lines hidden (view full) ---

1291 return -10;
1292 }
1293
1294
1295 /* collect core counters only for 1st thread in core */
1296 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1297 return 0;
1298
1374 if (get_msr(cpu, MSR_SMI_COUNT, &msr))
1375 return -5;
1376 t->smi_count = msr & 0xFFFFFFFF;
1377 }
1378
1379 if (use_c1_residency_msr) {
1380 if (get_msr(cpu, MSR_CORE_C1_RES, &t->c1))
1381 return -6;

--- 4 unchanged lines hidden (view full) ---

1386 return -10;
1387 }
1388
1389
1390 /* collect core counters only for 1st thread in core */
1391 if (!(t->flags & CPU_IS_FIRST_THREAD_IN_CORE))
1392 return 0;
1393
1299 if (do_nhm_cstates && !do_slm_cstates && !do_knl_cstates) {
1394 if (DO_BIC(BIC_CPU_c3) && !do_slm_cstates && !do_knl_cstates) {
1300 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1301 return -6;
1302 }
1303
1395 if (get_msr(cpu, MSR_CORE_C3_RESIDENCY, &c->c3))
1396 return -6;
1397 }
1398
1304 if (do_nhm_cstates && !do_knl_cstates) {
1399 if (DO_BIC(BIC_CPU_c6) && !do_knl_cstates) {
1305 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1306 return -7;
1307 } else if (do_knl_cstates) {
1308 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1309 return -7;
1310 }
1311
1400 if (get_msr(cpu, MSR_CORE_C6_RESIDENCY, &c->c6))
1401 return -7;
1402 } else if (do_knl_cstates) {
1403 if (get_msr(cpu, MSR_KNL_CORE_C6_RESIDENCY, &c->c6))
1404 return -7;
1405 }
1406
1312 if (do_snb_cstates)
1407 if (DO_BIC(BIC_CPU_c7))
1313 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1314 return -8;
1315
1408 if (get_msr(cpu, MSR_CORE_C7_RESIDENCY, &c->c7))
1409 return -8;
1410
1316 if (do_dts) {
1411 if (DO_BIC(BIC_CoreTmp)) {
1317 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1318 return -9;
1319 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1320 }
1321
1322 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1323 if (get_msr(cpu, mp->msr_num, &c->counter[i]))
1324 return -10;

--- 58 unchanged lines hidden (view full) ---

1383 return -16;
1384 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1385 }
1386 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1387 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1388 return -16;
1389 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1390 }
1412 if (get_msr(cpu, MSR_IA32_THERM_STATUS, &msr))
1413 return -9;
1414 c->core_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1415 }
1416
1417 for (i = 0, mp = sys.cp; mp; i++, mp = mp->next) {
1418 if (get_msr(cpu, mp->msr_num, &c->counter[i]))
1419 return -10;

--- 58 unchanged lines hidden (view full) ---

1478 return -16;
1479 p->rapl_pkg_perf_status = msr & 0xFFFFFFFF;
1480 }
1481 if (do_rapl & RAPL_DRAM_PERF_STATUS) {
1482 if (get_msr(cpu, MSR_DRAM_PERF_STATUS, &msr))
1483 return -16;
1484 p->rapl_dram_perf_status = msr & 0xFFFFFFFF;
1485 }
1391 if (do_ptm) {
1486 if (DO_BIC(BIC_PkgTmp)) {
1392 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1393 return -17;
1394 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1395 }
1396
1487 if (get_msr(cpu, MSR_IA32_PACKAGE_THERM_STATUS, &msr))
1488 return -17;
1489 p->pkg_temp_c = tcc_activation_temp - ((msr >> 16) & 0x7F);
1490 }
1491
1397 if (do_gfx_rc6_ms)
1492 if (DO_BIC(BIC_GFX_rc6))
1398 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1399
1493 p->gfx_rc6_ms = gfx_cur_rc6_ms;
1494
1400 if (do_gfx_mhz)
1495 if (DO_BIC(BIC_GFXMHz))
1401 p->gfx_mhz = gfx_cur_mhz;
1402
1403 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1404 if (get_msr(cpu, mp->msr_num, &p->counter[i]))
1405 return -10;
1406 }
1407
1408 return 0;

--- 741 unchanged lines hidden (view full) ---

2150 *
2151 * return 1 if configuration restart needed, else return 0
2152 */
2153int snapshot_proc_sysfs_files(void)
2154{
2155 if (snapshot_proc_interrupts())
2156 return 1;
2157
1496 p->gfx_mhz = gfx_cur_mhz;
1497
1498 for (i = 0, mp = sys.pp; mp; i++, mp = mp->next) {
1499 if (get_msr(cpu, mp->msr_num, &p->counter[i]))
1500 return -10;
1501 }
1502
1503 return 0;

--- 741 unchanged lines hidden (view full) ---

2245 *
2246 * return 1 if configuration restart needed, else return 0
2247 */
2248int snapshot_proc_sysfs_files(void)
2249{
2250 if (snapshot_proc_interrupts())
2251 return 1;
2252
2158 if (do_gfx_rc6_ms)
2253 if (DO_BIC(BIC_GFX_rc6))
2159 snapshot_gfx_rc6_ms();
2160
2254 snapshot_gfx_rc6_ms();
2255
2161 if (do_gfx_mhz)
2256 if (DO_BIC(BIC_GFXMHz))
2162 snapshot_gfx_mhz();
2163
2164 return 0;
2165}
2166
2167void turbostat_loop()
2168{
2169 int retval;

--- 619 unchanged lines hidden (view full) ---

2789 case INTEL_FAM6_SANDYBRIDGE:
2790 case INTEL_FAM6_IVYBRIDGE:
2791 case INTEL_FAM6_HASWELL_CORE: /* HSW */
2792 case INTEL_FAM6_HASWELL_ULT: /* HSW */
2793 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
2794 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
2795 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
2796 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
2257 snapshot_gfx_mhz();
2258
2259 return 0;
2260}
2261
2262void turbostat_loop()
2263{
2264 int retval;

--- 619 unchanged lines hidden (view full) ---

2884 case INTEL_FAM6_SANDYBRIDGE:
2885 case INTEL_FAM6_IVYBRIDGE:
2886 case INTEL_FAM6_HASWELL_CORE: /* HSW */
2887 case INTEL_FAM6_HASWELL_ULT: /* HSW */
2888 case INTEL_FAM6_HASWELL_GT3E: /* HSW */
2889 case INTEL_FAM6_BROADWELL_CORE: /* BDW */
2890 case INTEL_FAM6_BROADWELL_GT3E: /* BDW */
2891 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_GFX | RAPL_PKG_POWER_INFO;
2892 if (rapl_joules) {
2893 BIC_PRESENT(BIC_Pkg_J);
2894 BIC_PRESENT(BIC_Cor_J);
2895 BIC_PRESENT(BIC_GFX_J);
2896 } else {
2897 BIC_PRESENT(BIC_PkgWatt);
2898 BIC_PRESENT(BIC_CorWatt);
2899 BIC_PRESENT(BIC_GFXWatt);
2900 }
2797 break;
2798 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
2799 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
2901 break;
2902 case INTEL_FAM6_ATOM_GOLDMONT: /* BXT */
2903 do_rapl = RAPL_PKG | RAPL_PKG_POWER_INFO;
2904 if (rapl_joules)
2905 BIC_PRESENT(BIC_Pkg_J);
2906 else
2907 BIC_PRESENT(BIC_PkgWatt);
2800 break;
2801 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
2802 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
2803 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
2804 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
2805 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2908 break;
2909 case INTEL_FAM6_SKYLAKE_MOBILE: /* SKL */
2910 case INTEL_FAM6_SKYLAKE_DESKTOP: /* SKL */
2911 case INTEL_FAM6_KABYLAKE_MOBILE: /* KBL */
2912 case INTEL_FAM6_KABYLAKE_DESKTOP: /* KBL */
2913 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2914 BIC_PRESENT(BIC_PKG__);
2915 BIC_PRESENT(BIC_RAM__);
2916 if (rapl_joules) {
2917 BIC_PRESENT(BIC_Pkg_J);
2918 BIC_PRESENT(BIC_Cor_J);
2919 BIC_PRESENT(BIC_RAM_J);
2920 } else {
2921 BIC_PRESENT(BIC_PkgWatt);
2922 BIC_PRESENT(BIC_CorWatt);
2923 BIC_PRESENT(BIC_RAMWatt);
2924 }
2806 break;
2807 case INTEL_FAM6_HASWELL_X: /* HSX */
2808 case INTEL_FAM6_BROADWELL_X: /* BDX */
2809 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
2810 case INTEL_FAM6_SKYLAKE_X: /* SKX */
2811 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
2812 case INTEL_FAM6_XEON_PHI_KNM:
2813 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2925 break;
2926 case INTEL_FAM6_HASWELL_X: /* HSX */
2927 case INTEL_FAM6_BROADWELL_X: /* BDX */
2928 case INTEL_FAM6_BROADWELL_XEON_D: /* BDX-DE */
2929 case INTEL_FAM6_SKYLAKE_X: /* SKX */
2930 case INTEL_FAM6_XEON_PHI_KNL: /* KNL */
2931 case INTEL_FAM6_XEON_PHI_KNM:
2932 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO;
2933 BIC_PRESENT(BIC_PKG__);
2934 BIC_PRESENT(BIC_RAM__);
2935 if (rapl_joules) {
2936 BIC_PRESENT(BIC_Pkg_J);
2937 BIC_PRESENT(BIC_RAM_J);
2938 } else {
2939 BIC_PRESENT(BIC_PkgWatt);
2940 BIC_PRESENT(BIC_RAMWatt);
2941 }
2814 break;
2815 case INTEL_FAM6_SANDYBRIDGE_X:
2816 case INTEL_FAM6_IVYBRIDGE_X:
2817 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
2942 break;
2943 case INTEL_FAM6_SANDYBRIDGE_X:
2944 case INTEL_FAM6_IVYBRIDGE_X:
2945 do_rapl = RAPL_PKG | RAPL_CORES | RAPL_CORE_POLICY | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_PKG_PERF_STATUS | RAPL_DRAM_PERF_STATUS | RAPL_PKG_POWER_INFO;
2946 BIC_PRESENT(BIC_PKG__);
2947 BIC_PRESENT(BIC_RAM__);
2948 if (rapl_joules) {
2949 BIC_PRESENT(BIC_Pkg_J);
2950 BIC_PRESENT(BIC_Cor_J);
2951 BIC_PRESENT(BIC_RAM_J);
2952 } else {
2953 BIC_PRESENT(BIC_PkgWatt);
2954 BIC_PRESENT(BIC_CorWatt);
2955 BIC_PRESENT(BIC_RAMWatt);
2956 }
2818 break;
2819 case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
2820 case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
2821 do_rapl = RAPL_PKG | RAPL_CORES;
2957 break;
2958 case INTEL_FAM6_ATOM_SILVERMONT1: /* BYT */
2959 case INTEL_FAM6_ATOM_SILVERMONT2: /* AVN */
2960 do_rapl = RAPL_PKG | RAPL_CORES;
2961 if (rapl_joules) {
2962 BIC_PRESENT(BIC_Pkg_J);
2963 BIC_PRESENT(BIC_Cor_J);
2964 } else {
2965 BIC_PRESENT(BIC_PkgWatt);
2966 BIC_PRESENT(BIC_CorWatt);
2967 }
2822 break;
2823 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
2824 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
2968 break;
2969 case INTEL_FAM6_ATOM_DENVERTON: /* DNV */
2970 do_rapl = RAPL_PKG | RAPL_DRAM | RAPL_DRAM_POWER_INFO | RAPL_DRAM_PERF_STATUS | RAPL_PKG_PERF_STATUS | RAPL_PKG_POWER_INFO | RAPL_CORES_ENERGY_STATUS;
2971 BIC_PRESENT(BIC_PKG__);
2972 BIC_PRESENT(BIC_RAM__);
2973 if (rapl_joules) {
2974 BIC_PRESENT(BIC_Pkg_J);
2975 BIC_PRESENT(BIC_Cor_J);
2976 BIC_PRESENT(BIC_RAM_J);
2977 } else {
2978 BIC_PRESENT(BIC_PkgWatt);
2979 BIC_PRESENT(BIC_CorWatt);
2980 BIC_PRESENT(BIC_RAMWatt);
2981 }
2825 break;
2826 default:
2827 return;
2828 }
2829
2830 /* units on package 0, verify later other packages match */
2831 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
2832 return;

--- 560 unchanged lines hidden (view full) ---

3393
3394 /*
3395 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
3396 * this check is valid for both Intel and AMD
3397 */
3398
3399 __cpuid(0x6, eax, ebx, ecx, edx);
3400 has_aperf = ecx & (1 << 0);
2982 break;
2983 default:
2984 return;
2985 }
2986
2987 /* units on package 0, verify later other packages match */
2988 if (get_msr(base_cpu, MSR_RAPL_POWER_UNIT, &msr))
2989 return;

--- 560 unchanged lines hidden (view full) ---

3550
3551 /*
3552 * APERF/MPERF is advertised by CPUID.EAX=0x6: ECX.bit0
3553 * this check is valid for both Intel and AMD
3554 */
3555
3556 __cpuid(0x6, eax, ebx, ecx, edx);
3557 has_aperf = ecx & (1 << 0);
3558 if (has_aperf) {
3559 BIC_PRESENT(BIC_Avg_MHz);
3560 BIC_PRESENT(BIC_Busy);
3561 BIC_PRESENT(BIC_Bzy_MHz);
3562 }
3401 do_dts = eax & (1 << 0);
3563 do_dts = eax & (1 << 0);
3564 if (do_dts)
3565 BIC_PRESENT(BIC_CoreTmp);
3402 do_ptm = eax & (1 << 6);
3566 do_ptm = eax & (1 << 6);
3567 if (do_ptm)
3568 BIC_PRESENT(BIC_PkgTmp);
3403 has_hwp = eax & (1 << 7);
3404 has_hwp_notify = eax & (1 << 8);
3405 has_hwp_activity_window = eax & (1 << 9);
3406 has_hwp_epp = eax & (1 << 10);
3407 has_hwp_pkg = eax & (1 << 11);
3408 has_epb = ecx & (1 << 3);
3409
3410 if (debug)

--- 81 unchanged lines hidden (view full) ---

3492 if (debug)
3493 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
3494 base_mhz, max_mhz, bus_mhz);
3495 }
3496
3497 if (has_aperf)
3498 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
3499
3569 has_hwp = eax & (1 << 7);
3570 has_hwp_notify = eax & (1 << 8);
3571 has_hwp_activity_window = eax & (1 << 9);
3572 has_hwp_epp = eax & (1 << 10);
3573 has_hwp_pkg = eax & (1 << 11);
3574 has_epb = ecx & (1 << 3);
3575
3576 if (debug)

--- 81 unchanged lines hidden (view full) ---

3658 if (debug)
3659 fprintf(outf, "CPUID(0x16): base_mhz: %d max_mhz: %d bus_mhz: %d\n",
3660 base_mhz, max_mhz, bus_mhz);
3661 }
3662
3663 if (has_aperf)
3664 aperf_mperf_multiplier = get_aperf_mperf_multiplier(family, model);
3665
3500 do_nhm_platform_info = do_nhm_cstates = do_smi = probe_nhm_msrs(family, model);
3666 BIC_PRESENT(BIC_IRQ);
3667 BIC_PRESENT(BIC_TSC_MHz);
3668
3669 if (probe_nhm_msrs(family, model)) {
3670 do_nhm_platform_info = 1;
3671 BIC_PRESENT(BIC_CPU_c1);
3672 BIC_PRESENT(BIC_CPU_c3);
3673 BIC_PRESENT(BIC_CPU_c6);
3674 BIC_PRESENT(BIC_SMI);
3675 }
3501 do_snb_cstates = has_snb_msrs(family, model);
3676 do_snb_cstates = has_snb_msrs(family, model);
3677
3678 if (do_snb_cstates)
3679 BIC_PRESENT(BIC_CPU_c7);
3680
3502 do_irtl_snb = has_snb_msrs(family, model);
3503 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
3504 do_pc3 = (pkg_cstate_limit >= PCL__3);
3505 do_pc6 = (pkg_cstate_limit >= PCL__6);
3506 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
3507 do_c8_c9_c10 = has_hsw_msrs(family, model);
3508 do_irtl_hsw = has_hsw_msrs(family, model);
3509 do_skl_residency = has_skl_msrs(family, model);

--- 7 unchanged lines hidden (view full) ---

3517 perf_limit_reasons_probe(family, model);
3518
3519 if (debug)
3520 dump_cstate_pstate_config_info(family, model);
3521
3522 if (has_skl_msrs(family, model))
3523 calculate_tsc_tweak();
3524
3681 do_irtl_snb = has_snb_msrs(family, model);
3682 do_pc2 = do_snb_cstates && (pkg_cstate_limit >= PCL__2);
3683 do_pc3 = (pkg_cstate_limit >= PCL__3);
3684 do_pc6 = (pkg_cstate_limit >= PCL__6);
3685 do_pc7 = do_snb_cstates && (pkg_cstate_limit >= PCL__7);
3686 do_c8_c9_c10 = has_hsw_msrs(family, model);
3687 do_irtl_hsw = has_hsw_msrs(family, model);
3688 do_skl_residency = has_skl_msrs(family, model);

--- 7 unchanged lines hidden (view full) ---

3696 perf_limit_reasons_probe(family, model);
3697
3698 if (debug)
3699 dump_cstate_pstate_config_info(family, model);
3700
3701 if (has_skl_msrs(family, model))
3702 calculate_tsc_tweak();
3703
3525 do_gfx_rc6_ms = !access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK);
3704 if (!access("/sys/class/drm/card0/power/rc6_residency_ms", R_OK))
3705 BIC_PRESENT(BIC_GFX_rc6);
3526
3706
3527 do_gfx_mhz = !access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK);
3707 if (!access("/sys/class/graphics/fb0/device/drm/card0/gt_cur_freq_mhz", R_OK))
3708 BIC_PRESENT(BIC_GFXMHz);
3528
3529 return;
3530}
3531
3532void help()
3533{
3534 fprintf(outf,
3535 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"

--- 42 unchanged lines hidden (view full) ---

3578 int physical_package_id;
3579 } *cpus;
3580
3581 /* Initialize num_cpus, max_cpu_num */
3582 topo.num_cpus = 0;
3583 topo.max_cpu_num = 0;
3584 for_all_proc_cpus(count_cpus);
3585 if (!summary_only && topo.num_cpus > 1)
3709
3710 return;
3711}
3712
3713void help()
3714{
3715 fprintf(outf,
3716 "Usage: turbostat [OPTIONS][(--interval seconds) | COMMAND ...]\n"

--- 42 unchanged lines hidden (view full) ---

3759 int physical_package_id;
3760 } *cpus;
3761
3762 /* Initialize num_cpus, max_cpu_num */
3763 topo.num_cpus = 0;
3764 topo.max_cpu_num = 0;
3765 for_all_proc_cpus(count_cpus);
3766 if (!summary_only && topo.num_cpus > 1)
3586 show_cpu = 1;
3767 BIC_PRESENT(BIC_CPU);
3587
3588 if (debug > 1)
3589 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
3590
3591 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
3592 if (cpus == NULL)
3593 err(1, "calloc cpus");
3594

--- 44 unchanged lines hidden (view full) ---

3639 fprintf(outf, "cpu %d pkg %d core %d\n",
3640 i, cpus[i].physical_package_id, cpus[i].core_id);
3641 }
3642 topo.num_cores_per_pkg = max_core_id + 1;
3643 if (debug > 1)
3644 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
3645 max_core_id, topo.num_cores_per_pkg);
3646 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
3768
3769 if (debug > 1)
3770 fprintf(outf, "num_cpus %d max_cpu_num %d\n", topo.num_cpus, topo.max_cpu_num);
3771
3772 cpus = calloc(1, (topo.max_cpu_num + 1) * sizeof(struct cpu_topology));
3773 if (cpus == NULL)
3774 err(1, "calloc cpus");
3775

--- 44 unchanged lines hidden (view full) ---

3820 fprintf(outf, "cpu %d pkg %d core %d\n",
3821 i, cpus[i].physical_package_id, cpus[i].core_id);
3822 }
3823 topo.num_cores_per_pkg = max_core_id + 1;
3824 if (debug > 1)
3825 fprintf(outf, "max_core_id %d, sizing for %d cores per package\n",
3826 max_core_id, topo.num_cores_per_pkg);
3827 if (debug && !summary_only && topo.num_cores_per_pkg > 1)
3647 show_core = 1;
3828 BIC_PRESENT(BIC_Core);
3648
3649 topo.num_packages = max_package_id + 1;
3650 if (debug > 1)
3651 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
3652 max_package_id, topo.num_packages);
3653 if (debug && !summary_only && topo.num_packages > 1)
3829
3830 topo.num_packages = max_package_id + 1;
3831 if (debug > 1)
3832 fprintf(outf, "max_package_id %d, sizing for %d packages\n",
3833 max_package_id, topo.num_packages);
3834 if (debug && !summary_only && topo.num_packages > 1)
3654 show_pkg = 1;
3835 BIC_PRESENT(BIC_Package);
3655
3656 topo.num_threads_per_core = max_siblings;
3657 if (debug > 1)
3658 fprintf(outf, "max_siblings %d\n", max_siblings);
3659
3660 free(cpus);
3661}
3662

--- 377 unchanged lines hidden (view full) ---

4040 if (add_counter(msr_num, name_buffer, width, scope, type, format))
4041 fail++;
4042
4043 if (fail) {
4044 help();
4045 exit(1);
4046 }
4047}
3836
3837 topo.num_threads_per_core = max_siblings;
3838 if (debug > 1)
3839 fprintf(outf, "max_siblings %d\n", max_siblings);
3840
3841 free(cpus);
3842}
3843

--- 377 unchanged lines hidden (view full) ---

4221 if (add_counter(msr_num, name_buffer, width, scope, type, format))
4222 fail++;
4223
4224 if (fail) {
4225 help();
4226 exit(1);
4227 }
4228}
4229/*
4230 * HIDE_LIST - hide this list of counters, show the rest [default]
4231 * SHOW_LIST - show this list of counters, hide the rest
4232 */
4233enum show_hide_mode { SHOW_LIST, HIDE_LIST } global_show_hide_mode = HIDE_LIST;
4234
4235int shown;
4236/*
4237 * parse_show_hide() - process cmdline to set default counter action
4238 */
4239void parse_show_hide(char *optarg, enum show_hide_mode new_mode)
4240{
4241 /*
4242 * --show: show only those specified
4243 * The 1st invocation will clear and replace the enabled mask
4244 * subsequent invocations can add to it.
4245 */
4246 if (new_mode == SHOW_LIST) {
4247 if (shown == 0)
4248 bic_enabled = bic_lookup(optarg);
4249 else
4250 bic_enabled |= bic_lookup(optarg);
4251 shown = 1;
4252
4253 return;
4254 }
4255
4256 /*
4257 * --hide: do not show those specified
4258 * multiple invocations simply clear more bits in enabled mask
4259 */
4260 bic_enabled &= ~bic_lookup(optarg);
4261}
4262
4048void cmdline(int argc, char **argv)
4049{
4050 int opt;
4051 int option_index = 0;
4052 static struct option long_options[] = {
4053 {"add", required_argument, 0, 'a'},
4054 {"Dump", no_argument, 0, 'D'},
4055 {"debug", no_argument, 0, 'd'},
4056 {"interval", required_argument, 0, 'i'},
4057 {"help", no_argument, 0, 'h'},
4263void cmdline(int argc, char **argv)
4264{
4265 int opt;
4266 int option_index = 0;
4267 static struct option long_options[] = {
4268 {"add", required_argument, 0, 'a'},
4269 {"Dump", no_argument, 0, 'D'},
4270 {"debug", no_argument, 0, 'd'},
4271 {"interval", required_argument, 0, 'i'},
4272 {"help", no_argument, 0, 'h'},
4273 {"hide", required_argument, 0, 'H'}, // meh, -h taken by --help
4058 {"Joules", no_argument, 0, 'J'},
4059 {"out", required_argument, 0, 'o'},
4060 {"Package", no_argument, 0, 'p'},
4061 {"processor", no_argument, 0, 'p'},
4274 {"Joules", no_argument, 0, 'J'},
4275 {"out", required_argument, 0, 'o'},
4276 {"Package", no_argument, 0, 'p'},
4277 {"processor", no_argument, 0, 'p'},
4278 {"show", required_argument, 0, 's'},
4062 {"Summary", no_argument, 0, 'S'},
4063 {"TCC", required_argument, 0, 'T'},
4064 {"version", no_argument, 0, 'v' },
4065 {0, 0, 0, 0 }
4066 };
4067
4068 progname = argv[0];
4069

--- 4 unchanged lines hidden (view full) ---

4074 parse_add_command(optarg);
4075 break;
4076 case 'D':
4077 dump_only++;
4078 break;
4079 case 'd':
4080 debug++;
4081 break;
4279 {"Summary", no_argument, 0, 'S'},
4280 {"TCC", required_argument, 0, 'T'},
4281 {"version", no_argument, 0, 'v' },
4282 {0, 0, 0, 0 }
4283 };
4284
4285 progname = argv[0];
4286

--- 4 unchanged lines hidden (view full) ---

4291 parse_add_command(optarg);
4292 break;
4293 case 'D':
4294 dump_only++;
4295 break;
4296 case 'd':
4297 debug++;
4298 break;
4299 case 'H':
4300 parse_show_hide(optarg, HIDE_LIST);
4301 break;
4082 case 'h':
4083 default:
4084 help();
4085 exit(1);
4086 case 'i':
4087 {
4088 double interval = strtod(optarg, NULL);
4089

--- 14 unchanged lines hidden (view full) ---

4104 outf = fopen_or_die(optarg, "w");
4105 break;
4106 case 'P':
4107 show_pkg_only++;
4108 break;
4109 case 'p':
4110 show_core_only++;
4111 break;
4302 case 'h':
4303 default:
4304 help();
4305 exit(1);
4306 case 'i':
4307 {
4308 double interval = strtod(optarg, NULL);
4309

--- 14 unchanged lines hidden (view full) ---

4324 outf = fopen_or_die(optarg, "w");
4325 break;
4326 case 'P':
4327 show_pkg_only++;
4328 break;
4329 case 'p':
4330 show_core_only++;
4331 break;
4332 case 's':
4333 parse_show_hide(optarg, SHOW_LIST);
4334 break;
4112 case 'S':
4113 summary_only++;
4114 break;
4115 case 'T':
4116 tcc_activation_temp_override = atoi(optarg);
4117 break;
4118 case 'v':
4119 print_version();

--- 31 unchanged lines hidden --- 		4335 case 'S':
4336 summary_only++;
4337 break;
4338 case 'T':
4339 tcc_activation_temp_override = atoi(optarg);
4340 break;
4341 case 'v':
4342 print_version();

--- 31 unchanged lines hidden ---