ptp_ocp.c (6d59d4fa1789e0ca51dc33494376272a61b80104) ptp_ocp.c (1acffc6e09ede525ecf733b1a700fdad8db9a203)
1// SPDX-License-Identifier: GPL-2.0-only
2/* Copyright (c) 2020 Facebook */
3
4#include <linux/err.h>
5#include <linux/kernel.h>
6#include <linux/module.h>
7#include <linux/debugfs.h>
8#include <linux/init.h>

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235 int gnss2_port;
236 int mac_port; /* miniature atomic clock */
237 int nmea_port;
238 u8 serial[6];
239 bool has_serial;
240 u32 pps_req_map;
241 int flash_start;
242 u32 utc_tai_offset;
1// SPDX-License-Identifier: GPL-2.0-only
2/* Copyright (c) 2020 Facebook */
3
4#include <linux/err.h>
5#include <linux/kernel.h>
6#include <linux/module.h>
7#include <linux/debugfs.h>
8#include <linux/init.h>

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235 int gnss2_port;
236 int mac_port; /* miniature atomic clock */
237 int nmea_port;
238 u8 serial[6];
239 bool has_serial;
240 u32 pps_req_map;
241 int flash_start;
242 u32 utc_tai_offset;
243 u32 ts_window_adjust;
243};
244
245#define OCP_REQ_TIMESTAMP BIT(0)
246#define OCP_REQ_PPS BIT(1)
247
248struct ocp_resource {
249 unsigned long offset;
250 int size;

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523
524static int
525__ptp_ocp_gettime_locked(struct ptp_ocp *bp, struct timespec64 *ts,
526 struct ptp_system_timestamp *sts)
527{
528 u32 ctrl, time_sec, time_ns;
529 int i;
530
244};
245
246#define OCP_REQ_TIMESTAMP BIT(0)
247#define OCP_REQ_PPS BIT(1)
248
249struct ocp_resource {
250 unsigned long offset;
251 int size;

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524
525static int
526__ptp_ocp_gettime_locked(struct ptp_ocp *bp, struct timespec64 *ts,
527 struct ptp_system_timestamp *sts)
528{
529 u32 ctrl, time_sec, time_ns;
530 int i;
531
531 ctrl = ioread32(&bp->reg->ctrl);
532 ctrl |= OCP_CTRL_READ_TIME_REQ;
533
534 ptp_read_system_prets(sts);
532 ptp_read_system_prets(sts);
533
534 ctrl = OCP_CTRL_READ_TIME_REQ | OCP_CTRL_ENABLE;
535 iowrite32(ctrl, &bp->reg->ctrl);
536
537 for (i = 0; i < 100; i++) {
538 ctrl = ioread32(&bp->reg->ctrl);
539 if (ctrl & OCP_CTRL_READ_TIME_DONE)
540 break;
541 }
542 ptp_read_system_postts(sts);
543
535 iowrite32(ctrl, &bp->reg->ctrl);
536
537 for (i = 0; i < 100; i++) {
538 ctrl = ioread32(&bp->reg->ctrl);
539 if (ctrl & OCP_CTRL_READ_TIME_DONE)
540 break;
541 }
542 ptp_read_system_postts(sts);
543
544 if (sts && bp->ts_window_adjust) {
545 s64 ns = timespec64_to_ns(&sts->post_ts);
546
547 sts->post_ts = ns_to_timespec64(ns - bp->ts_window_adjust);
548 }
549
544 time_ns = ioread32(&bp->reg->time_ns);
545 time_sec = ioread32(&bp->reg->time_sec);
546
547 ts->tv_sec = time_sec;
548 ts->tv_nsec = time_ns;
549
550 return ctrl & OCP_CTRL_READ_TIME_DONE ? 0 : -ETIMEDOUT;
551}

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575 time_sec = ts->tv_sec;
576
577 select = ioread32(&bp->reg->select);
578 iowrite32(OCP_SELECT_CLK_REG, &bp->reg->select);
579
580 iowrite32(time_ns, &bp->reg->adjust_ns);
581 iowrite32(time_sec, &bp->reg->adjust_sec);
582
550 time_ns = ioread32(&bp->reg->time_ns);
551 time_sec = ioread32(&bp->reg->time_sec);
552
553 ts->tv_sec = time_sec;
554 ts->tv_nsec = time_ns;
555
556 return ctrl & OCP_CTRL_READ_TIME_DONE ? 0 : -ETIMEDOUT;
557}

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581 time_sec = ts->tv_sec;
582
583 select = ioread32(&bp->reg->select);
584 iowrite32(OCP_SELECT_CLK_REG, &bp->reg->select);
585
586 iowrite32(time_ns, &bp->reg->adjust_ns);
587 iowrite32(time_sec, &bp->reg->adjust_sec);
588
583 ctrl = ioread32(&bp->reg->ctrl);
584 ctrl |= OCP_CTRL_ADJUST_TIME;
589 ctrl = OCP_CTRL_ADJUST_TIME | OCP_CTRL_ENABLE;
585 iowrite32(ctrl, &bp->reg->ctrl);
586
587 /* restore clock selection */
588 iowrite32(select >> 16, &bp->reg->select);
589}
590
591static int
592ptp_ocp_settime(struct ptp_clock_info *ptp_info, const struct timespec64 *ts)

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721{
722 u32 ctrl, select;
723
724 select = ioread32(&bp->reg->select);
725 iowrite32(OCP_SELECT_CLK_REG, &bp->reg->select);
726
727 iowrite32(0, &bp->reg->drift_ns);
728
590 iowrite32(ctrl, &bp->reg->ctrl);
591
592 /* restore clock selection */
593 iowrite32(select >> 16, &bp->reg->select);
594}
595
596static int
597ptp_ocp_settime(struct ptp_clock_info *ptp_info, const struct timespec64 *ts)

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726{
727 u32 ctrl, select;
728
729 select = ioread32(&bp->reg->select);
730 iowrite32(OCP_SELECT_CLK_REG, &bp->reg->select);
731
732 iowrite32(0, &bp->reg->drift_ns);
733
729 ctrl = ioread32(&bp->reg->ctrl);
730 ctrl |= OCP_CTRL_ADJUST_DRIFT;
734 ctrl = OCP_CTRL_ADJUST_DRIFT | OCP_CTRL_ENABLE;
731 iowrite32(ctrl, &bp->reg->ctrl);
732
733 /* restore clock selection */
734 iowrite32(select >> 16, &bp->reg->select);
735}
736
737static void
738ptp_ocp_watchdog(struct timer_list *t)

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754
755 } else if (bp->gnss_lost) {
756 bp->gnss_lost = 0;
757 }
758
759 mod_timer(&bp->watchdog, jiffies + HZ);
760}
761
735 iowrite32(ctrl, &bp->reg->ctrl);
736
737 /* restore clock selection */
738 iowrite32(select >> 16, &bp->reg->select);
739}
740
741static void
742ptp_ocp_watchdog(struct timer_list *t)

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758
759 } else if (bp->gnss_lost) {
760 bp->gnss_lost = 0;
761 }
762
763 mod_timer(&bp->watchdog, jiffies + HZ);
764}
765
766static void
767ptp_ocp_estimate_pci_timing(struct ptp_ocp *bp)
768{
769 ktime_t start, end;
770 ktime_t delay;
771 u32 ctrl;
772
773 ctrl = ioread32(&bp->reg->ctrl);
774 ctrl = OCP_CTRL_READ_TIME_REQ | OCP_CTRL_ENABLE;
775
776 iowrite32(ctrl, &bp->reg->ctrl);
777
778 start = ktime_get_ns();
779
780 ctrl = ioread32(&bp->reg->ctrl);
781
782 end = ktime_get_ns();
783
784 delay = end - start;
785 bp->ts_window_adjust = (delay >> 5) * 3;
786}
787
762static int
763ptp_ocp_init_clock(struct ptp_ocp *bp)
764{
765 struct timespec64 ts;
766 bool sync;
767 u32 ctrl;
768
788static int
789ptp_ocp_init_clock(struct ptp_ocp *bp)
790{
791 struct timespec64 ts;
792 bool sync;
793 u32 ctrl;
794
769 /* make sure clock is enabled */
770 ctrl = ioread32(&bp->reg->ctrl);
771 ctrl |= OCP_CTRL_ENABLE;
795 ctrl = OCP_CTRL_ENABLE;
772 iowrite32(ctrl, &bp->reg->ctrl);
773
774 /* NO DRIFT Correction */
775 /* offset_p:i 1/8, offset_i: 1/16, drift_p: 0, drift_i: 0 */
776 iowrite32(0x2000, &bp->reg->servo_offset_p);
777 iowrite32(0x1000, &bp->reg->servo_offset_i);
778 iowrite32(0, &bp->reg->servo_drift_p);
779 iowrite32(0, &bp->reg->servo_drift_i);
780
781 /* latch servo values */
782 ctrl |= OCP_CTRL_ADJUST_SERVO;
783 iowrite32(ctrl, &bp->reg->ctrl);
784
785 if ((ioread32(&bp->reg->ctrl) & OCP_CTRL_ENABLE) == 0) {
786 dev_err(&bp->pdev->dev, "clock not enabled\n");
787 return -ENODEV;
788 }
789
796 iowrite32(ctrl, &bp->reg->ctrl);
797
798 /* NO DRIFT Correction */
799 /* offset_p:i 1/8, offset_i: 1/16, drift_p: 0, drift_i: 0 */
800 iowrite32(0x2000, &bp->reg->servo_offset_p);
801 iowrite32(0x1000, &bp->reg->servo_offset_i);
802 iowrite32(0, &bp->reg->servo_drift_p);
803 iowrite32(0, &bp->reg->servo_drift_i);
804
805 /* latch servo values */
806 ctrl |= OCP_CTRL_ADJUST_SERVO;
807 iowrite32(ctrl, &bp->reg->ctrl);
808
809 if ((ioread32(&bp->reg->ctrl) & OCP_CTRL_ENABLE) == 0) {
810 dev_err(&bp->pdev->dev, "clock not enabled\n");
811 return -ENODEV;
812 }
813
814 ptp_ocp_estimate_pci_timing(bp);
815
790 sync = ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC;
791 if (!sync) {
792 ktime_get_clocktai_ts64(&ts);
793 ptp_ocp_settime(&bp->ptp_info, &ts);
794 }
795
796 /* If there is a clock supervisor, then enable the watchdog */
797 if (bp->pps_to_clk) {

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1212 }
1213
1214 /* XXX should fix API - this converts s/ns -> ts -> s/ns */
1215 sec = ioread32(&reg->time_sec);
1216 nsec = ioread32(&reg->time_ns);
1217
1218 ev.type = PTP_CLOCK_EXTTS;
1219 ev.index = ext->info->index;
816 sync = ioread32(&bp->reg->status) & OCP_STATUS_IN_SYNC;
817 if (!sync) {
818 ktime_get_clocktai_ts64(&ts);
819 ptp_ocp_settime(&bp->ptp_info, &ts);
820 }
821
822 /* If there is a clock supervisor, then enable the watchdog */
823 if (bp->pps_to_clk) {

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1238 }
1239
1240 /* XXX should fix API - this converts s/ns -> ts -> s/ns */
1241 sec = ioread32(&reg->time_sec);
1242 nsec = ioread32(&reg->time_ns);
1243
1244 ev.type = PTP_CLOCK_EXTTS;
1245 ev.index = ext->info->index;
1220 ev.timestamp = sec * 1000000000ULL + nsec;
1246 ev.timestamp = sec * NSEC_PER_SEC + nsec;
1221
1222 ptp_clock_event(ext->bp->ptp, &ev);
1223
1224out:
1225 iowrite32(1, &reg->intr); /* write 1 to ack */
1226
1227 return IRQ_HANDLED;
1228}

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1813
1814 ptp_ocp_utc_distribute(bp, val);
1815
1816 return count;
1817}
1818static DEVICE_ATTR_RW(utc_tai_offset);
1819
1820static ssize_t
1247
1248 ptp_clock_event(ext->bp->ptp, &ev);
1249
1250out:
1251 iowrite32(1, &reg->intr); /* write 1 to ack */
1252
1253 return IRQ_HANDLED;
1254}

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1839
1840 ptp_ocp_utc_distribute(bp, val);
1841
1842 return count;
1843}
1844static DEVICE_ATTR_RW(utc_tai_offset);
1845
1846static ssize_t
1847ts_window_adjust_show(struct device *dev,
1848 struct device_attribute *attr, char *buf)
1849{
1850 struct ptp_ocp *bp = dev_get_drvdata(dev);
1851
1852 return sysfs_emit(buf, "%d\n", bp->ts_window_adjust);
1853}
1854
1855static ssize_t
1856ts_window_adjust_store(struct device *dev,
1857 struct device_attribute *attr,
1858 const char *buf, size_t count)
1859{
1860 struct ptp_ocp *bp = dev_get_drvdata(dev);
1861 int err;
1862 u32 val;
1863
1864 err = kstrtou32(buf, 0, &val);
1865 if (err)
1866 return err;
1867
1868 bp->ts_window_adjust = val;
1869
1870 return count;
1871}
1872static DEVICE_ATTR_RW(ts_window_adjust);
1873
1874static ssize_t
1821irig_b_mode_show(struct device *dev, struct device_attribute *attr, char *buf)
1822{
1823 struct ptp_ocp *bp = dev_get_drvdata(dev);
1824 u32 val;
1825
1826 val = ioread32(&bp->irig_out->ctrl);
1827 val = (val >> 16) & 0x07;
1828 return sysfs_emit(buf, "%d\n", val);

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1906 &dev_attr_sma1.attr,
1907 &dev_attr_sma2.attr,
1908 &dev_attr_sma3.attr,
1909 &dev_attr_sma4.attr,
1910 &dev_attr_available_sma_inputs.attr,
1911 &dev_attr_available_sma_outputs.attr,
1912 &dev_attr_irig_b_mode.attr,
1913 &dev_attr_utc_tai_offset.attr,
1875irig_b_mode_show(struct device *dev, struct device_attribute *attr, char *buf)
1876{
1877 struct ptp_ocp *bp = dev_get_drvdata(dev);
1878 u32 val;
1879
1880 val = ioread32(&bp->irig_out->ctrl);
1881 val = (val >> 16) & 0x07;
1882 return sysfs_emit(buf, "%d\n", val);

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1960 &dev_attr_sma1.attr,
1961 &dev_attr_sma2.attr,
1962 &dev_attr_sma3.attr,
1963 &dev_attr_sma4.attr,
1964 &dev_attr_available_sma_inputs.attr,
1965 &dev_attr_available_sma_outputs.attr,
1966 &dev_attr_irig_b_mode.attr,
1967 &dev_attr_utc_tai_offset.attr,
1968 &dev_attr_ts_window_adjust.attr,
1914 NULL,
1915};
1916ATTRIBUTE_GROUPS(timecard);
1917
1918static const char *
1919gpio_map(u32 gpio, u32 bit, const char *pri, const char *sec, const char *def)
1920{
1921 const char *ans;

--- 652 unchanged lines hidden --- 		1969 NULL,
1970};
1971ATTRIBUTE_GROUPS(timecard);
1972
1973static const char *
1974gpio_map(u32 gpio, u32 bit, const char *pri, const char *sec, const char *def)
1975{
1976 const char *ans;

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