ath9k.h (1a6c1e5bd20793e35364280e7df5abd155ef057f) ath9k.h (350e2dcb4647d144000db1505c94d586fcd57919)
1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

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141 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
142 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
143
144#define BAW_WITHIN(_start, _bawsz, _seqno) \
145 ((((_seqno) - (_start)) & 4095) < (_bawsz))
146
147#define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
148
1/*
2 * Copyright (c) 2008-2011 Atheros Communications Inc.
3 *
4 * Permission to use, copy, modify, and/or distribute this software for any
5 * purpose with or without fee is hereby granted, provided that the above
6 * copyright notice and this permission notice appear in all copies.
7 *
8 * THE SOFTWARE IS PROVIDED "AS IS" AND THE AUTHOR DISCLAIMS ALL WARRANTIES

--- 132 unchanged lines hidden (view full) ---

141 (((_len) >= ATH_AGGR_MINPLEN) ? 0 : \
142 DIV_ROUND_UP(ATH_AGGR_MINPLEN - (_len), ATH_AGGR_DELIM_SZ))
143
144#define BAW_WITHIN(_start, _bawsz, _seqno) \
145 ((((_seqno) - (_start)) & 4095) < (_bawsz))
146
147#define ATH_AN_2_TID(_an, _tidno) (&(_an)->tid[(_tidno)])
148
149#define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
149#define IS_HT_RATE(rate) (rate & 0x80)
150#define IS_CCK_RATE(rate) ((rate >= 0x18) && (rate <= 0x1e))
151#define IS_OFDM_RATE(rate) ((rate >= 0x8) && (rate <= 0xf))
150
151struct ath_txq {
152 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
153 u32 axq_qnum; /* ath9k hardware queue number */
154 void *axq_link;
155 struct list_head axq_q;
156 spinlock_t axq_lock;
157 u32 axq_depth;

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257 struct ath_atx_ac ac[IEEE80211_NUM_ACS];
258
259 u16 maxampdu;
260 u8 mpdudensity;
261 s8 ps_key;
262
263 bool sleeping;
264 bool no_ps_filter;
152
153struct ath_txq {
154 int mac80211_qnum; /* mac80211 queue number, -1 means not mac80211 Q */
155 u32 axq_qnum; /* ath9k hardware queue number */
156 void *axq_link;
157 struct list_head axq_q;
158 spinlock_t axq_lock;
159 u32 axq_depth;

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259 struct ath_atx_ac ac[IEEE80211_NUM_ACS];
260
261 u16 maxampdu;
262 u8 mpdudensity;
263 s8 ps_key;
264
265 bool sleeping;
266 bool no_ps_filter;
267
268#ifdef CONFIG_ATH9K_STATION_STATISTICS
269 struct ath_rx_rate_stats rx_rate_stats;
270#endif
265};
266
267struct ath_tx_control {
268 struct ath_txq *txq;
269 struct ath_node *an;
270 u8 paprd;
271 struct ieee80211_sta *sta;
272};

--- 578 unchanged lines hidden --- 		271};
272
273struct ath_tx_control {
274 struct ath_txq *txq;
275 struct ath_node *an;
276 u8 paprd;
277 struct ieee80211_sta *sta;
278};

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