ath5k.h (acb091d67c5c9649cf5d25055ef6fd64239a6762) ath5k.h (8c2b418a07b4dc77d7efadb890ba9ad1a4161c3f)
1/*
2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2007 Nick Kossifidis <mickflemm@gmail.com>
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *

--- 144 unchanged lines hidden (view full) ---

153 if (_i % 64) \
154 udelay(1); \
155} while (0)
156
157/* Register dumps are done per operation mode */
158#define AR5K_INI_RFGAIN_5GHZ 0
159#define AR5K_INI_RFGAIN_2GHZ 1
160
1/*
2 * Copyright (c) 2004-2007 Reyk Floeter <reyk@openbsd.org>
3 * Copyright (c) 2006-2007 Nick Kossifidis <mickflemm@gmail.com>
4 *
5 * Permission to use, copy, modify, and distribute this software for any
6 * purpose with or without fee is hereby granted, provided that the above
7 * copyright notice and this permission notice appear in all copies.
8 *

--- 144 unchanged lines hidden (view full) ---

153 if (_i % 64) \
154 udelay(1); \
155} while (0)
156
157/* Register dumps are done per operation mode */
158#define AR5K_INI_RFGAIN_5GHZ 0
159#define AR5K_INI_RFGAIN_2GHZ 1
160
161/* TODO: Clean this up */
162#define AR5K_INI_VAL_11A 0
163#define AR5K_INI_VAL_11A_TURBO 1
164#define AR5K_INI_VAL_11B 2
165#define AR5K_INI_VAL_11G 3
166#define AR5K_INI_VAL_11G_TURBO 4
167#define AR5K_INI_VAL_XR 0
168#define AR5K_INI_VAL_MAX 5
169
170/*
171 * Some tuneable values (these should be changeable by the user)
172 * TODO: Make use of them and add more options OR use debug/configfs
173 */
174#define AR5K_TUNE_DMA_BEACON_RESP 2
175#define AR5K_TUNE_SW_BEACON_RESP 10
176#define AR5K_TUNE_ADDITIONAL_SWBA_BACKOFF 0
177#define AR5K_TUNE_RADAR_ALERT false

--- 246 unchanged lines hidden (view full) ---

424 * compression and decompression takes place inside the chipset, without
425 * putting additional load on the host CPU.
426 *
427 */
428#define MODULATION_TURBO 0x00000080
429
430enum ath5k_driver_mode {
431 AR5K_MODE_11A = 0,
161/*
162 * Some tuneable values (these should be changeable by the user)
163 * TODO: Make use of them and add more options OR use debug/configfs
164 */
165#define AR5K_TUNE_DMA_BEACON_RESP 2
166#define AR5K_TUNE_SW_BEACON_RESP 10
167#define AR5K_TUNE_ADDITIONAL_SWBA_BACKOFF 0
168#define AR5K_TUNE_RADAR_ALERT false

--- 246 unchanged lines hidden (view full) ---

415 * compression and decompression takes place inside the chipset, without
416 * putting additional load on the host CPU.
417 *
418 */
419#define MODULATION_TURBO 0x00000080
420
421enum ath5k_driver_mode {
422 AR5K_MODE_11A = 0,
432 AR5K_MODE_11A_TURBO = 1,
433 AR5K_MODE_11B = 2,
434 AR5K_MODE_11G = 3,
435 AR5K_MODE_11G_TURBO = 4,
423 AR5K_MODE_11B = 1,
424 AR5K_MODE_11G = 2,
436 AR5K_MODE_XR = 0,
425 AR5K_MODE_XR = 0,
437 AR5K_MODE_MAX = 5
426 AR5K_MODE_MAX = 3
438};
439
440enum ath5k_ant_mode {
441 AR5K_ANTMODE_DEFAULT = 0, /* default antenna setup */
442 AR5K_ANTMODE_FIXED_A = 1, /* only antenna A is present */
443 AR5K_ANTMODE_FIXED_B = 2, /* only antenna B is present */
444 AR5K_ANTMODE_SINGLE_AP = 3, /* sta locked on a single ap */
445 AR5K_ANTMODE_SECTOR_AP = 4, /* AP with tx antenna set on tx desc */

--- 913 unchanged lines hidden --- 		427};
428
429enum ath5k_ant_mode {
430 AR5K_ANTMODE_DEFAULT = 0, /* default antenna setup */
431 AR5K_ANTMODE_FIXED_A = 1, /* only antenna A is present */
432 AR5K_ANTMODE_FIXED_B = 2, /* only antenna B is present */
433 AR5K_ANTMODE_SINGLE_AP = 3, /* sta locked on a single ap */
434 AR5K_ANTMODE_SECTOR_AP = 4, /* AP with tx antenna set on tx desc */

--- 913 unchanged lines hidden ---