smsc95xx.c (ec28dcc6b4c00b78ad269ad5b85ebd5c2d504825) smsc95xx.c (db443c441e204cecc1bcec490d40997db988ce3a)
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2008 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.

--- 695 unchanged lines hidden (view full) ---

704 pdata->mac_cr |= MAC_CR_RXEN_;
705 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
706
707 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
708}
709
710static int smsc95xx_phy_initialize(struct usbnet *dev)
711{
1 /***************************************************************************
2 *
3 * Copyright (C) 2007-2008 SMSC
4 *
5 * This program is free software; you can redistribute it and/or
6 * modify it under the terms of the GNU General Public License
7 * as published by the Free Software Foundation; either version 2
8 * of the License, or (at your option) any later version.

--- 695 unchanged lines hidden (view full) ---

704 pdata->mac_cr |= MAC_CR_RXEN_;
705 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags);
706
707 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr);
708}
709
710static int smsc95xx_phy_initialize(struct usbnet *dev)
711{
712 int bmcr, timeout = 0;
713
712 /* Initialize MII structure */
713 dev->mii.dev = dev->net;
714 dev->mii.mdio_read = smsc95xx_mdio_read;
715 dev->mii.mdio_write = smsc95xx_mdio_write;
716 dev->mii.phy_id_mask = 0x1f;
717 dev->mii.reg_num_mask = 0x1f;
718 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
719
714 /* Initialize MII structure */
715 dev->mii.dev = dev->net;
716 dev->mii.mdio_read = smsc95xx_mdio_read;
717 dev->mii.mdio_write = smsc95xx_mdio_write;
718 dev->mii.phy_id_mask = 0x1f;
719 dev->mii.reg_num_mask = 0x1f;
720 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID;
721
722 /* reset phy and wait for reset to complete */
720 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
723 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET);
724
725 do {
726 msleep(10);
727 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR);
728 timeout++;
729 } while ((bmcr & MII_BMCR) && (timeout < 100));
730
731 if (timeout >= 100) {
732 netdev_warn(dev->net, "timeout on PHY Reset");
733 return -EIO;
734 }
735
721 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
722 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
723 ADVERTISE_PAUSE_ASYM);
724
725 /* read to clear */
726 smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
727
728 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,

--- 586 unchanged lines hidden --- 		736 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE,
737 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP |
738 ADVERTISE_PAUSE_ASYM);
739
740 /* read to clear */
741 smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC);
742
743 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK,

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