1 /*************************************************************************** 2 * 3 * Copyright (C) 2007-2008 SMSC 4 * 5 * This program is free software; you can redistribute it and/or 6 * modify it under the terms of the GNU General Public License 7 * as published by the Free Software Foundation; either version 2 8 * of the License, or (at your option) any later version. 9 * 10 * This program is distributed in the hope that it will be useful, 11 * but WITHOUT ANY WARRANTY; without even the implied warranty of 12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the 13 * GNU General Public License for more details. 14 * 15 * You should have received a copy of the GNU General Public License 16 * along with this program; if not, write to the Free Software 17 * Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. 18 * 19 *****************************************************************************/ 20 21 #include <linux/module.h> 22 #include <linux/kmod.h> 23 #include <linux/init.h> 24 #include <linux/netdevice.h> 25 #include <linux/etherdevice.h> 26 #include <linux/ethtool.h> 27 #include <linux/mii.h> 28 #include <linux/usb.h> 29 #include <linux/crc32.h> 30 #include <linux/usb/usbnet.h> 31 #include "smsc95xx.h" 32 33 #define SMSC_CHIPNAME "smsc95xx" 34 #define SMSC_DRIVER_VERSION "1.0.4" 35 #define HS_USB_PKT_SIZE (512) 36 #define FS_USB_PKT_SIZE (64) 37 #define DEFAULT_HS_BURST_CAP_SIZE (16 * 1024 + 5 * HS_USB_PKT_SIZE) 38 #define DEFAULT_FS_BURST_CAP_SIZE (6 * 1024 + 33 * FS_USB_PKT_SIZE) 39 #define DEFAULT_BULK_IN_DELAY (0x00002000) 40 #define MAX_SINGLE_PACKET_SIZE (2048) 41 #define LAN95XX_EEPROM_MAGIC (0x9500) 42 #define EEPROM_MAC_OFFSET (0x01) 43 #define DEFAULT_TX_CSUM_ENABLE (true) 44 #define DEFAULT_RX_CSUM_ENABLE (true) 45 #define SMSC95XX_INTERNAL_PHY_ID (1) 46 #define SMSC95XX_TX_OVERHEAD (8) 47 #define SMSC95XX_TX_OVERHEAD_CSUM (12) 48 49 struct smsc95xx_priv { 50 u32 mac_cr; 51 spinlock_t mac_cr_lock; 52 bool use_tx_csum; 53 bool use_rx_csum; 54 }; 55 56 struct usb_context { 57 struct usb_ctrlrequest req; 58 struct usbnet *dev; 59 }; 60 61 static int turbo_mode = true; 62 module_param(turbo_mode, bool, 0644); 63 MODULE_PARM_DESC(turbo_mode, "Enable multiple frames per Rx transaction"); 64 65 static int smsc95xx_read_reg(struct usbnet *dev, u32 index, u32 *data) 66 { 67 u32 *buf = kmalloc(4, GFP_KERNEL); 68 int ret; 69 70 BUG_ON(!dev); 71 72 if (!buf) 73 return -ENOMEM; 74 75 ret = usb_control_msg(dev->udev, usb_rcvctrlpipe(dev->udev, 0), 76 USB_VENDOR_REQUEST_READ_REGISTER, 77 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 78 00, index, buf, 4, USB_CTRL_GET_TIMEOUT); 79 80 if (unlikely(ret < 0)) 81 netdev_warn(dev->net, "Failed to read register index 0x%08x\n", index); 82 83 le32_to_cpus(buf); 84 *data = *buf; 85 kfree(buf); 86 87 return ret; 88 } 89 90 static int smsc95xx_write_reg(struct usbnet *dev, u32 index, u32 data) 91 { 92 u32 *buf = kmalloc(4, GFP_KERNEL); 93 int ret; 94 95 BUG_ON(!dev); 96 97 if (!buf) 98 return -ENOMEM; 99 100 *buf = data; 101 cpu_to_le32s(buf); 102 103 ret = usb_control_msg(dev->udev, usb_sndctrlpipe(dev->udev, 0), 104 USB_VENDOR_REQUEST_WRITE_REGISTER, 105 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE, 106 00, index, buf, 4, USB_CTRL_SET_TIMEOUT); 107 108 if (unlikely(ret < 0)) 109 netdev_warn(dev->net, "Failed to write register index 0x%08x\n", index); 110 111 kfree(buf); 112 113 return ret; 114 } 115 116 /* Loop until the read is completed with timeout 117 * called with phy_mutex held */ 118 static int smsc95xx_phy_wait_not_busy(struct usbnet *dev) 119 { 120 unsigned long start_time = jiffies; 121 u32 val; 122 123 do { 124 smsc95xx_read_reg(dev, MII_ADDR, &val); 125 if (!(val & MII_BUSY_)) 126 return 0; 127 } while (!time_after(jiffies, start_time + HZ)); 128 129 return -EIO; 130 } 131 132 static int smsc95xx_mdio_read(struct net_device *netdev, int phy_id, int idx) 133 { 134 struct usbnet *dev = netdev_priv(netdev); 135 u32 val, addr; 136 137 mutex_lock(&dev->phy_mutex); 138 139 /* confirm MII not busy */ 140 if (smsc95xx_phy_wait_not_busy(dev)) { 141 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_read\n"); 142 mutex_unlock(&dev->phy_mutex); 143 return -EIO; 144 } 145 146 /* set the address, index & direction (read from PHY) */ 147 phy_id &= dev->mii.phy_id_mask; 148 idx &= dev->mii.reg_num_mask; 149 addr = (phy_id << 11) | (idx << 6) | MII_READ_; 150 smsc95xx_write_reg(dev, MII_ADDR, addr); 151 152 if (smsc95xx_phy_wait_not_busy(dev)) { 153 netdev_warn(dev->net, "Timed out reading MII reg %02X\n", idx); 154 mutex_unlock(&dev->phy_mutex); 155 return -EIO; 156 } 157 158 smsc95xx_read_reg(dev, MII_DATA, &val); 159 160 mutex_unlock(&dev->phy_mutex); 161 162 return (u16)(val & 0xFFFF); 163 } 164 165 static void smsc95xx_mdio_write(struct net_device *netdev, int phy_id, int idx, 166 int regval) 167 { 168 struct usbnet *dev = netdev_priv(netdev); 169 u32 val, addr; 170 171 mutex_lock(&dev->phy_mutex); 172 173 /* confirm MII not busy */ 174 if (smsc95xx_phy_wait_not_busy(dev)) { 175 netdev_warn(dev->net, "MII is busy in smsc95xx_mdio_write\n"); 176 mutex_unlock(&dev->phy_mutex); 177 return; 178 } 179 180 val = regval; 181 smsc95xx_write_reg(dev, MII_DATA, val); 182 183 /* set the address, index & direction (write to PHY) */ 184 phy_id &= dev->mii.phy_id_mask; 185 idx &= dev->mii.reg_num_mask; 186 addr = (phy_id << 11) | (idx << 6) | MII_WRITE_; 187 smsc95xx_write_reg(dev, MII_ADDR, addr); 188 189 if (smsc95xx_phy_wait_not_busy(dev)) 190 netdev_warn(dev->net, "Timed out writing MII reg %02X\n", idx); 191 192 mutex_unlock(&dev->phy_mutex); 193 } 194 195 static int smsc95xx_wait_eeprom(struct usbnet *dev) 196 { 197 unsigned long start_time = jiffies; 198 u32 val; 199 200 do { 201 smsc95xx_read_reg(dev, E2P_CMD, &val); 202 if (!(val & E2P_CMD_BUSY_) || (val & E2P_CMD_TIMEOUT_)) 203 break; 204 udelay(40); 205 } while (!time_after(jiffies, start_time + HZ)); 206 207 if (val & (E2P_CMD_TIMEOUT_ | E2P_CMD_BUSY_)) { 208 netdev_warn(dev->net, "EEPROM read operation timeout\n"); 209 return -EIO; 210 } 211 212 return 0; 213 } 214 215 static int smsc95xx_eeprom_confirm_not_busy(struct usbnet *dev) 216 { 217 unsigned long start_time = jiffies; 218 u32 val; 219 220 do { 221 smsc95xx_read_reg(dev, E2P_CMD, &val); 222 223 if (!(val & E2P_CMD_BUSY_)) 224 return 0; 225 226 udelay(40); 227 } while (!time_after(jiffies, start_time + HZ)); 228 229 netdev_warn(dev->net, "EEPROM is busy\n"); 230 return -EIO; 231 } 232 233 static int smsc95xx_read_eeprom(struct usbnet *dev, u32 offset, u32 length, 234 u8 *data) 235 { 236 u32 val; 237 int i, ret; 238 239 BUG_ON(!dev); 240 BUG_ON(!data); 241 242 ret = smsc95xx_eeprom_confirm_not_busy(dev); 243 if (ret) 244 return ret; 245 246 for (i = 0; i < length; i++) { 247 val = E2P_CMD_BUSY_ | E2P_CMD_READ_ | (offset & E2P_CMD_ADDR_); 248 smsc95xx_write_reg(dev, E2P_CMD, val); 249 250 ret = smsc95xx_wait_eeprom(dev); 251 if (ret < 0) 252 return ret; 253 254 smsc95xx_read_reg(dev, E2P_DATA, &val); 255 256 data[i] = val & 0xFF; 257 offset++; 258 } 259 260 return 0; 261 } 262 263 static int smsc95xx_write_eeprom(struct usbnet *dev, u32 offset, u32 length, 264 u8 *data) 265 { 266 u32 val; 267 int i, ret; 268 269 BUG_ON(!dev); 270 BUG_ON(!data); 271 272 ret = smsc95xx_eeprom_confirm_not_busy(dev); 273 if (ret) 274 return ret; 275 276 /* Issue write/erase enable command */ 277 val = E2P_CMD_BUSY_ | E2P_CMD_EWEN_; 278 smsc95xx_write_reg(dev, E2P_CMD, val); 279 280 ret = smsc95xx_wait_eeprom(dev); 281 if (ret < 0) 282 return ret; 283 284 for (i = 0; i < length; i++) { 285 286 /* Fill data register */ 287 val = data[i]; 288 smsc95xx_write_reg(dev, E2P_DATA, val); 289 290 /* Send "write" command */ 291 val = E2P_CMD_BUSY_ | E2P_CMD_WRITE_ | (offset & E2P_CMD_ADDR_); 292 smsc95xx_write_reg(dev, E2P_CMD, val); 293 294 ret = smsc95xx_wait_eeprom(dev); 295 if (ret < 0) 296 return ret; 297 298 offset++; 299 } 300 301 return 0; 302 } 303 304 static void smsc95xx_async_cmd_callback(struct urb *urb) 305 { 306 struct usb_context *usb_context = urb->context; 307 struct usbnet *dev = usb_context->dev; 308 int status = urb->status; 309 310 if (status < 0) 311 netdev_warn(dev->net, "async callback failed with %d\n", status); 312 313 kfree(usb_context); 314 usb_free_urb(urb); 315 } 316 317 static int smsc95xx_write_reg_async(struct usbnet *dev, u16 index, u32 *data) 318 { 319 struct usb_context *usb_context; 320 int status; 321 struct urb *urb; 322 const u16 size = 4; 323 324 urb = usb_alloc_urb(0, GFP_ATOMIC); 325 if (!urb) { 326 netdev_warn(dev->net, "Error allocating URB\n"); 327 return -ENOMEM; 328 } 329 330 usb_context = kmalloc(sizeof(struct usb_context), GFP_ATOMIC); 331 if (usb_context == NULL) { 332 netdev_warn(dev->net, "Error allocating control msg\n"); 333 usb_free_urb(urb); 334 return -ENOMEM; 335 } 336 337 usb_context->req.bRequestType = 338 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE; 339 usb_context->req.bRequest = USB_VENDOR_REQUEST_WRITE_REGISTER; 340 usb_context->req.wValue = 00; 341 usb_context->req.wIndex = cpu_to_le16(index); 342 usb_context->req.wLength = cpu_to_le16(size); 343 344 usb_fill_control_urb(urb, dev->udev, usb_sndctrlpipe(dev->udev, 0), 345 (void *)&usb_context->req, data, size, 346 smsc95xx_async_cmd_callback, 347 (void *)usb_context); 348 349 status = usb_submit_urb(urb, GFP_ATOMIC); 350 if (status < 0) { 351 netdev_warn(dev->net, "Error submitting control msg, sts=%d\n", 352 status); 353 kfree(usb_context); 354 usb_free_urb(urb); 355 } 356 357 return status; 358 } 359 360 /* returns hash bit number for given MAC address 361 * example: 362 * 01 00 5E 00 00 01 -> returns bit number 31 */ 363 static unsigned int smsc95xx_hash(char addr[ETH_ALEN]) 364 { 365 return (ether_crc(ETH_ALEN, addr) >> 26) & 0x3f; 366 } 367 368 static void smsc95xx_set_multicast(struct net_device *netdev) 369 { 370 struct usbnet *dev = netdev_priv(netdev); 371 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 372 u32 hash_hi = 0; 373 u32 hash_lo = 0; 374 unsigned long flags; 375 376 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 377 378 if (dev->net->flags & IFF_PROMISC) { 379 netif_dbg(dev, drv, dev->net, "promiscuous mode enabled\n"); 380 pdata->mac_cr |= MAC_CR_PRMS_; 381 pdata->mac_cr &= ~(MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 382 } else if (dev->net->flags & IFF_ALLMULTI) { 383 netif_dbg(dev, drv, dev->net, "receive all multicast enabled\n"); 384 pdata->mac_cr |= MAC_CR_MCPAS_; 385 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_HPFILT_); 386 } else if (!netdev_mc_empty(dev->net)) { 387 struct dev_mc_list *mc_list; 388 389 pdata->mac_cr |= MAC_CR_HPFILT_; 390 pdata->mac_cr &= ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_); 391 392 netdev_for_each_mc_addr(mc_list, netdev) { 393 u32 bitnum = smsc95xx_hash(mc_list->dmi_addr); 394 u32 mask = 0x01 << (bitnum & 0x1F); 395 if (bitnum & 0x20) 396 hash_hi |= mask; 397 else 398 hash_lo |= mask; 399 } 400 401 netif_dbg(dev, drv, dev->net, "HASHH=0x%08X, HASHL=0x%08X\n", 402 hash_hi, hash_lo); 403 } else { 404 netif_dbg(dev, drv, dev->net, "receive own packets only\n"); 405 pdata->mac_cr &= 406 ~(MAC_CR_PRMS_ | MAC_CR_MCPAS_ | MAC_CR_HPFILT_); 407 } 408 409 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 410 411 /* Initiate async writes, as we can't wait for completion here */ 412 smsc95xx_write_reg_async(dev, HASHH, &hash_hi); 413 smsc95xx_write_reg_async(dev, HASHL, &hash_lo); 414 smsc95xx_write_reg_async(dev, MAC_CR, &pdata->mac_cr); 415 } 416 417 static void smsc95xx_phy_update_flowcontrol(struct usbnet *dev, u8 duplex, 418 u16 lcladv, u16 rmtadv) 419 { 420 u32 flow, afc_cfg = 0; 421 422 int ret = smsc95xx_read_reg(dev, AFC_CFG, &afc_cfg); 423 if (ret < 0) { 424 netdev_warn(dev->net, "error reading AFC_CFG\n"); 425 return; 426 } 427 428 if (duplex == DUPLEX_FULL) { 429 u8 cap = mii_resolve_flowctrl_fdx(lcladv, rmtadv); 430 431 if (cap & FLOW_CTRL_RX) 432 flow = 0xFFFF0002; 433 else 434 flow = 0; 435 436 if (cap & FLOW_CTRL_TX) 437 afc_cfg |= 0xF; 438 else 439 afc_cfg &= ~0xF; 440 441 netif_dbg(dev, link, dev->net, "rx pause %s, tx pause %s\n", 442 cap & FLOW_CTRL_RX ? "enabled" : "disabled", 443 cap & FLOW_CTRL_TX ? "enabled" : "disabled"); 444 } else { 445 netif_dbg(dev, link, dev->net, "half duplex\n"); 446 flow = 0; 447 afc_cfg |= 0xF; 448 } 449 450 smsc95xx_write_reg(dev, FLOW, flow); 451 smsc95xx_write_reg(dev, AFC_CFG, afc_cfg); 452 } 453 454 static int smsc95xx_link_reset(struct usbnet *dev) 455 { 456 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 457 struct mii_if_info *mii = &dev->mii; 458 struct ethtool_cmd ecmd; 459 unsigned long flags; 460 u16 lcladv, rmtadv; 461 u32 intdata; 462 463 /* clear interrupt status */ 464 smsc95xx_mdio_read(dev->net, mii->phy_id, PHY_INT_SRC); 465 intdata = 0xFFFFFFFF; 466 smsc95xx_write_reg(dev, INT_STS, intdata); 467 468 mii_check_media(mii, 1, 1); 469 mii_ethtool_gset(&dev->mii, &ecmd); 470 lcladv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_ADVERTISE); 471 rmtadv = smsc95xx_mdio_read(dev->net, mii->phy_id, MII_LPA); 472 473 netif_dbg(dev, link, dev->net, "speed: %d duplex: %d lcladv: %04x rmtadv: %04x\n", 474 ecmd.speed, ecmd.duplex, lcladv, rmtadv); 475 476 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 477 if (ecmd.duplex != DUPLEX_FULL) { 478 pdata->mac_cr &= ~MAC_CR_FDPX_; 479 pdata->mac_cr |= MAC_CR_RCVOWN_; 480 } else { 481 pdata->mac_cr &= ~MAC_CR_RCVOWN_; 482 pdata->mac_cr |= MAC_CR_FDPX_; 483 } 484 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 485 486 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 487 488 smsc95xx_phy_update_flowcontrol(dev, ecmd.duplex, lcladv, rmtadv); 489 490 return 0; 491 } 492 493 static void smsc95xx_status(struct usbnet *dev, struct urb *urb) 494 { 495 u32 intdata; 496 497 if (urb->actual_length != 4) { 498 netdev_warn(dev->net, "unexpected urb length %d\n", 499 urb->actual_length); 500 return; 501 } 502 503 memcpy(&intdata, urb->transfer_buffer, 4); 504 le32_to_cpus(&intdata); 505 506 netif_dbg(dev, link, dev->net, "intdata: 0x%08X\n", intdata); 507 508 if (intdata & INT_ENP_PHY_INT_) 509 usbnet_defer_kevent(dev, EVENT_LINK_RESET); 510 else 511 netdev_warn(dev->net, "unexpected interrupt, intdata=0x%08X\n", 512 intdata); 513 } 514 515 /* Enable or disable Tx & Rx checksum offload engines */ 516 static int smsc95xx_set_csums(struct usbnet *dev) 517 { 518 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 519 u32 read_buf; 520 int ret = smsc95xx_read_reg(dev, COE_CR, &read_buf); 521 if (ret < 0) { 522 netdev_warn(dev->net, "Failed to read COE_CR: %d\n", ret); 523 return ret; 524 } 525 526 if (pdata->use_tx_csum) 527 read_buf |= Tx_COE_EN_; 528 else 529 read_buf &= ~Tx_COE_EN_; 530 531 if (pdata->use_rx_csum) 532 read_buf |= Rx_COE_EN_; 533 else 534 read_buf &= ~Rx_COE_EN_; 535 536 ret = smsc95xx_write_reg(dev, COE_CR, read_buf); 537 if (ret < 0) { 538 netdev_warn(dev->net, "Failed to write COE_CR: %d\n", ret); 539 return ret; 540 } 541 542 netif_dbg(dev, hw, dev->net, "COE_CR = 0x%08x\n", read_buf); 543 return 0; 544 } 545 546 static int smsc95xx_ethtool_get_eeprom_len(struct net_device *net) 547 { 548 return MAX_EEPROM_SIZE; 549 } 550 551 static int smsc95xx_ethtool_get_eeprom(struct net_device *netdev, 552 struct ethtool_eeprom *ee, u8 *data) 553 { 554 struct usbnet *dev = netdev_priv(netdev); 555 556 ee->magic = LAN95XX_EEPROM_MAGIC; 557 558 return smsc95xx_read_eeprom(dev, ee->offset, ee->len, data); 559 } 560 561 static int smsc95xx_ethtool_set_eeprom(struct net_device *netdev, 562 struct ethtool_eeprom *ee, u8 *data) 563 { 564 struct usbnet *dev = netdev_priv(netdev); 565 566 if (ee->magic != LAN95XX_EEPROM_MAGIC) { 567 netdev_warn(dev->net, "EEPROM: magic value mismatch, magic = 0x%x\n", 568 ee->magic); 569 return -EINVAL; 570 } 571 572 return smsc95xx_write_eeprom(dev, ee->offset, ee->len, data); 573 } 574 575 static u32 smsc95xx_ethtool_get_rx_csum(struct net_device *netdev) 576 { 577 struct usbnet *dev = netdev_priv(netdev); 578 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 579 580 return pdata->use_rx_csum; 581 } 582 583 static int smsc95xx_ethtool_set_rx_csum(struct net_device *netdev, u32 val) 584 { 585 struct usbnet *dev = netdev_priv(netdev); 586 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 587 588 pdata->use_rx_csum = !!val; 589 590 return smsc95xx_set_csums(dev); 591 } 592 593 static u32 smsc95xx_ethtool_get_tx_csum(struct net_device *netdev) 594 { 595 struct usbnet *dev = netdev_priv(netdev); 596 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 597 598 return pdata->use_tx_csum; 599 } 600 601 static int smsc95xx_ethtool_set_tx_csum(struct net_device *netdev, u32 val) 602 { 603 struct usbnet *dev = netdev_priv(netdev); 604 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 605 606 pdata->use_tx_csum = !!val; 607 608 ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum); 609 return smsc95xx_set_csums(dev); 610 } 611 612 static const struct ethtool_ops smsc95xx_ethtool_ops = { 613 .get_link = usbnet_get_link, 614 .nway_reset = usbnet_nway_reset, 615 .get_drvinfo = usbnet_get_drvinfo, 616 .get_msglevel = usbnet_get_msglevel, 617 .set_msglevel = usbnet_set_msglevel, 618 .get_settings = usbnet_get_settings, 619 .set_settings = usbnet_set_settings, 620 .get_eeprom_len = smsc95xx_ethtool_get_eeprom_len, 621 .get_eeprom = smsc95xx_ethtool_get_eeprom, 622 .set_eeprom = smsc95xx_ethtool_set_eeprom, 623 .get_tx_csum = smsc95xx_ethtool_get_tx_csum, 624 .set_tx_csum = smsc95xx_ethtool_set_tx_csum, 625 .get_rx_csum = smsc95xx_ethtool_get_rx_csum, 626 .set_rx_csum = smsc95xx_ethtool_set_rx_csum, 627 }; 628 629 static int smsc95xx_ioctl(struct net_device *netdev, struct ifreq *rq, int cmd) 630 { 631 struct usbnet *dev = netdev_priv(netdev); 632 633 if (!netif_running(netdev)) 634 return -EINVAL; 635 636 return generic_mii_ioctl(&dev->mii, if_mii(rq), cmd, NULL); 637 } 638 639 static void smsc95xx_init_mac_address(struct usbnet *dev) 640 { 641 /* try reading mac address from EEPROM */ 642 if (smsc95xx_read_eeprom(dev, EEPROM_MAC_OFFSET, ETH_ALEN, 643 dev->net->dev_addr) == 0) { 644 if (is_valid_ether_addr(dev->net->dev_addr)) { 645 /* eeprom values are valid so use them */ 646 netif_dbg(dev, ifup, dev->net, "MAC address read from EEPROM\n"); 647 return; 648 } 649 } 650 651 /* no eeprom, or eeprom values are invalid. generate random MAC */ 652 random_ether_addr(dev->net->dev_addr); 653 netif_dbg(dev, ifup, dev->net, "MAC address set to random_ether_addr\n"); 654 } 655 656 static int smsc95xx_set_mac_address(struct usbnet *dev) 657 { 658 u32 addr_lo = dev->net->dev_addr[0] | dev->net->dev_addr[1] << 8 | 659 dev->net->dev_addr[2] << 16 | dev->net->dev_addr[3] << 24; 660 u32 addr_hi = dev->net->dev_addr[4] | dev->net->dev_addr[5] << 8; 661 int ret; 662 663 ret = smsc95xx_write_reg(dev, ADDRL, addr_lo); 664 if (ret < 0) { 665 netdev_warn(dev->net, "Failed to write ADDRL: %d\n", ret); 666 return ret; 667 } 668 669 ret = smsc95xx_write_reg(dev, ADDRH, addr_hi); 670 if (ret < 0) { 671 netdev_warn(dev->net, "Failed to write ADDRH: %d\n", ret); 672 return ret; 673 } 674 675 return 0; 676 } 677 678 /* starts the TX path */ 679 static void smsc95xx_start_tx_path(struct usbnet *dev) 680 { 681 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 682 unsigned long flags; 683 u32 reg_val; 684 685 /* Enable Tx at MAC */ 686 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 687 pdata->mac_cr |= MAC_CR_TXEN_; 688 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 689 690 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 691 692 /* Enable Tx at SCSRs */ 693 reg_val = TX_CFG_ON_; 694 smsc95xx_write_reg(dev, TX_CFG, reg_val); 695 } 696 697 /* Starts the Receive path */ 698 static void smsc95xx_start_rx_path(struct usbnet *dev) 699 { 700 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 701 unsigned long flags; 702 703 spin_lock_irqsave(&pdata->mac_cr_lock, flags); 704 pdata->mac_cr |= MAC_CR_RXEN_; 705 spin_unlock_irqrestore(&pdata->mac_cr_lock, flags); 706 707 smsc95xx_write_reg(dev, MAC_CR, pdata->mac_cr); 708 } 709 710 static int smsc95xx_phy_initialize(struct usbnet *dev) 711 { 712 int bmcr, timeout = 0; 713 714 /* Initialize MII structure */ 715 dev->mii.dev = dev->net; 716 dev->mii.mdio_read = smsc95xx_mdio_read; 717 dev->mii.mdio_write = smsc95xx_mdio_write; 718 dev->mii.phy_id_mask = 0x1f; 719 dev->mii.reg_num_mask = 0x1f; 720 dev->mii.phy_id = SMSC95XX_INTERNAL_PHY_ID; 721 722 /* reset phy and wait for reset to complete */ 723 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_BMCR, BMCR_RESET); 724 725 do { 726 msleep(10); 727 bmcr = smsc95xx_mdio_read(dev->net, dev->mii.phy_id, MII_BMCR); 728 timeout++; 729 } while ((bmcr & MII_BMCR) && (timeout < 100)); 730 731 if (timeout >= 100) { 732 netdev_warn(dev->net, "timeout on PHY Reset"); 733 return -EIO; 734 } 735 736 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, MII_ADVERTISE, 737 ADVERTISE_ALL | ADVERTISE_CSMA | ADVERTISE_PAUSE_CAP | 738 ADVERTISE_PAUSE_ASYM); 739 740 /* read to clear */ 741 smsc95xx_mdio_read(dev->net, dev->mii.phy_id, PHY_INT_SRC); 742 743 smsc95xx_mdio_write(dev->net, dev->mii.phy_id, PHY_INT_MASK, 744 PHY_INT_MASK_DEFAULT_); 745 mii_nway_restart(&dev->mii); 746 747 netif_dbg(dev, ifup, dev->net, "phy initialised successfully\n"); 748 return 0; 749 } 750 751 static int smsc95xx_reset(struct usbnet *dev) 752 { 753 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 754 struct net_device *netdev = dev->net; 755 u32 read_buf, write_buf, burst_cap; 756 int ret = 0, timeout; 757 758 netif_dbg(dev, ifup, dev->net, "entering smsc95xx_reset\n"); 759 760 write_buf = HW_CFG_LRST_; 761 ret = smsc95xx_write_reg(dev, HW_CFG, write_buf); 762 if (ret < 0) { 763 netdev_warn(dev->net, "Failed to write HW_CFG_LRST_ bit in HW_CFG register, ret = %d\n", 764 ret); 765 return ret; 766 } 767 768 timeout = 0; 769 do { 770 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 771 if (ret < 0) { 772 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 773 return ret; 774 } 775 msleep(10); 776 timeout++; 777 } while ((read_buf & HW_CFG_LRST_) && (timeout < 100)); 778 779 if (timeout >= 100) { 780 netdev_warn(dev->net, "timeout waiting for completion of Lite Reset\n"); 781 return ret; 782 } 783 784 write_buf = PM_CTL_PHY_RST_; 785 ret = smsc95xx_write_reg(dev, PM_CTRL, write_buf); 786 if (ret < 0) { 787 netdev_warn(dev->net, "Failed to write PM_CTRL: %d\n", ret); 788 return ret; 789 } 790 791 timeout = 0; 792 do { 793 ret = smsc95xx_read_reg(dev, PM_CTRL, &read_buf); 794 if (ret < 0) { 795 netdev_warn(dev->net, "Failed to read PM_CTRL: %d\n", ret); 796 return ret; 797 } 798 msleep(10); 799 timeout++; 800 } while ((read_buf & PM_CTL_PHY_RST_) && (timeout < 100)); 801 802 if (timeout >= 100) { 803 netdev_warn(dev->net, "timeout waiting for PHY Reset\n"); 804 return ret; 805 } 806 807 smsc95xx_init_mac_address(dev); 808 809 ret = smsc95xx_set_mac_address(dev); 810 if (ret < 0) 811 return ret; 812 813 netif_dbg(dev, ifup, dev->net, 814 "MAC Address: %pM\n", dev->net->dev_addr); 815 816 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 817 if (ret < 0) { 818 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 819 return ret; 820 } 821 822 netif_dbg(dev, ifup, dev->net, 823 "Read Value from HW_CFG : 0x%08x\n", read_buf); 824 825 read_buf |= HW_CFG_BIR_; 826 827 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 828 if (ret < 0) { 829 netdev_warn(dev->net, "Failed to write HW_CFG_BIR_ bit in HW_CFG register, ret = %d\n", 830 ret); 831 return ret; 832 } 833 834 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 835 if (ret < 0) { 836 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 837 return ret; 838 } 839 netif_dbg(dev, ifup, dev->net, 840 "Read Value from HW_CFG after writing HW_CFG_BIR_: 0x%08x\n", 841 read_buf); 842 843 if (!turbo_mode) { 844 burst_cap = 0; 845 dev->rx_urb_size = MAX_SINGLE_PACKET_SIZE; 846 } else if (dev->udev->speed == USB_SPEED_HIGH) { 847 burst_cap = DEFAULT_HS_BURST_CAP_SIZE / HS_USB_PKT_SIZE; 848 dev->rx_urb_size = DEFAULT_HS_BURST_CAP_SIZE; 849 } else { 850 burst_cap = DEFAULT_FS_BURST_CAP_SIZE / FS_USB_PKT_SIZE; 851 dev->rx_urb_size = DEFAULT_FS_BURST_CAP_SIZE; 852 } 853 854 netif_dbg(dev, ifup, dev->net, 855 "rx_urb_size=%ld\n", (ulong)dev->rx_urb_size); 856 857 ret = smsc95xx_write_reg(dev, BURST_CAP, burst_cap); 858 if (ret < 0) { 859 netdev_warn(dev->net, "Failed to write BURST_CAP: %d\n", ret); 860 return ret; 861 } 862 863 ret = smsc95xx_read_reg(dev, BURST_CAP, &read_buf); 864 if (ret < 0) { 865 netdev_warn(dev->net, "Failed to read BURST_CAP: %d\n", ret); 866 return ret; 867 } 868 netif_dbg(dev, ifup, dev->net, 869 "Read Value from BURST_CAP after writing: 0x%08x\n", 870 read_buf); 871 872 read_buf = DEFAULT_BULK_IN_DELAY; 873 ret = smsc95xx_write_reg(dev, BULK_IN_DLY, read_buf); 874 if (ret < 0) { 875 netdev_warn(dev->net, "ret = %d\n", ret); 876 return ret; 877 } 878 879 ret = smsc95xx_read_reg(dev, BULK_IN_DLY, &read_buf); 880 if (ret < 0) { 881 netdev_warn(dev->net, "Failed to read BULK_IN_DLY: %d\n", ret); 882 return ret; 883 } 884 netif_dbg(dev, ifup, dev->net, 885 "Read Value from BULK_IN_DLY after writing: 0x%08x\n", 886 read_buf); 887 888 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 889 if (ret < 0) { 890 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 891 return ret; 892 } 893 netif_dbg(dev, ifup, dev->net, 894 "Read Value from HW_CFG: 0x%08x\n", read_buf); 895 896 if (turbo_mode) 897 read_buf |= (HW_CFG_MEF_ | HW_CFG_BCE_); 898 899 read_buf &= ~HW_CFG_RXDOFF_; 900 901 /* set Rx data offset=2, Make IP header aligns on word boundary. */ 902 read_buf |= NET_IP_ALIGN << 9; 903 904 ret = smsc95xx_write_reg(dev, HW_CFG, read_buf); 905 if (ret < 0) { 906 netdev_warn(dev->net, "Failed to write HW_CFG register, ret=%d\n", 907 ret); 908 return ret; 909 } 910 911 ret = smsc95xx_read_reg(dev, HW_CFG, &read_buf); 912 if (ret < 0) { 913 netdev_warn(dev->net, "Failed to read HW_CFG: %d\n", ret); 914 return ret; 915 } 916 netif_dbg(dev, ifup, dev->net, 917 "Read Value from HW_CFG after writing: 0x%08x\n", read_buf); 918 919 write_buf = 0xFFFFFFFF; 920 ret = smsc95xx_write_reg(dev, INT_STS, write_buf); 921 if (ret < 0) { 922 netdev_warn(dev->net, "Failed to write INT_STS register, ret=%d\n", 923 ret); 924 return ret; 925 } 926 927 ret = smsc95xx_read_reg(dev, ID_REV, &read_buf); 928 if (ret < 0) { 929 netdev_warn(dev->net, "Failed to read ID_REV: %d\n", ret); 930 return ret; 931 } 932 netif_dbg(dev, ifup, dev->net, "ID_REV = 0x%08x\n", read_buf); 933 934 /* Configure GPIO pins as LED outputs */ 935 write_buf = LED_GPIO_CFG_SPD_LED | LED_GPIO_CFG_LNK_LED | 936 LED_GPIO_CFG_FDX_LED; 937 ret = smsc95xx_write_reg(dev, LED_GPIO_CFG, write_buf); 938 if (ret < 0) { 939 netdev_warn(dev->net, "Failed to write LED_GPIO_CFG register, ret=%d\n", 940 ret); 941 return ret; 942 } 943 944 /* Init Tx */ 945 write_buf = 0; 946 ret = smsc95xx_write_reg(dev, FLOW, write_buf); 947 if (ret < 0) { 948 netdev_warn(dev->net, "Failed to write FLOW: %d\n", ret); 949 return ret; 950 } 951 952 read_buf = AFC_CFG_DEFAULT; 953 ret = smsc95xx_write_reg(dev, AFC_CFG, read_buf); 954 if (ret < 0) { 955 netdev_warn(dev->net, "Failed to write AFC_CFG: %d\n", ret); 956 return ret; 957 } 958 959 /* Don't need mac_cr_lock during initialisation */ 960 ret = smsc95xx_read_reg(dev, MAC_CR, &pdata->mac_cr); 961 if (ret < 0) { 962 netdev_warn(dev->net, "Failed to read MAC_CR: %d\n", ret); 963 return ret; 964 } 965 966 /* Init Rx */ 967 /* Set Vlan */ 968 write_buf = (u32)ETH_P_8021Q; 969 ret = smsc95xx_write_reg(dev, VLAN1, write_buf); 970 if (ret < 0) { 971 netdev_warn(dev->net, "Failed to write VAN1: %d\n", ret); 972 return ret; 973 } 974 975 /* Enable or disable checksum offload engines */ 976 ethtool_op_set_tx_hw_csum(netdev, pdata->use_tx_csum); 977 ret = smsc95xx_set_csums(dev); 978 if (ret < 0) { 979 netdev_warn(dev->net, "Failed to set csum offload: %d\n", ret); 980 return ret; 981 } 982 983 smsc95xx_set_multicast(dev->net); 984 985 if (smsc95xx_phy_initialize(dev) < 0) 986 return -EIO; 987 988 ret = smsc95xx_read_reg(dev, INT_EP_CTL, &read_buf); 989 if (ret < 0) { 990 netdev_warn(dev->net, "Failed to read INT_EP_CTL: %d\n", ret); 991 return ret; 992 } 993 994 /* enable PHY interrupts */ 995 read_buf |= INT_EP_CTL_PHY_INT_; 996 997 ret = smsc95xx_write_reg(dev, INT_EP_CTL, read_buf); 998 if (ret < 0) { 999 netdev_warn(dev->net, "Failed to write INT_EP_CTL: %d\n", ret); 1000 return ret; 1001 } 1002 1003 smsc95xx_start_tx_path(dev); 1004 smsc95xx_start_rx_path(dev); 1005 1006 netif_dbg(dev, ifup, dev->net, "smsc95xx_reset, return 0\n"); 1007 return 0; 1008 } 1009 1010 static const struct net_device_ops smsc95xx_netdev_ops = { 1011 .ndo_open = usbnet_open, 1012 .ndo_stop = usbnet_stop, 1013 .ndo_start_xmit = usbnet_start_xmit, 1014 .ndo_tx_timeout = usbnet_tx_timeout, 1015 .ndo_change_mtu = usbnet_change_mtu, 1016 .ndo_set_mac_address = eth_mac_addr, 1017 .ndo_validate_addr = eth_validate_addr, 1018 .ndo_do_ioctl = smsc95xx_ioctl, 1019 .ndo_set_multicast_list = smsc95xx_set_multicast, 1020 }; 1021 1022 static int smsc95xx_bind(struct usbnet *dev, struct usb_interface *intf) 1023 { 1024 struct smsc95xx_priv *pdata = NULL; 1025 int ret; 1026 1027 printk(KERN_INFO SMSC_CHIPNAME " v" SMSC_DRIVER_VERSION "\n"); 1028 1029 ret = usbnet_get_endpoints(dev, intf); 1030 if (ret < 0) { 1031 netdev_warn(dev->net, "usbnet_get_endpoints failed: %d\n", ret); 1032 return ret; 1033 } 1034 1035 dev->data[0] = (unsigned long)kzalloc(sizeof(struct smsc95xx_priv), 1036 GFP_KERNEL); 1037 1038 pdata = (struct smsc95xx_priv *)(dev->data[0]); 1039 if (!pdata) { 1040 netdev_warn(dev->net, "Unable to allocate struct smsc95xx_priv\n"); 1041 return -ENOMEM; 1042 } 1043 1044 spin_lock_init(&pdata->mac_cr_lock); 1045 1046 pdata->use_tx_csum = DEFAULT_TX_CSUM_ENABLE; 1047 pdata->use_rx_csum = DEFAULT_RX_CSUM_ENABLE; 1048 1049 /* Init all registers */ 1050 ret = smsc95xx_reset(dev); 1051 1052 dev->net->netdev_ops = &smsc95xx_netdev_ops; 1053 dev->net->ethtool_ops = &smsc95xx_ethtool_ops; 1054 dev->net->flags |= IFF_MULTICAST; 1055 dev->net->hard_header_len += SMSC95XX_TX_OVERHEAD; 1056 return 0; 1057 } 1058 1059 static void smsc95xx_unbind(struct usbnet *dev, struct usb_interface *intf) 1060 { 1061 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1062 if (pdata) { 1063 netif_dbg(dev, ifdown, dev->net, "free pdata\n"); 1064 kfree(pdata); 1065 pdata = NULL; 1066 dev->data[0] = 0; 1067 } 1068 } 1069 1070 static void smsc95xx_rx_csum_offload(struct sk_buff *skb) 1071 { 1072 skb->csum = *(u16 *)(skb_tail_pointer(skb) - 2); 1073 skb->ip_summed = CHECKSUM_COMPLETE; 1074 skb_trim(skb, skb->len - 2); 1075 } 1076 1077 static int smsc95xx_rx_fixup(struct usbnet *dev, struct sk_buff *skb) 1078 { 1079 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1080 1081 while (skb->len > 0) { 1082 u32 header, align_count; 1083 struct sk_buff *ax_skb; 1084 unsigned char *packet; 1085 u16 size; 1086 1087 memcpy(&header, skb->data, sizeof(header)); 1088 le32_to_cpus(&header); 1089 skb_pull(skb, 4 + NET_IP_ALIGN); 1090 packet = skb->data; 1091 1092 /* get the packet length */ 1093 size = (u16)((header & RX_STS_FL_) >> 16); 1094 align_count = (4 - ((size + NET_IP_ALIGN) % 4)) % 4; 1095 1096 if (unlikely(header & RX_STS_ES_)) { 1097 netif_dbg(dev, rx_err, dev->net, 1098 "Error header=0x%08x\n", header); 1099 dev->net->stats.rx_errors++; 1100 dev->net->stats.rx_dropped++; 1101 1102 if (header & RX_STS_CRC_) { 1103 dev->net->stats.rx_crc_errors++; 1104 } else { 1105 if (header & (RX_STS_TL_ | RX_STS_RF_)) 1106 dev->net->stats.rx_frame_errors++; 1107 1108 if ((header & RX_STS_LE_) && 1109 (!(header & RX_STS_FT_))) 1110 dev->net->stats.rx_length_errors++; 1111 } 1112 } else { 1113 /* ETH_FRAME_LEN + 4(CRC) + 2(COE) + 4(Vlan) */ 1114 if (unlikely(size > (ETH_FRAME_LEN + 12))) { 1115 netif_dbg(dev, rx_err, dev->net, 1116 "size err header=0x%08x\n", header); 1117 return 0; 1118 } 1119 1120 /* last frame in this batch */ 1121 if (skb->len == size) { 1122 if (pdata->use_rx_csum) 1123 smsc95xx_rx_csum_offload(skb); 1124 skb_trim(skb, skb->len - 4); /* remove fcs */ 1125 skb->truesize = size + sizeof(struct sk_buff); 1126 1127 return 1; 1128 } 1129 1130 ax_skb = skb_clone(skb, GFP_ATOMIC); 1131 if (unlikely(!ax_skb)) { 1132 netdev_warn(dev->net, "Error allocating skb\n"); 1133 return 0; 1134 } 1135 1136 ax_skb->len = size; 1137 ax_skb->data = packet; 1138 skb_set_tail_pointer(ax_skb, size); 1139 1140 if (pdata->use_rx_csum) 1141 smsc95xx_rx_csum_offload(ax_skb); 1142 skb_trim(ax_skb, ax_skb->len - 4); /* remove fcs */ 1143 ax_skb->truesize = size + sizeof(struct sk_buff); 1144 1145 usbnet_skb_return(dev, ax_skb); 1146 } 1147 1148 skb_pull(skb, size); 1149 1150 /* padding bytes before the next frame starts */ 1151 if (skb->len) 1152 skb_pull(skb, align_count); 1153 } 1154 1155 if (unlikely(skb->len < 0)) { 1156 netdev_warn(dev->net, "invalid rx length<0 %d\n", skb->len); 1157 return 0; 1158 } 1159 1160 return 1; 1161 } 1162 1163 static u32 smsc95xx_calc_csum_preamble(struct sk_buff *skb) 1164 { 1165 int len = skb->data - skb->head; 1166 u16 high_16 = (u16)(skb->csum_offset + skb->csum_start - len); 1167 u16 low_16 = (u16)(skb->csum_start - len); 1168 return (high_16 << 16) | low_16; 1169 } 1170 1171 static struct sk_buff *smsc95xx_tx_fixup(struct usbnet *dev, 1172 struct sk_buff *skb, gfp_t flags) 1173 { 1174 struct smsc95xx_priv *pdata = (struct smsc95xx_priv *)(dev->data[0]); 1175 bool csum = pdata->use_tx_csum && (skb->ip_summed == CHECKSUM_PARTIAL); 1176 int overhead = csum ? SMSC95XX_TX_OVERHEAD_CSUM : SMSC95XX_TX_OVERHEAD; 1177 u32 tx_cmd_a, tx_cmd_b; 1178 1179 /* We do not advertise SG, so skbs should be already linearized */ 1180 BUG_ON(skb_shinfo(skb)->nr_frags); 1181 1182 if (skb_headroom(skb) < overhead) { 1183 struct sk_buff *skb2 = skb_copy_expand(skb, 1184 overhead, 0, flags); 1185 dev_kfree_skb_any(skb); 1186 skb = skb2; 1187 if (!skb) 1188 return NULL; 1189 } 1190 1191 if (csum) { 1192 u32 csum_preamble = smsc95xx_calc_csum_preamble(skb); 1193 skb_push(skb, 4); 1194 memcpy(skb->data, &csum_preamble, 4); 1195 } 1196 1197 skb_push(skb, 4); 1198 tx_cmd_b = (u32)(skb->len - 4); 1199 if (csum) 1200 tx_cmd_b |= TX_CMD_B_CSUM_ENABLE; 1201 cpu_to_le32s(&tx_cmd_b); 1202 memcpy(skb->data, &tx_cmd_b, 4); 1203 1204 skb_push(skb, 4); 1205 tx_cmd_a = (u32)(skb->len - 8) | TX_CMD_A_FIRST_SEG_ | 1206 TX_CMD_A_LAST_SEG_; 1207 cpu_to_le32s(&tx_cmd_a); 1208 memcpy(skb->data, &tx_cmd_a, 4); 1209 1210 return skb; 1211 } 1212 1213 static const struct driver_info smsc95xx_info = { 1214 .description = "smsc95xx USB 2.0 Ethernet", 1215 .bind = smsc95xx_bind, 1216 .unbind = smsc95xx_unbind, 1217 .link_reset = smsc95xx_link_reset, 1218 .reset = smsc95xx_reset, 1219 .rx_fixup = smsc95xx_rx_fixup, 1220 .tx_fixup = smsc95xx_tx_fixup, 1221 .status = smsc95xx_status, 1222 .flags = FLAG_ETHER | FLAG_SEND_ZLP, 1223 }; 1224 1225 static const struct usb_device_id products[] = { 1226 { 1227 /* SMSC9500 USB Ethernet Device */ 1228 USB_DEVICE(0x0424, 0x9500), 1229 .driver_info = (unsigned long) &smsc95xx_info, 1230 }, 1231 { 1232 /* SMSC9505 USB Ethernet Device */ 1233 USB_DEVICE(0x0424, 0x9505), 1234 .driver_info = (unsigned long) &smsc95xx_info, 1235 }, 1236 { 1237 /* SMSC9500A USB Ethernet Device */ 1238 USB_DEVICE(0x0424, 0x9E00), 1239 .driver_info = (unsigned long) &smsc95xx_info, 1240 }, 1241 { 1242 /* SMSC9505A USB Ethernet Device */ 1243 USB_DEVICE(0x0424, 0x9E01), 1244 .driver_info = (unsigned long) &smsc95xx_info, 1245 }, 1246 { 1247 /* SMSC9512/9514 USB Hub & Ethernet Device */ 1248 USB_DEVICE(0x0424, 0xec00), 1249 .driver_info = (unsigned long) &smsc95xx_info, 1250 }, 1251 { 1252 /* SMSC9500 USB Ethernet Device (SAL10) */ 1253 USB_DEVICE(0x0424, 0x9900), 1254 .driver_info = (unsigned long) &smsc95xx_info, 1255 }, 1256 { 1257 /* SMSC9505 USB Ethernet Device (SAL10) */ 1258 USB_DEVICE(0x0424, 0x9901), 1259 .driver_info = (unsigned long) &smsc95xx_info, 1260 }, 1261 { 1262 /* SMSC9500A USB Ethernet Device (SAL10) */ 1263 USB_DEVICE(0x0424, 0x9902), 1264 .driver_info = (unsigned long) &smsc95xx_info, 1265 }, 1266 { 1267 /* SMSC9505A USB Ethernet Device (SAL10) */ 1268 USB_DEVICE(0x0424, 0x9903), 1269 .driver_info = (unsigned long) &smsc95xx_info, 1270 }, 1271 { 1272 /* SMSC9512/9514 USB Hub & Ethernet Device (SAL10) */ 1273 USB_DEVICE(0x0424, 0x9904), 1274 .driver_info = (unsigned long) &smsc95xx_info, 1275 }, 1276 { 1277 /* SMSC9500A USB Ethernet Device (HAL) */ 1278 USB_DEVICE(0x0424, 0x9905), 1279 .driver_info = (unsigned long) &smsc95xx_info, 1280 }, 1281 { 1282 /* SMSC9505A USB Ethernet Device (HAL) */ 1283 USB_DEVICE(0x0424, 0x9906), 1284 .driver_info = (unsigned long) &smsc95xx_info, 1285 }, 1286 { 1287 /* SMSC9500 USB Ethernet Device (Alternate ID) */ 1288 USB_DEVICE(0x0424, 0x9907), 1289 .driver_info = (unsigned long) &smsc95xx_info, 1290 }, 1291 { 1292 /* SMSC9500A USB Ethernet Device (Alternate ID) */ 1293 USB_DEVICE(0x0424, 0x9908), 1294 .driver_info = (unsigned long) &smsc95xx_info, 1295 }, 1296 { 1297 /* SMSC9512/9514 USB Hub & Ethernet Device (Alternate ID) */ 1298 USB_DEVICE(0x0424, 0x9909), 1299 .driver_info = (unsigned long) &smsc95xx_info, 1300 }, 1301 { }, /* END */ 1302 }; 1303 MODULE_DEVICE_TABLE(usb, products); 1304 1305 static struct usb_driver smsc95xx_driver = { 1306 .name = "smsc95xx", 1307 .id_table = products, 1308 .probe = usbnet_probe, 1309 .suspend = usbnet_suspend, 1310 .resume = usbnet_resume, 1311 .disconnect = usbnet_disconnect, 1312 }; 1313 1314 static int __init smsc95xx_init(void) 1315 { 1316 return usb_register(&smsc95xx_driver); 1317 } 1318 module_init(smsc95xx_init); 1319 1320 static void __exit smsc95xx_exit(void) 1321 { 1322 usb_deregister(&smsc95xx_driver); 1323 } 1324 module_exit(smsc95xx_exit); 1325 1326 MODULE_AUTHOR("Nancy Lin"); 1327 MODULE_AUTHOR("Steve Glendinning <steve.glendinning@smsc.com>"); 1328 MODULE_DESCRIPTION("SMSC95XX USB 2.0 Ethernet Devices"); 1329 MODULE_LICENSE("GPL"); 1330