chip.c (7b314362a2344feaafbdf6aa8f3d57077728e37a) chip.c (2bbb33be037361882527c9c762cb9fc928ab0ff7)
1/*
2 * Marvell 88e6xxx Ethernet switch single-chip support
3 *
4 * Copyright (c) 2008 Marvell Semiconductor
5 *
6 * Copyright (c) 2015 CMC Electronics, Inc.
7 * Added support for VLAN Table Unit operations
8 *

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2478 if (mv88e6xxx_6352_family(chip) || mv88e6xxx_6351_family(chip) ||
2479 mv88e6xxx_6165_family(chip) || mv88e6xxx_6097_family(chip) ||
2480 mv88e6xxx_6095_family(chip) || mv88e6xxx_6065_family(chip) ||
2481 mv88e6xxx_6185_family(chip) || mv88e6xxx_6320_family(chip))
2482 reg = PORT_CONTROL_IGMP_MLD_SNOOP |
2483 PORT_CONTROL_USE_TAG | PORT_CONTROL_USE_IP |
2484 PORT_CONTROL_STATE_FORWARDING;
2485 if (dsa_is_cpu_port(ds, port)) {
1/*
2 * Marvell 88e6xxx Ethernet switch single-chip support
3 *
4 * Copyright (c) 2008 Marvell Semiconductor
5 *
6 * Copyright (c) 2015 CMC Electronics, Inc.
7 * Added support for VLAN Table Unit operations
8 *

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2478 if (mv88e6xxx_6352_family(chip) || mv88e6xxx_6351_family(chip) ||
2479 mv88e6xxx_6165_family(chip) || mv88e6xxx_6097_family(chip) ||
2480 mv88e6xxx_6095_family(chip) || mv88e6xxx_6065_family(chip) ||
2481 mv88e6xxx_6185_family(chip) || mv88e6xxx_6320_family(chip))
2482 reg = PORT_CONTROL_IGMP_MLD_SNOOP |
2483 PORT_CONTROL_USE_TAG | PORT_CONTROL_USE_IP |
2484 PORT_CONTROL_STATE_FORWARDING;
2485 if (dsa_is_cpu_port(ds, port)) {
2486 if (mv88e6xxx_6095_family(chip) || mv88e6xxx_6185_family(chip))
2487 reg |= PORT_CONTROL_DSA_TAG;
2488 if (mv88e6xxx_6352_family(chip) ||
2489 mv88e6xxx_6351_family(chip) ||
2490 mv88e6xxx_6165_family(chip) ||
2491 mv88e6xxx_6097_family(chip) ||
2492 mv88e6xxx_6320_family(chip)) {
2486 if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_EDSA))
2493 reg |= PORT_CONTROL_FRAME_ETHER_TYPE_DSA |
2494 PORT_CONTROL_FORWARD_UNKNOWN |
2495 PORT_CONTROL_FORWARD_UNKNOWN_MC;
2487 reg |= PORT_CONTROL_FRAME_ETHER_TYPE_DSA |
2488 PORT_CONTROL_FORWARD_UNKNOWN |
2489 PORT_CONTROL_FORWARD_UNKNOWN_MC;
2496 }
2497
2498 if (mv88e6xxx_6352_family(chip) ||
2499 mv88e6xxx_6351_family(chip) ||
2500 mv88e6xxx_6165_family(chip) ||
2501 mv88e6xxx_6097_family(chip) ||
2502 mv88e6xxx_6095_family(chip) ||
2503 mv88e6xxx_6065_family(chip) ||
2504 mv88e6xxx_6185_family(chip) ||
2505 mv88e6xxx_6320_family(chip)) {
2506 reg |= PORT_CONTROL_EGRESS_ADD_TAG;
2507 }
2490 else
2491 reg |= PORT_CONTROL_DSA_TAG;
2492 reg |= PORT_CONTROL_EGRESS_ADD_TAG;
2508 }
2509 if (dsa_is_dsa_port(ds, port)) {
2510 if (mv88e6xxx_6095_family(chip) ||
2511 mv88e6xxx_6185_family(chip))
2512 reg |= PORT_CONTROL_DSA_TAG;
2513 if (mv88e6xxx_6352_family(chip) ||
2514 mv88e6xxx_6351_family(chip) ||
2515 mv88e6xxx_6165_family(chip) ||

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2627 ret = _mv88e6xxx_reg_write(chip, REG_PORT(port),
2628 PORT_PRI_OVERRIDE, 0x0000);
2629 if (ret)
2630 return ret;
2631
2632 /* Port Ethertype: use the Ethertype DSA Ethertype
2633 * value.
2634 */
2493 }
2494 if (dsa_is_dsa_port(ds, port)) {
2495 if (mv88e6xxx_6095_family(chip) ||
2496 mv88e6xxx_6185_family(chip))
2497 reg |= PORT_CONTROL_DSA_TAG;
2498 if (mv88e6xxx_6352_family(chip) ||
2499 mv88e6xxx_6351_family(chip) ||
2500 mv88e6xxx_6165_family(chip) ||

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2612 ret = _mv88e6xxx_reg_write(chip, REG_PORT(port),
2613 PORT_PRI_OVERRIDE, 0x0000);
2614 if (ret)
2615 return ret;
2616
2617 /* Port Ethertype: use the Ethertype DSA Ethertype
2618 * value.
2619 */
2635 ret = _mv88e6xxx_reg_write(chip, REG_PORT(port),
2636 PORT_ETH_TYPE, ETH_P_EDSA);
2637 if (ret)
2638 return ret;
2620 if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_EDSA)) {
2621 ret = _mv88e6xxx_reg_write(chip, REG_PORT(port),
2622 PORT_ETH_TYPE, ETH_P_EDSA);
2623 if (ret)
2624 return ret;
2625 }
2626
2639 /* Tag Remap: use an identity 802.1p prio -> switch
2640 * prio mapping.
2641 */
2642 ret = _mv88e6xxx_reg_write(chip, REG_PORT(port),
2643 PORT_TAG_REGMAP_0123, 0x3210);
2644 if (ret)
2645 return ret;
2646

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3921 chip->bus = bus;
3922 chip->sw_addr = sw_addr;
3923
3924 return 0;
3925}
3926
3927static enum dsa_tag_protocol mv88e6xxx_get_tag_protocol(struct dsa_switch *ds)
3928{
2627 /* Tag Remap: use an identity 802.1p prio -> switch
2628 * prio mapping.
2629 */
2630 ret = _mv88e6xxx_reg_write(chip, REG_PORT(port),
2631 PORT_TAG_REGMAP_0123, 0x3210);
2632 if (ret)
2633 return ret;
2634

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3909 chip->bus = bus;
3910 chip->sw_addr = sw_addr;
3911
3912 return 0;
3913}
3914
3915static enum dsa_tag_protocol mv88e6xxx_get_tag_protocol(struct dsa_switch *ds)
3916{
3929 return DSA_TAG_PROTO_EDSA;
3917 struct mv88e6xxx_chip *chip = ds_to_priv(ds);
3918
3919 if (mv88e6xxx_has(chip, MV88E6XXX_FLAG_EDSA))
3920 return DSA_TAG_PROTO_EDSA;
3921
3922 return DSA_TAG_PROTO_DSA;
3930}
3931
3932static const char *mv88e6xxx_drv_probe(struct device *dsa_dev,
3933 struct device *host_dev, int sw_addr,
3934 void **priv)
3935{
3936 struct mv88e6xxx_chip *chip;
3937 struct mii_bus *bus;

--- 192 unchanged lines hidden --- 		3923}
3924
3925static const char *mv88e6xxx_drv_probe(struct device *dsa_dev,
3926 struct device *host_dev, int sw_addr,
3927 void **priv)
3928{
3929 struct mv88e6xxx_chip *chip;
3930 struct mii_bus *bus;

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