main.c (a22ed86cff363b2fdcdcd70e2412d8fc14ce905f) main.c (e1f24a79f424ddb03828de7c0152668c9a30146e)
1/*
2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:

--- 43 unchanged lines hidden (view full) ---

52#include <linux/list.h>
53#include <rdma/ib_smi.h>
54#include <rdma/ib_umem.h>
55#include <linux/in.h>
56#include <linux/etherdevice.h>
57#include <linux/mlx5/fs.h>
58#include <linux/mlx5/vport.h>
59#include "mlx5_ib.h"
1/*
2 * Copyright (c) 2013-2015, Mellanox Technologies. All rights reserved.
3 *
4 * This software is available to you under a choice of one of two
5 * licenses. You may choose to be licensed under the terms of the GNU
6 * General Public License (GPL) Version 2, available from the file
7 * COPYING in the main directory of this source tree, or the
8 * OpenIB.org BSD license below:

--- 43 unchanged lines hidden (view full) ---

52#include <linux/list.h>
53#include <rdma/ib_smi.h>
54#include <rdma/ib_umem.h>
55#include <linux/in.h>
56#include <linux/etherdevice.h>
57#include <linux/mlx5/fs.h>
58#include <linux/mlx5/vport.h>
59#include "mlx5_ib.h"
60#include "cmd.h"
60
61#define DRIVER_NAME "mlx5_ib"
62#define DRIVER_VERSION "2.2-1"
63#define DRIVER_RELDATE "Feb 2014"
64
65MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
66MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver");
67MODULE_LICENSE("Dual BSD/GPL");

--- 3140 unchanged lines hidden (view full) ---

3208
3209static void mlx5_disable_eth(struct mlx5_ib_dev *dev)
3210{
3211 mlx5_eth_lag_cleanup(dev);
3212 if (MLX5_CAP_GEN(dev->mdev, roce))
3213 mlx5_nic_vport_disable_roce(dev->mdev);
3214}
3215
61
62#define DRIVER_NAME "mlx5_ib"
63#define DRIVER_VERSION "2.2-1"
64#define DRIVER_RELDATE "Feb 2014"
65
66MODULE_AUTHOR("Eli Cohen <eli@mellanox.com>");
67MODULE_DESCRIPTION("Mellanox Connect-IB HCA IB driver");
68MODULE_LICENSE("Dual BSD/GPL");

--- 3140 unchanged lines hidden (view full) ---

3209
3210static void mlx5_disable_eth(struct mlx5_ib_dev *dev)
3211{
3212 mlx5_eth_lag_cleanup(dev);
3213 if (MLX5_CAP_GEN(dev->mdev, roce))
3214 mlx5_nic_vport_disable_roce(dev->mdev);
3215}
3216
3216struct mlx5_ib_q_counter {
3217struct mlx5_ib_counter {
3217 const char *name;
3218 size_t offset;
3219};
3220
3221#define INIT_Q_COUNTER(_name) \
3222 { .name = #_name, .offset = MLX5_BYTE_OFF(query_q_counter_out, _name)}
3223
3218 const char *name;
3219 size_t offset;
3220};
3221
3222#define INIT_Q_COUNTER(_name) \
3223 { .name = #_name, .offset = MLX5_BYTE_OFF(query_q_counter_out, _name)}
3224
3224static const struct mlx5_ib_q_counter basic_q_cnts[] = {
3225static const struct mlx5_ib_counter basic_q_cnts[] = {
3225 INIT_Q_COUNTER(rx_write_requests),
3226 INIT_Q_COUNTER(rx_read_requests),
3227 INIT_Q_COUNTER(rx_atomic_requests),
3228 INIT_Q_COUNTER(out_of_buffer),
3229};
3230
3226 INIT_Q_COUNTER(rx_write_requests),
3227 INIT_Q_COUNTER(rx_read_requests),
3228 INIT_Q_COUNTER(rx_atomic_requests),
3229 INIT_Q_COUNTER(out_of_buffer),
3230};
3231
3231static const struct mlx5_ib_q_counter out_of_seq_q_cnts[] = {
3232static const struct mlx5_ib_counter out_of_seq_q_cnts[] = {
3232 INIT_Q_COUNTER(out_of_sequence),
3233};
3234
3233 INIT_Q_COUNTER(out_of_sequence),
3234};
3235
3235static const struct mlx5_ib_q_counter retrans_q_cnts[] = {
3236static const struct mlx5_ib_counter retrans_q_cnts[] = {
3236 INIT_Q_COUNTER(duplicate_request),
3237 INIT_Q_COUNTER(rnr_nak_retry_err),
3238 INIT_Q_COUNTER(packet_seq_err),
3239 INIT_Q_COUNTER(implied_nak_seq_err),
3240 INIT_Q_COUNTER(local_ack_timeout_err),
3241};
3242
3237 INIT_Q_COUNTER(duplicate_request),
3238 INIT_Q_COUNTER(rnr_nak_retry_err),
3239 INIT_Q_COUNTER(packet_seq_err),
3240 INIT_Q_COUNTER(implied_nak_seq_err),
3241 INIT_Q_COUNTER(local_ack_timeout_err),
3242};
3243
3243static void mlx5_ib_dealloc_q_counters(struct mlx5_ib_dev *dev)
3244#define INIT_CONG_COUNTER(_name) \
3245 { .name = #_name, .offset = \
3246 MLX5_BYTE_OFF(query_cong_statistics_out, _name ## _high)}
3247
3248static const struct mlx5_ib_counter cong_cnts[] = {
3249 INIT_CONG_COUNTER(rp_cnp_ignored),
3250 INIT_CONG_COUNTER(rp_cnp_handled),
3251 INIT_CONG_COUNTER(np_ecn_marked_roce_packets),
3252 INIT_CONG_COUNTER(np_cnp_sent),
3253};
3254
3255static void mlx5_ib_dealloc_counters(struct mlx5_ib_dev *dev)
3244{
3245 unsigned int i;
3246
3247 for (i = 0; i < dev->num_ports; i++) {
3248 mlx5_core_dealloc_q_counter(dev->mdev,
3256{
3257 unsigned int i;
3258
3259 for (i = 0; i < dev->num_ports; i++) {
3260 mlx5_core_dealloc_q_counter(dev->mdev,
3249 dev->port[i].q_cnts.set_id);
3250 kfree(dev->port[i].q_cnts.names);
3251 kfree(dev->port[i].q_cnts.offsets);
3261 dev->port[i].cnts.set_id);
3262 kfree(dev->port[i].cnts.names);
3263 kfree(dev->port[i].cnts.offsets);
3252 }
3253}
3254
3264 }
3265}
3266
3255static int __mlx5_ib_alloc_q_counters(struct mlx5_ib_dev *dev,
3256 const char ***names,
3257 size_t **offsets,
3258 u32 *num)
3267static int __mlx5_ib_alloc_counters(struct mlx5_ib_dev *dev,
3268 struct mlx5_ib_counters *cnts)
3259{
3260 u32 num_counters;
3261
3262 num_counters = ARRAY_SIZE(basic_q_cnts);
3263
3264 if (MLX5_CAP_GEN(dev->mdev, out_of_seq_cnt))
3265 num_counters += ARRAY_SIZE(out_of_seq_q_cnts);
3266
3267 if (MLX5_CAP_GEN(dev->mdev, retransmission_q_counters))
3268 num_counters += ARRAY_SIZE(retrans_q_cnts);
3269{
3270 u32 num_counters;
3271
3272 num_counters = ARRAY_SIZE(basic_q_cnts);
3273
3274 if (MLX5_CAP_GEN(dev->mdev, out_of_seq_cnt))
3275 num_counters += ARRAY_SIZE(out_of_seq_q_cnts);
3276
3277 if (MLX5_CAP_GEN(dev->mdev, retransmission_q_counters))
3278 num_counters += ARRAY_SIZE(retrans_q_cnts);
3279 cnts->num_q_counters = num_counters;
3269
3280
3270 *names = kcalloc(num_counters, sizeof(**names), GFP_KERNEL);
3271 if (!*names)
3281 if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) {
3282 cnts->num_cong_counters = ARRAY_SIZE(cong_cnts);
3283 num_counters += ARRAY_SIZE(cong_cnts);
3284 }
3285
3286 cnts->names = kcalloc(num_counters, sizeof(cnts->names), GFP_KERNEL);
3287 if (!cnts->names)
3272 return -ENOMEM;
3273
3288 return -ENOMEM;
3289
3274 *offsets = kcalloc(num_counters, sizeof(**offsets), GFP_KERNEL);
3275 if (!*offsets)
3290 cnts->offsets = kcalloc(num_counters,
3291 sizeof(cnts->offsets), GFP_KERNEL);
3292 if (!cnts->offsets)
3276 goto err_names;
3277
3293 goto err_names;
3294
3278 *num = num_counters;
3279
3280 return 0;
3281
3282err_names:
3295 return 0;
3296
3297err_names:
3283 kfree(*names);
3298 kfree(cnts->names);
3284 return -ENOMEM;
3285}
3286
3299 return -ENOMEM;
3300}
3301
3287static void mlx5_ib_fill_q_counters(struct mlx5_ib_dev *dev,
3288 const char **names,
3289 size_t *offsets)
3302static void mlx5_ib_fill_counters(struct mlx5_ib_dev *dev,
3303 const char **names,
3304 size_t *offsets)
3290{
3291 int i;
3292 int j = 0;
3293
3294 for (i = 0; i < ARRAY_SIZE(basic_q_cnts); i++, j++) {
3295 names[j] = basic_q_cnts[i].name;
3296 offsets[j] = basic_q_cnts[i].offset;
3297 }

--- 6 unchanged lines hidden (view full) ---

3304 }
3305
3306 if (MLX5_CAP_GEN(dev->mdev, retransmission_q_counters)) {
3307 for (i = 0; i < ARRAY_SIZE(retrans_q_cnts); i++, j++) {
3308 names[j] = retrans_q_cnts[i].name;
3309 offsets[j] = retrans_q_cnts[i].offset;
3310 }
3311 }
3305{
3306 int i;
3307 int j = 0;
3308
3309 for (i = 0; i < ARRAY_SIZE(basic_q_cnts); i++, j++) {
3310 names[j] = basic_q_cnts[i].name;
3311 offsets[j] = basic_q_cnts[i].offset;
3312 }

--- 6 unchanged lines hidden (view full) ---

3319 }
3320
3321 if (MLX5_CAP_GEN(dev->mdev, retransmission_q_counters)) {
3322 for (i = 0; i < ARRAY_SIZE(retrans_q_cnts); i++, j++) {
3323 names[j] = retrans_q_cnts[i].name;
3324 offsets[j] = retrans_q_cnts[i].offset;
3325 }
3326 }
3327
3328 if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) {
3329 for (i = 0; i < ARRAY_SIZE(cong_cnts); i++, j++) {
3330 names[j] = cong_cnts[i].name;
3331 offsets[j] = cong_cnts[i].offset;
3332 }
3333 }
3312}
3313
3334}
3335
3314static int mlx5_ib_alloc_q_counters(struct mlx5_ib_dev *dev)
3336static int mlx5_ib_alloc_counters(struct mlx5_ib_dev *dev)
3315{
3316 int i;
3317 int ret;
3318
3319 for (i = 0; i < dev->num_ports; i++) {
3320 struct mlx5_ib_port *port = &dev->port[i];
3321
3322 ret = mlx5_core_alloc_q_counter(dev->mdev,
3337{
3338 int i;
3339 int ret;
3340
3341 for (i = 0; i < dev->num_ports; i++) {
3342 struct mlx5_ib_port *port = &dev->port[i];
3343
3344 ret = mlx5_core_alloc_q_counter(dev->mdev,
3323 &port->q_cnts.set_id);
3345 &port->cnts.set_id);
3324 if (ret) {
3325 mlx5_ib_warn(dev,
3326 "couldn't allocate queue counter for port %d, err %d\n",
3327 i + 1, ret);
3328 goto dealloc_counters;
3329 }
3330
3346 if (ret) {
3347 mlx5_ib_warn(dev,
3348 "couldn't allocate queue counter for port %d, err %d\n",
3349 i + 1, ret);
3350 goto dealloc_counters;
3351 }
3352
3331 ret = __mlx5_ib_alloc_q_counters(dev,
3332 &port->q_cnts.names,
3333 &port->q_cnts.offsets,
3334 &port->q_cnts.num_counters);
3353 ret = __mlx5_ib_alloc_counters(dev, &port->cnts);
3335 if (ret)
3336 goto dealloc_counters;
3337
3354 if (ret)
3355 goto dealloc_counters;
3356
3338 mlx5_ib_fill_q_counters(dev, port->q_cnts.names,
3339 port->q_cnts.offsets);
3357 mlx5_ib_fill_counters(dev, port->cnts.names,
3358 port->cnts.offsets);
3340 }
3341
3342 return 0;
3343
3344dealloc_counters:
3345 while (--i >= 0)
3346 mlx5_core_dealloc_q_counter(dev->mdev,
3359 }
3360
3361 return 0;
3362
3363dealloc_counters:
3364 while (--i >= 0)
3365 mlx5_core_dealloc_q_counter(dev->mdev,
3347 dev->port[i].q_cnts.set_id);
3366 dev->port[i].cnts.set_id);
3348
3349 return ret;
3350}
3351
3352static struct rdma_hw_stats *mlx5_ib_alloc_hw_stats(struct ib_device *ibdev,
3353 u8 port_num)
3354{
3355 struct mlx5_ib_dev *dev = to_mdev(ibdev);
3356 struct mlx5_ib_port *port = &dev->port[port_num - 1];
3357
3358 /* We support only per port stats */
3359 if (port_num == 0)
3360 return NULL;
3361
3367
3368 return ret;
3369}
3370
3371static struct rdma_hw_stats *mlx5_ib_alloc_hw_stats(struct ib_device *ibdev,
3372 u8 port_num)
3373{
3374 struct mlx5_ib_dev *dev = to_mdev(ibdev);
3375 struct mlx5_ib_port *port = &dev->port[port_num - 1];
3376
3377 /* We support only per port stats */
3378 if (port_num == 0)
3379 return NULL;
3380
3362 return rdma_alloc_hw_stats_struct(port->q_cnts.names,
3363 port->q_cnts.num_counters,
3381 return rdma_alloc_hw_stats_struct(port->cnts.names,
3382 port->cnts.num_q_counters +
3383 port->cnts.num_cong_counters,
3364 RDMA_HW_STATS_DEFAULT_LIFESPAN);
3365}
3366
3384 RDMA_HW_STATS_DEFAULT_LIFESPAN);
3385}
3386
3367static int mlx5_ib_get_hw_stats(struct ib_device *ibdev,
3368 struct rdma_hw_stats *stats,
3369 u8 port_num, int index)
3387static int mlx5_ib_query_q_counters(struct mlx5_ib_dev *dev,
3388 struct mlx5_ib_port *port,
3389 struct rdma_hw_stats *stats)
3370{
3390{
3371 struct mlx5_ib_dev *dev = to_mdev(ibdev);
3372 struct mlx5_ib_port *port = &dev->port[port_num - 1];
3373 int outlen = MLX5_ST_SZ_BYTES(query_q_counter_out);
3374 void *out;
3375 __be32 val;
3391 int outlen = MLX5_ST_SZ_BYTES(query_q_counter_out);
3392 void *out;
3393 __be32 val;
3376 int ret;
3377 int i;
3394 int ret, i;
3378
3395
3379 if (!stats)
3380 return -ENOSYS;
3381
3382 out = mlx5_vzalloc(outlen);
3383 if (!out)
3384 return -ENOMEM;
3385
3386 ret = mlx5_core_query_q_counter(dev->mdev,
3396 out = mlx5_vzalloc(outlen);
3397 if (!out)
3398 return -ENOMEM;
3399
3400 ret = mlx5_core_query_q_counter(dev->mdev,
3387 port->q_cnts.set_id, 0,
3401 port->cnts.set_id, 0,
3388 out, outlen);
3389 if (ret)
3390 goto free;
3391
3402 out, outlen);
3403 if (ret)
3404 goto free;
3405
3392 for (i = 0; i < port->q_cnts.num_counters; i++) {
3393 val = *(__be32 *)(out + port->q_cnts.offsets[i]);
3406 for (i = 0; i < port->cnts.num_q_counters; i++) {
3407 val = *(__be32 *)(out + port->cnts.offsets[i]);
3394 stats->value[i] = (u64)be32_to_cpu(val);
3395 }
3396
3397free:
3398 kvfree(out);
3408 stats->value[i] = (u64)be32_to_cpu(val);
3409 }
3410
3411free:
3412 kvfree(out);
3399 return port->q_cnts.num_counters;
3413 return ret;
3400}
3401
3414}
3415
3416static int mlx5_ib_query_cong_counters(struct mlx5_ib_dev *dev,
3417 struct mlx5_ib_port *port,
3418 struct rdma_hw_stats *stats)
3419{
3420 int outlen = MLX5_ST_SZ_BYTES(query_cong_statistics_out);
3421 void *out;
3422 int ret, i;
3423 int offset = port->cnts.num_q_counters;
3424
3425 out = mlx5_vzalloc(outlen);
3426 if (!out)
3427 return -ENOMEM;
3428
3429 ret = mlx5_cmd_query_cong_counter(dev->mdev, false, out, outlen);
3430 if (ret)
3431 goto free;
3432
3433 for (i = 0; i < port->cnts.num_cong_counters; i++) {
3434 stats->value[i + offset] =
3435 be64_to_cpup((__be64 *)(out +
3436 port->cnts.offsets[i + offset]));
3437 }
3438
3439free:
3440 kvfree(out);
3441 return ret;
3442}
3443
3444static int mlx5_ib_get_hw_stats(struct ib_device *ibdev,
3445 struct rdma_hw_stats *stats,
3446 u8 port_num, int index)
3447{
3448 struct mlx5_ib_dev *dev = to_mdev(ibdev);
3449 struct mlx5_ib_port *port = &dev->port[port_num - 1];
3450 int ret, num_counters;
3451
3452 if (!stats)
3453 return -EINVAL;
3454
3455 ret = mlx5_ib_query_q_counters(dev, port, stats);
3456 if (ret)
3457 return ret;
3458 num_counters = port->cnts.num_q_counters;
3459
3460 if (MLX5_CAP_GEN(dev->mdev, cc_query_allowed)) {
3461 ret = mlx5_ib_query_cong_counters(dev, port, stats);
3462 if (ret)
3463 return ret;
3464 num_counters += port->cnts.num_cong_counters;
3465 }
3466
3467 return num_counters;
3468}
3469
3402static void *mlx5_ib_add(struct mlx5_core_dev *mdev)
3403{
3404 struct mlx5_ib_dev *dev;
3405 enum rdma_link_layer ll;
3406 int port_type_cap;
3407 const char *name;
3408 int err;
3409 int i;

--- 188 unchanged lines hidden (view full) ---

3598 if (err)
3599 goto err_disable_eth;
3600
3601 err = mlx5_ib_odp_init_one(dev);
3602 if (err)
3603 goto err_rsrc;
3604
3605 if (MLX5_CAP_GEN(dev->mdev, max_qp_cnt)) {
3470static void *mlx5_ib_add(struct mlx5_core_dev *mdev)
3471{
3472 struct mlx5_ib_dev *dev;
3473 enum rdma_link_layer ll;
3474 int port_type_cap;
3475 const char *name;
3476 int err;
3477 int i;

--- 188 unchanged lines hidden (view full) ---

3666 if (err)
3667 goto err_disable_eth;
3668
3669 err = mlx5_ib_odp_init_one(dev);
3670 if (err)
3671 goto err_rsrc;
3672
3673 if (MLX5_CAP_GEN(dev->mdev, max_qp_cnt)) {
3606 err = mlx5_ib_alloc_q_counters(dev);
3674 err = mlx5_ib_alloc_counters(dev);
3607 if (err)
3608 goto err_odp;
3609 }
3610
3611 dev->mdev->priv.uar = mlx5_get_uars_page(dev->mdev);
3612 if (!dev->mdev->priv.uar)
3675 if (err)
3676 goto err_odp;
3677 }
3678
3679 dev->mdev->priv.uar = mlx5_get_uars_page(dev->mdev);
3680 if (!dev->mdev->priv.uar)
3613 goto err_q_cnt;
3681 goto err_cnt;
3614
3615 err = mlx5_alloc_bfreg(dev->mdev, &dev->bfreg, false, false);
3616 if (err)
3617 goto err_uar_page;
3618
3619 err = mlx5_alloc_bfreg(dev->mdev, &dev->fp_bfreg, false, true);
3620 if (err)
3621 goto err_bfreg;

--- 27 unchanged lines hidden (view full) ---

3649 mlx5_free_bfreg(dev->mdev, &dev->fp_bfreg);
3650
3651err_bfreg:
3652 mlx5_free_bfreg(dev->mdev, &dev->bfreg);
3653
3654err_uar_page:
3655 mlx5_put_uars_page(dev->mdev, dev->mdev->priv.uar);
3656
3682
3683 err = mlx5_alloc_bfreg(dev->mdev, &dev->bfreg, false, false);
3684 if (err)
3685 goto err_uar_page;
3686
3687 err = mlx5_alloc_bfreg(dev->mdev, &dev->fp_bfreg, false, true);
3688 if (err)
3689 goto err_bfreg;

--- 27 unchanged lines hidden (view full) ---

3717 mlx5_free_bfreg(dev->mdev, &dev->fp_bfreg);
3718
3719err_bfreg:
3720 mlx5_free_bfreg(dev->mdev, &dev->bfreg);
3721
3722err_uar_page:
3723 mlx5_put_uars_page(dev->mdev, dev->mdev->priv.uar);
3724
3657err_q_cnt:
3725err_cnt:
3658 if (MLX5_CAP_GEN(dev->mdev, max_qp_cnt))
3726 if (MLX5_CAP_GEN(dev->mdev, max_qp_cnt))
3659 mlx5_ib_dealloc_q_counters(dev);
3727 mlx5_ib_dealloc_counters(dev);
3660
3661err_odp:
3662 mlx5_ib_odp_remove_one(dev);
3663
3664err_rsrc:
3665 destroy_dev_resources(&dev->devr);
3666
3667err_disable_eth:

--- 17 unchanged lines hidden (view full) ---

3685 enum rdma_link_layer ll = mlx5_ib_port_link_layer(&dev->ib_dev, 1);
3686
3687 mlx5_remove_netdev_notifier(dev);
3688 ib_unregister_device(&dev->ib_dev);
3689 mlx5_free_bfreg(dev->mdev, &dev->fp_bfreg);
3690 mlx5_free_bfreg(dev->mdev, &dev->bfreg);
3691 mlx5_put_uars_page(dev->mdev, mdev->priv.uar);
3692 if (MLX5_CAP_GEN(dev->mdev, max_qp_cnt))
3728
3729err_odp:
3730 mlx5_ib_odp_remove_one(dev);
3731
3732err_rsrc:
3733 destroy_dev_resources(&dev->devr);
3734
3735err_disable_eth:

--- 17 unchanged lines hidden (view full) ---

3753 enum rdma_link_layer ll = mlx5_ib_port_link_layer(&dev->ib_dev, 1);
3754
3755 mlx5_remove_netdev_notifier(dev);
3756 ib_unregister_device(&dev->ib_dev);
3757 mlx5_free_bfreg(dev->mdev, &dev->fp_bfreg);
3758 mlx5_free_bfreg(dev->mdev, &dev->bfreg);
3759 mlx5_put_uars_page(dev->mdev, mdev->priv.uar);
3760 if (MLX5_CAP_GEN(dev->mdev, max_qp_cnt))
3693 mlx5_ib_dealloc_q_counters(dev);
3761 mlx5_ib_dealloc_counters(dev);
3694 destroy_umrc_res(dev);
3695 mlx5_ib_odp_remove_one(dev);
3696 destroy_dev_resources(&dev->devr);
3697 if (ll == IB_LINK_LAYER_ETHERNET)
3698 mlx5_disable_eth(dev);
3699 kfree(dev->port);
3700 ib_dealloc_device(&dev->ib_dev);
3701}

--- 29 unchanged lines hidden --- 		3762 destroy_umrc_res(dev);
3763 mlx5_ib_odp_remove_one(dev);
3764 destroy_dev_resources(&dev->devr);
3765 if (ll == IB_LINK_LAYER_ETHERNET)
3766 mlx5_disable_eth(dev);
3767 kfree(dev->port);
3768 ib_dealloc_device(&dev->ib_dev);
3769}

--- 29 unchanged lines hidden ---