sor.c (ccb8b12c4b72a5034a1e04efb68fe9a4682c1de0) sor.c (143b1df23e81df52e2a96e1848acabfb38a0c4e6)
1/*
2 * Copyright (C) 2013 NVIDIA Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8

--- 616 unchanged lines hidden (view full) ---

625
626 value = ((vbs & 0x7fff) << 16) | (hbs & 0x7fff);
627 tegra_sor_writel(sor, value, SOR_HEAD_STATE_4(0));
628
629 /* XXX interlaced mode */
630 tegra_sor_writel(sor, 0x00000001, SOR_HEAD_STATE_5(0));
631
632 /* CSTM (LVDS, link A/B, upper) */
1/*
2 * Copyright (C) 2013 NVIDIA Corporation
3 *
4 * This program is free software; you can redistribute it and/or modify
5 * it under the terms of the GNU General Public License version 2 as
6 * published by the Free Software Foundation.
7 */
8

--- 616 unchanged lines hidden (view full) ---

625
626 value = ((vbs & 0x7fff) << 16) | (hbs & 0x7fff);
627 tegra_sor_writel(sor, value, SOR_HEAD_STATE_4(0));
628
629 /* XXX interlaced mode */
630 tegra_sor_writel(sor, 0x00000001, SOR_HEAD_STATE_5(0));
631
632 /* CSTM (LVDS, link A/B, upper) */
633 value = SOR_CSTM_LVDS | SOR_CSTM_LINK_ACT_B | SOR_CSTM_LINK_ACT_B |
633 value = SOR_CSTM_LVDS | SOR_CSTM_LINK_ACT_A | SOR_CSTM_LINK_ACT_B |
634 SOR_CSTM_UPPER;
635 tegra_sor_writel(sor, value, SOR_CSTM);
636
637 /* PWM setup */
638 err = tegra_sor_setup_pwm(sor, 250);
639 if (err < 0) {
640 dev_err(sor->dev, "failed to setup PWM: %d\n", err);
641 goto unlock;

--- 591 unchanged lines hidden --- 		634 SOR_CSTM_UPPER;
635 tegra_sor_writel(sor, value, SOR_CSTM);
636
637 /* PWM setup */
638 err = tegra_sor_setup_pwm(sor, 250);
639 if (err < 0) {
640 dev_err(sor->dev, "failed to setup PWM: %d\n", err);
641 goto unlock;

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