disp.c (ea6143a86c67110a2c62deaf70d0b7b92e4f865f) disp.c (9793083f1dd9da8dda0ef68e90934dd7d112203b)
1/*
2 * Copyright 2011 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

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1630static void
1631nv50_sor_atomic_enable(struct drm_encoder *encoder, struct drm_atomic_state *state)
1632{
1633 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
1634 struct nouveau_crtc *nv_crtc = nv50_outp_get_new_crtc(state, nv_encoder);
1635 struct nv50_head_atom *asyh =
1636 nv50_head_atom(drm_atomic_get_new_crtc_state(state, &nv_crtc->base));
1637 struct drm_display_mode *mode = &asyh->state.adjusted_mode;
1/*
2 * Copyright 2011 Red Hat Inc.
3 *
4 * Permission is hereby granted, free of charge, to any person obtaining a
5 * copy of this software and associated documentation files (the "Software"),
6 * to deal in the Software without restriction, including without limitation
7 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
8 * and/or sell copies of the Software, and to permit persons to whom the

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1630static void
1631nv50_sor_atomic_enable(struct drm_encoder *encoder, struct drm_atomic_state *state)
1632{
1633 struct nouveau_encoder *nv_encoder = nouveau_encoder(encoder);
1634 struct nouveau_crtc *nv_crtc = nv50_outp_get_new_crtc(state, nv_encoder);
1635 struct nv50_head_atom *asyh =
1636 nv50_head_atom(drm_atomic_get_new_crtc_state(state, &nv_crtc->base));
1637 struct drm_display_mode *mode = &asyh->state.adjusted_mode;
1638 struct {
1639 struct nv50_disp_mthd_v1 base;
1640 struct nv50_disp_sor_lvds_script_v0 lvds;
1641 } lvds = {
1642 .base.version = 1,
1643 .base.method = NV50_DISP_MTHD_V1_SOR_LVDS_SCRIPT,
1644 .base.hasht = nv_encoder->dcb->hasht,
1645 .base.hashm = nv_encoder->dcb->hashm,
1646 };
1647 struct nv50_disp *disp = nv50_disp(encoder->dev);
1648 struct drm_device *dev = encoder->dev;
1649 struct nouveau_drm *drm = nouveau_drm(dev);
1650 struct nouveau_connector *nv_connector;
1651#ifdef CONFIG_DRM_NOUVEAU_BACKLIGHT
1652 struct nouveau_backlight *backlight;
1653#endif
1654 struct nvbios *bios = &drm->vbios;
1638 struct nv50_disp *disp = nv50_disp(encoder->dev);
1639 struct drm_device *dev = encoder->dev;
1640 struct nouveau_drm *drm = nouveau_drm(dev);
1641 struct nouveau_connector *nv_connector;
1642#ifdef CONFIG_DRM_NOUVEAU_BACKLIGHT
1643 struct nouveau_backlight *backlight;
1644#endif
1645 struct nvbios *bios = &drm->vbios;
1655 bool hda = false;
1646 bool lvds_dual = false, lvds_8bpc = false, hda = false;
1656 u8 proto = NV507D_SOR_SET_CONTROL_PROTOCOL_CUSTOM;
1657 u8 depth = NV837D_SOR_SET_CONTROL_PIXEL_DEPTH_DEFAULT;
1658
1659 nv_connector = nv50_outp_get_new_connector(state, nv_encoder);
1660 nv_encoder->crtc = &nv_crtc->base;
1661
1662 if ((disp->disp->object.oclass == GT214_DISP ||
1663 disp->disp->object.oclass >= GF110_DISP) &&

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1684 }
1685
1686 nv50_hdmi_enable(&nv_encoder->base.base, nv_crtc, nv_connector, state, mode);
1687 break;
1688 case DCB_OUTPUT_LVDS:
1689 proto = NV507D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM;
1690
1691 if (bios->fp_no_ddc) {
1647 u8 proto = NV507D_SOR_SET_CONTROL_PROTOCOL_CUSTOM;
1648 u8 depth = NV837D_SOR_SET_CONTROL_PIXEL_DEPTH_DEFAULT;
1649
1650 nv_connector = nv50_outp_get_new_connector(state, nv_encoder);
1651 nv_encoder->crtc = &nv_crtc->base;
1652
1653 if ((disp->disp->object.oclass == GT214_DISP ||
1654 disp->disp->object.oclass >= GF110_DISP) &&

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1675 }
1676
1677 nv50_hdmi_enable(&nv_encoder->base.base, nv_crtc, nv_connector, state, mode);
1678 break;
1679 case DCB_OUTPUT_LVDS:
1680 proto = NV507D_SOR_SET_CONTROL_PROTOCOL_LVDS_CUSTOM;
1681
1682 if (bios->fp_no_ddc) {
1692 if (bios->fp.dual_link)
1693 lvds.lvds.script |= 0x0100;
1694 if (bios->fp.if_is_24bit)
1695 lvds.lvds.script |= 0x0200;
1683 lvds_dual = bios->fp.dual_link;
1684 lvds_8bpc = bios->fp.if_is_24bit;
1696 } else {
1697 if (nv_connector->type == DCB_CONNECTOR_LVDS_SPWG) {
1698 if (((u8 *)nv_connector->edid)[121] == 2)
1685 } else {
1686 if (nv_connector->type == DCB_CONNECTOR_LVDS_SPWG) {
1687 if (((u8 *)nv_connector->edid)[121] == 2)
1699 lvds.lvds.script |= 0x0100;
1688 lvds_dual = true;
1700 } else
1701 if (mode->clock >= bios->fp.duallink_transition_clk) {
1689 } else
1690 if (mode->clock >= bios->fp.duallink_transition_clk) {
1702 lvds.lvds.script |= 0x0100;
1691 lvds_dual = true;
1703 }
1704
1692 }
1693
1705 if (lvds.lvds.script & 0x0100) {
1694 if (lvds_dual) {
1706 if (bios->fp.strapless_is_24bit & 2)
1695 if (bios->fp.strapless_is_24bit & 2)
1707 lvds.lvds.script |= 0x0200;
1696 lvds_8bpc = true;
1708 } else {
1709 if (bios->fp.strapless_is_24bit & 1)
1697 } else {
1698 if (bios->fp.strapless_is_24bit & 1)
1710 lvds.lvds.script |= 0x0200;
1699 lvds_8bpc = true;
1711 }
1712
1713 if (asyh->or.bpc == 8)
1700 }
1701
1702 if (asyh->or.bpc == 8)
1714 lvds.lvds.script |= 0x0200;
1703 lvds_8bpc = true;
1715 }
1716
1704 }
1705
1717 nvif_outp_acquire_lvds(&nv_encoder->outp);
1718 nvif_mthd(&disp->disp->object, 0, &lvds, sizeof(lvds));
1706 nvif_outp_acquire_lvds(&nv_encoder->outp, lvds_dual, lvds_8bpc);
1719 break;
1720 case DCB_OUTPUT_DP:
1721 nvif_outp_acquire_dp(&nv_encoder->outp, hda);
1722 depth = nv50_dp_bpc_to_depth(asyh->or.bpc);
1723
1724 if (nv_encoder->outp.or.link & 1)
1725 proto = NV887D_SOR_SET_CONTROL_PROTOCOL_DP_A;
1726 else

--- 1126 unchanged lines hidden --- 		1707 break;
1708 case DCB_OUTPUT_DP:
1709 nvif_outp_acquire_dp(&nv_encoder->outp, hda);
1710 depth = nv50_dp_bpc_to_depth(asyh->or.bpc);
1711
1712 if (nv_encoder->outp.or.link & 1)
1713 proto = NV887D_SOR_SET_CONTROL_PROTOCOL_DP_A;
1714 else

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