gpio-ich.c (5f6f2b9f6dbf7afb5ce4e2faaf25006e7d9d8880) gpio-ich.c (488f270cad27fdb87b00ee22b2c4d0616d8bb135)
1/*
2 * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver
3 *
4 * Copyright (C) 2010 Extreme Engineering Solutions.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or

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14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21
1/*
2 * Intel ICH6-10, Series 5 and 6, Atom C2000 (Avoton/Rangeley) GPIO driver
3 *
4 * Copyright (C) 2010 Extreme Engineering Solutions.
5 *
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or

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14 * GNU General Public License for more details.
15 *
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
19 */
20
21
22#include <linux/bitops.h>
23#include <linux/gpio/driver.h>
22#include <linux/ioport.h>
24#include <linux/ioport.h>
25#include <linux/mfd/lpc_ich.h>
23#include <linux/module.h>
24#include <linux/pci.h>
26#include <linux/module.h>
27#include <linux/pci.h>
25#include <linux/gpio/driver.h>
26#include <linux/platform_device.h>
28#include <linux/platform_device.h>
27#include <linux/mfd/lpc_ich.h>
28#include <linux/bitops.h>
29
30#define DRV_NAME "gpio_ich"
31
32/*
33 * GPIO register offsets in GPIO I/O space.
34 * Each chunk of 32 GPIOs is manipulated via its own USE_SELx, IO_SELx, and
35 * LVLx registers. Logic in the read/write functions takes a register and
36 * an absolute bit number and determines the proper register offset and bit

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30#define DRV_NAME "gpio_ich"
31
32/*
33 * GPIO register offsets in GPIO I/O space.
34 * Each chunk of 32 GPIOs is manipulated via its own USE_SELx, IO_SELx, and
35 * LVLx registers. Logic in the read/write functions takes a register and
36 * an absolute bit number and determines the proper register offset and bit

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