ccp-dev.h (a43eb98507574acfc435c38a6b7fb1fab6605519) ccp-dev.h (956ee21a6df08afd9c1c64e0f394a9a1b65e897d)
1/*
2 * AMD Cryptographic Coprocessor (CCP) driver
3 *
4 * Copyright (C) 2013,2016 Advanced Micro Devices, Inc.
5 *
6 * Author: Tom Lendacky <thomas.lendacky@amd.com>
7 * Author: Gary R Hook <gary.hook@amd.com>
8 *

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106
107/****** REQ6 Related Values ******/
108#define REQ6_MEMTYPE_SHIFT 16
109
110/****** Key Storage Block ******/
111#define KSB_START 77
112#define KSB_END 127
113#define KSB_COUNT (KSB_END - KSB_START + 1)
1/*
2 * AMD Cryptographic Coprocessor (CCP) driver
3 *
4 * Copyright (C) 2013,2016 Advanced Micro Devices, Inc.
5 *
6 * Author: Tom Lendacky <thomas.lendacky@amd.com>
7 * Author: Gary R Hook <gary.hook@amd.com>
8 *

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106
107/****** REQ6 Related Values ******/
108#define REQ6_MEMTYPE_SHIFT 16
109
110/****** Key Storage Block ******/
111#define KSB_START 77
112#define KSB_END 127
113#define KSB_COUNT (KSB_END - KSB_START + 1)
114#define CCP_KSB_BITS 256
115#define CCP_KSB_BYTES 32
114#define CCP_SB_BITS 256
116
117#define CCP_JOBID_MASK 0x0000003f
118
119#define CCP_DMAPOOL_MAX_SIZE 64
120#define CCP_DMAPOOL_ALIGN BIT(5)
121
122#define CCP_REVERSE_BUF_SIZE 64
123
115
116#define CCP_JOBID_MASK 0x0000003f
117
118#define CCP_DMAPOOL_MAX_SIZE 64
119#define CCP_DMAPOOL_ALIGN BIT(5)
120
121#define CCP_REVERSE_BUF_SIZE 64
122
124#define CCP_AES_KEY_KSB_COUNT 1
125#define CCP_AES_CTX_KSB_COUNT 1
123#define CCP_AES_KEY_SB_COUNT 1
124#define CCP_AES_CTX_SB_COUNT 1
126
125
127#define CCP_XTS_AES_KEY_KSB_COUNT 1
128#define CCP_XTS_AES_CTX_KSB_COUNT 1
126#define CCP_XTS_AES_KEY_SB_COUNT 1
127#define CCP_XTS_AES_CTX_SB_COUNT 1
129
128
130#define CCP_SHA_KSB_COUNT 1
129#define CCP_SHA_SB_COUNT 1
131
132#define CCP_RSA_MAX_WIDTH 4096
133
134#define CCP_PASSTHRU_BLOCKSIZE 256
135#define CCP_PASSTHRU_MASKSIZE 32
130
131#define CCP_RSA_MAX_WIDTH 4096
132
133#define CCP_PASSTHRU_BLOCKSIZE 256
134#define CCP_PASSTHRU_MASKSIZE 32
136#define CCP_PASSTHRU_KSB_COUNT 1
135#define CCP_PASSTHRU_SB_COUNT 1
137
138#define CCP_ECC_MODULUS_BYTES 48 /* 384-bits */
139#define CCP_ECC_MAX_OPERANDS 6
140#define CCP_ECC_MAX_OUTPUTS 3
141#define CCP_ECC_SRC_BUF_SIZE 448
142#define CCP_ECC_DST_BUF_SIZE 192
143#define CCP_ECC_OPERAND_SIZE 64
144#define CCP_ECC_OUTPUT_SIZE 64
145#define CCP_ECC_RESULT_OFFSET 60
146#define CCP_ECC_RESULT_SUCCESS 0x0001
147
136
137#define CCP_ECC_MODULUS_BYTES 48 /* 384-bits */
138#define CCP_ECC_MAX_OPERANDS 6
139#define CCP_ECC_MAX_OUTPUTS 3
140#define CCP_ECC_SRC_BUF_SIZE 448
141#define CCP_ECC_DST_BUF_SIZE 192
142#define CCP_ECC_OPERAND_SIZE 64
143#define CCP_ECC_OUTPUT_SIZE 64
144#define CCP_ECC_RESULT_OFFSET 60
145#define CCP_ECC_RESULT_SUCCESS 0x0001
146
147#define CCP_SB_BYTES 32
148
148struct ccp_op;
149
150/* Structure for computation functions that are device-specific */
151struct ccp_actions {
152 int (*aes)(struct ccp_op *);
153 int (*xts_aes)(struct ccp_op *);
154 int (*sha)(struct ccp_op *);
155 int (*rsa)(struct ccp_op *);

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210 struct ccp_device *ccp;
211
212 /* Queue identifier */
213 u32 id;
214
215 /* Queue dma pool */
216 struct dma_pool *dma_pool;
217
149struct ccp_op;
150
151/* Structure for computation functions that are device-specific */
152struct ccp_actions {
153 int (*aes)(struct ccp_op *);
154 int (*xts_aes)(struct ccp_op *);
155 int (*sha)(struct ccp_op *);
156 int (*rsa)(struct ccp_op *);

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211 struct ccp_device *ccp;
212
213 /* Queue identifier */
214 u32 id;
215
216 /* Queue dma pool */
217 struct dma_pool *dma_pool;
218
218 /* Queue reserved KSB regions */
219 u32 ksb_key;
220 u32 ksb_ctx;
219 /* Per-queue reserved storage block(s) */
220 u32 sb_key;
221 u32 sb_ctx;
221
222 /* Queue processing thread */
223 struct task_struct *kthread;
224 unsigned int active;
225 unsigned int suspended;
226
227 /* Number of free command slots available */
228 unsigned int free_slots;

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308 /* The CCP uses key storage blocks (KSB) to maintain context for certain
309 * operations. To prevent multiple cmds from using the same KSB range
310 * a command queue reserves a KSB range for the duration of the cmd.
311 * Each queue, will however, reserve 2 KSB blocks for operations that
312 * only require single KSB entries (eg. AES context/iv and key) in order
313 * to avoid allocation contention. This will reserve at most 10 KSB
314 * entries, leaving 40 KSB entries available for dynamic allocation.
315 */
222
223 /* Queue processing thread */
224 struct task_struct *kthread;
225 unsigned int active;
226 unsigned int suspended;
227
228 /* Number of free command slots available */
229 unsigned int free_slots;

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309 /* The CCP uses key storage blocks (KSB) to maintain context for certain
310 * operations. To prevent multiple cmds from using the same KSB range
311 * a command queue reserves a KSB range for the duration of the cmd.
312 * Each queue, will however, reserve 2 KSB blocks for operations that
313 * only require single KSB entries (eg. AES context/iv and key) in order
314 * to avoid allocation contention. This will reserve at most 10 KSB
315 * entries, leaving 40 KSB entries available for dynamic allocation.
316 */
316 struct mutex ksb_mutex ____cacheline_aligned;
317 DECLARE_BITMAP(ksb, KSB_COUNT);
318 wait_queue_head_t ksb_queue;
319 unsigned int ksb_avail;
320 unsigned int ksb_count;
321 u32 ksb_start;
317 struct mutex sb_mutex ____cacheline_aligned;
318 DECLARE_BITMAP(sb, KSB_COUNT);
319 wait_queue_head_t sb_queue;
320 unsigned int sb_avail;
321 unsigned int sb_count;
322 u32 sb_start;
322
323 /* Suspend support */
324 unsigned int suspending;
325 wait_queue_head_t suspend_queue;
326
327 /* DMA caching attribute support */
328 unsigned int axcache;
329};
330
331enum ccp_memtype {
332 CCP_MEMTYPE_SYSTEM = 0,
323
324 /* Suspend support */
325 unsigned int suspending;
326 wait_queue_head_t suspend_queue;
327
328 /* DMA caching attribute support */
329 unsigned int axcache;
330};
331
332enum ccp_memtype {
333 CCP_MEMTYPE_SYSTEM = 0,
333 CCP_MEMTYPE_KSB,
334 CCP_MEMTYPE_SB,
334 CCP_MEMTYPE_LOCAL,
335 CCP_MEMTYPE__LAST,
336};
337
338struct ccp_dma_info {
339 dma_addr_t address;
340 unsigned int offset;
341 unsigned int length;

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369 struct ccp_sg_workarea sg_wa;
370 struct ccp_dm_workarea dm_wa;
371};
372
373struct ccp_mem {
374 enum ccp_memtype type;
375 union {
376 struct ccp_dma_info dma;
335 CCP_MEMTYPE_LOCAL,
336 CCP_MEMTYPE__LAST,
337};
338
339struct ccp_dma_info {
340 dma_addr_t address;
341 unsigned int offset;
342 unsigned int length;

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370 struct ccp_sg_workarea sg_wa;
371 struct ccp_dm_workarea dm_wa;
372};
373
374struct ccp_mem {
375 enum ccp_memtype type;
376 union {
377 struct ccp_dma_info dma;
377 u32 ksb;
378 u32 sb;
378 } u;
379};
380
381struct ccp_aes_op {
382 enum ccp_aes_type type;
383 enum ccp_aes_mode mode;
384 enum ccp_aes_action action;
385};

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409};
410
411struct ccp_op {
412 struct ccp_cmd_queue *cmd_q;
413
414 u32 jobid;
415 u32 ioc;
416 u32 soc;
379 } u;
380};
381
382struct ccp_aes_op {
383 enum ccp_aes_type type;
384 enum ccp_aes_mode mode;
385 enum ccp_aes_action action;
386};

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410};
411
412struct ccp_op {
413 struct ccp_cmd_queue *cmd_q;
414
415 u32 jobid;
416 u32 ioc;
417 u32 soc;
417 u32 ksb_key;
418 u32 ksb_ctx;
418 u32 sb_key;
419 u32 sb_ctx;
419 u32 init;
420 u32 eom;
421
422 struct ccp_mem src;
423 struct ccp_mem dst;
424
425 union {
426 struct ccp_aes_op aes;

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421 u32 eom;
422
423 struct ccp_mem src;
424 struct ccp_mem dst;
425
426 union {
427 struct ccp_aes_op aes;

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