| clk-aspeed.c (dcb899c47da9ff32e5156ddb9b2867f63ff7c4d0) | clk-aspeed.c (e76e56823a318ca580be4cfc5a6a9269bc70abea) |
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| 1// SPDX-License-Identifier: GPL-2.0+ 2 3#define pr_fmt(fmt) "clk-aspeed: " fmt 4 5#include <linux/clk-provider.h> 6#include <linux/mfd/syscon.h> 7#include <linux/of_address.h> 8#include <linux/of_device.h> --- 77 unchanged lines hidden (view full) --- 86 87/* TODO: ask Aspeed about the actual parent data */ 88static const struct aspeed_gate_data aspeed_gates[] = { 89 /* clk rst name parent flags */ 90 [ASPEED_CLK_GATE_ECLK] = { 0, -1, "eclk-gate", "eclk", 0 }, /* Video Engine */ 91 [ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */ 92 [ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */ 93 [ASPEED_CLK_GATE_VCLK] = { 3, 6, "vclk-gate", NULL, 0 }, /* Video Capture */ | 1// SPDX-License-Identifier: GPL-2.0+ 2 3#define pr_fmt(fmt) "clk-aspeed: " fmt 4 5#include <linux/clk-provider.h> 6#include <linux/mfd/syscon.h> 7#include <linux/of_address.h> 8#include <linux/of_device.h> --- 77 unchanged lines hidden (view full) --- 86 87/* TODO: ask Aspeed about the actual parent data */ 88static const struct aspeed_gate_data aspeed_gates[] = { 89 /* clk rst name parent flags */ 90 [ASPEED_CLK_GATE_ECLK] = { 0, -1, "eclk-gate", "eclk", 0 }, /* Video Engine */ 91 [ASPEED_CLK_GATE_GCLK] = { 1, 7, "gclk-gate", NULL, 0 }, /* 2D engine */ 92 [ASPEED_CLK_GATE_MCLK] = { 2, -1, "mclk-gate", "mpll", CLK_IS_CRITICAL }, /* SDRAM */ 93 [ASPEED_CLK_GATE_VCLK] = { 3, 6, "vclk-gate", NULL, 0 }, /* Video Capture */ |
| 94 [ASPEED_CLK_GATE_BCLK] = { 4, 10, "bclk-gate", "bclk", 0 }, /* PCIe/PCI */ | 94 [ASPEED_CLK_GATE_BCLK] = { 4, 8, "bclk-gate", "bclk", 0 }, /* PCIe/PCI */ |
| 95 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, 0 }, /* DAC */ 96 [ASPEED_CLK_GATE_REFCLK] = { 6, -1, "refclk-gate", "clkin", CLK_IS_CRITICAL }, 97 [ASPEED_CLK_GATE_USBPORT2CLK] = { 7, 3, "usb-port2-gate", NULL, 0 }, /* USB2.0 Host port 2 */ 98 [ASPEED_CLK_GATE_LCLK] = { 8, 5, "lclk-gate", NULL, 0 }, /* LPC */ 99 [ASPEED_CLK_GATE_USBUHCICLK] = { 9, 15, "usb-uhci-gate", NULL, 0 }, /* USB1.1 (requires port 2 enabled) */ 100 [ASPEED_CLK_GATE_D1CLK] = { 10, 13, "d1clk-gate", NULL, 0 }, /* GFX CRT */ 101 [ASPEED_CLK_GATE_YCLK] = { 13, 4, "yclk-gate", NULL, 0 }, /* HAC */ 102 [ASPEED_CLK_GATE_USBPORT1CLK] = { 14, 14, "usb-port1-gate", NULL, 0 }, /* USB2 hub/USB2 host port 1/USB1.1 dev */ --- 193 unchanged lines hidden (view full) --- 296static const u8 aspeed_resets[] = { 297 /* SCU04 resets */ 298 [ASPEED_RESET_XDMA] = 25, 299 [ASPEED_RESET_MCTP] = 24, 300 [ASPEED_RESET_ADC] = 23, 301 [ASPEED_RESET_JTAG_MASTER] = 22, 302 [ASPEED_RESET_MIC] = 18, 303 [ASPEED_RESET_PWM] = 9, | 95 [ASPEED_CLK_GATE_DCLK] = { 5, -1, "dclk-gate", NULL, 0 }, /* DAC */ 96 [ASPEED_CLK_GATE_REFCLK] = { 6, -1, "refclk-gate", "clkin", CLK_IS_CRITICAL }, 97 [ASPEED_CLK_GATE_USBPORT2CLK] = { 7, 3, "usb-port2-gate", NULL, 0 }, /* USB2.0 Host port 2 */ 98 [ASPEED_CLK_GATE_LCLK] = { 8, 5, "lclk-gate", NULL, 0 }, /* LPC */ 99 [ASPEED_CLK_GATE_USBUHCICLK] = { 9, 15, "usb-uhci-gate", NULL, 0 }, /* USB1.1 (requires port 2 enabled) */ 100 [ASPEED_CLK_GATE_D1CLK] = { 10, 13, "d1clk-gate", NULL, 0 }, /* GFX CRT */ 101 [ASPEED_CLK_GATE_YCLK] = { 13, 4, "yclk-gate", NULL, 0 }, /* HAC */ 102 [ASPEED_CLK_GATE_USBPORT1CLK] = { 14, 14, "usb-port1-gate", NULL, 0 }, /* USB2 hub/USB2 host port 1/USB1.1 dev */ --- 193 unchanged lines hidden (view full) --- 296static const u8 aspeed_resets[] = { 297 /* SCU04 resets */ 298 [ASPEED_RESET_XDMA] = 25, 299 [ASPEED_RESET_MCTP] = 24, 300 [ASPEED_RESET_ADC] = 23, 301 [ASPEED_RESET_JTAG_MASTER] = 22, 302 [ASPEED_RESET_MIC] = 18, 303 [ASPEED_RESET_PWM] = 9, |
| 304 [ASPEED_RESET_PCIVGA] = 8, | 304 [ASPEED_RESET_PECI] = 10, |
| 305 [ASPEED_RESET_I2C] = 2, 306 [ASPEED_RESET_AHB] = 1, 307 308 /* 309 * SCUD4 resets start at an offset to separate them from 310 * the SCU04 resets. 311 */ 312 [ASPEED_RESET_CRT1] = ASPEED_RESET2_OFFSET + 5, --- 389 unchanged lines hidden --- | 305 [ASPEED_RESET_I2C] = 2, 306 [ASPEED_RESET_AHB] = 1, 307 308 /* 309 * SCUD4 resets start at an offset to separate them from 310 * the SCU04 resets. 311 */ 312 [ASPEED_RESET_CRT1] = ASPEED_RESET2_OFFSET + 5, --- 389 unchanged lines hidden --- |