lapic.h (394457a928e0f7ff121c375966f5ec1980dabc09) lapic.h (e462755cae2bf8297a663278935ad4d59812d2f3)
1#ifndef __KVM_X86_LAPIC_H
2#define __KVM_X86_LAPIC_H
3
4#include "iodev.h"
5
6#include <linux/kvm_host.h>
7
8#define KVM_APIC_INIT 0

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17};
18
19struct kvm_lapic {
20 unsigned long base_address;
21 struct kvm_io_device dev;
22 struct kvm_timer lapic_timer;
23 u32 divide_count;
24 struct kvm_vcpu *vcpu;
1#ifndef __KVM_X86_LAPIC_H
2#define __KVM_X86_LAPIC_H
3
4#include "iodev.h"
5
6#include <linux/kvm_host.h>
7
8#define KVM_APIC_INIT 0

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17};
18
19struct kvm_lapic {
20 unsigned long base_address;
21 struct kvm_io_device dev;
22 struct kvm_timer lapic_timer;
23 u32 divide_count;
24 struct kvm_vcpu *vcpu;
25 bool sw_enabled;
25 bool irr_pending;
26 /* Number of bits set in ISR. */
27 s16 isr_count;
28 /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
29 int highest_isr_cache;
30 /**
31 * APIC register page. The layout matches the register layout seen by
32 * the guest 1:1, because it is accessed by the vmx microcode.

--- 141 unchanged lines hidden --- 		26 bool irr_pending;
27 /* Number of bits set in ISR. */
28 s16 isr_count;
29 /* The highest vector set in ISR; if -1 - invalid, must scan ISR. */
30 int highest_isr_cache;
31 /**
32 * APIC register page. The layout matches the register layout seen by
33 * the guest 1:1, because it is accessed by the vmx microcode.

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