cache-sh2.c (1da177e4c3f41524e886b7f1b8a0c1fc7321cac2) cache-sh2.c (9d4436a6fbc8c5eccdfcb8f5884e0a7b4a57f6d2)
1/*
2 * arch/sh/mm/cache-sh2.c
3 *
4 * Copyright (C) 2002 Paul Mundt
5 *
6 * Released under the terms of the GNU GPL v2.0.
7 */
1/*
2 * arch/sh/mm/cache-sh2.c
3 *
4 * Copyright (C) 2002 Paul Mundt
5 *
6 * Released under the terms of the GNU GPL v2.0.
7 */
8
8#include <linux/init.h>
9#include <linux/mm.h>
10
11#include <asm/cache.h>
12#include <asm/addrspace.h>
13#include <asm/processor.h>
14#include <asm/cacheflush.h>
15#include <asm/io.h>
16
9#include <linux/init.h>
10#include <linux/mm.h>
11
12#include <asm/cache.h>
13#include <asm/addrspace.h>
14#include <asm/processor.h>
15#include <asm/cacheflush.h>
16#include <asm/io.h>
17
17/*
18 * Calculate the OC address and set the way bit on the SH-2.
19 *
20 * We must have already jump_to_P2()'ed prior to calling this
21 * function, since we rely on CCR manipulation to do the
22 * Right Thing(tm).
23 */
24unsigned long __get_oc_addr(unsigned long set, unsigned long way)
18void __flush_wback_region(void *start, int size)
25{
19{
26 unsigned long ccr;
20 unsigned long v;
21 unsigned long begin, end;
27
22
28 /*
29 * On SH-2 the way bit isn't tracked in the address field
30 * if we're doing address array access .. instead, we need
31 * to manually switch out the way in the CCR.
32 */
33 ccr = ctrl_inl(CCR);
34 ccr &= ~0x00c0;
35 ccr |= way << cpu_data->dcache.way_shift;
23 begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
24 end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
25 & ~(L1_CACHE_BYTES-1);
26 for (v = begin; v < end; v+=L1_CACHE_BYTES) {
27 /* FIXME cache purge */
28 ctrl_outl((v & 0x1ffffc00), (v & 0x00000ff0) | 0x00000008);
29 }
30}
36
31
37 /*
38 * Despite the number of sets being halved, we end up losing
39 * the first 2 ways to OCRAM instead of the last 2 (if we're
40 * 4-way). As a result, forcibly setting the W1 bit handily
41 * bumps us up 2 ways.
42 */
43 if (ccr & CCR_CACHE_ORA)
44 ccr |= 1 << (cpu_data->dcache.way_shift + 1);
32void __flush_purge_region(void *start, int size)
33{
34 unsigned long v;
35 unsigned long begin, end;
45
36
46 ctrl_outl(ccr, CCR);
37 begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
38 end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
39 & ~(L1_CACHE_BYTES-1);
40 for (v = begin; v < end; v+=L1_CACHE_BYTES) {
41 ctrl_outl((v & 0x1ffffc00), (v & 0x00000ff0) | 0x00000008);
42 }
43}
47
44
48 return CACHE_OC_ADDRESS_ARRAY | (set << cpu_data->dcache.entry_shift);
45void __flush_invalidate_region(void *start, int size)
46{
47 unsigned long v;
48 unsigned long begin, end;
49
50 begin = (unsigned long)start & ~(L1_CACHE_BYTES-1);
51 end = ((unsigned long)start + size + L1_CACHE_BYTES-1)
52 & ~(L1_CACHE_BYTES-1);
53 for (v = begin; v < end; v+=L1_CACHE_BYTES) {
54 ctrl_outl((v & 0x1ffffc00), (v & 0x00000ff0) | 0x00000008);
55 }
49}
50
56}
57